With intention to make falcon header free of private data we are making
all falcon struct members (pmu.flcn, sec2.flcn, fecs_flcn, gpccs_flcn,
nvdec_flcn, minion_flcn, gsp_flcn) in the gk20a, pointers to struct
nvgpu_falcon. Falcon structures are allocated/deallocated by
falcon_sw_init & _free respectively.
While at it, remove duplicate gk20a.pmu_flcn and gk20a.sec2_flcn,
refactor flcn_id assignment and introduce falcon_hal_sw_free.
JIRA NVGPU-1594
Change-Id: I222086cf28215ea8ecf9a6166284d5cc506bb0c5
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1968242
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Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This adds casts for cases where the ACR code was violating MISRA Rule
10.3. These are cases where assignments are made to objects of different
size or essential types. In cases where the source could overflow the
case, an assert is included.
JIRA NVGPU-1008
Change-Id: Iea2ce500326e8c482663111a36c5b428825bfd04
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1959638
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This change fixes a number of This is a MISRA 10.3 rule violation due to
the implicit casts of sizeof() to u32's. This change adds u32 casts to
each of these violations. This should be safe because a 4GB type size
would be very unlikely in this driver.
JIRA NVGPU-1008
Change-Id: I359cda790278af6e6dfaec8599e2b02c11670fc2
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1959428
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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