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0990135166
MISRA Rule 10.3 prohibits implicit assignment of objects of narrower size or essential type. This fixes MISRA 10.3 violations in pmu_fw.c The API set_pmu_cmdline_args_secure_mode() was updated to accept a u8 for the val parameter to avoid unnecessary casts. The APIs get_perfmon_cmd_init_offsetofvar() and get_perfmon_cmd_start_offsetofvar() were updated to pass a u32 by reference to get the offset value so the return value can be used properly. JIRA NVGPU-2841 Change-Id: I8ae34531e843022e8bfa9b5c60ad163b0f7fbf5c Signed-off-by: Philip Elcan <pelcan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2027767 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>