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2788943d38
The forced PRAMIN reads and writes for sysmem buffers haven't worked in a while since the PRAMIN access code was refactored to work with vidmem-only sgt allocs. This feature was only ever meant for testing and debugging PRAMIN access and early dGPU support, but that is stable enough now so just delete the broken feature instead of fixing it. Change-Id: Ib31dae4550f3b6fea3c426a2e4ad126864bf85d2 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1723725 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
93 lines
2.9 KiB
C
93 lines
2.9 KiB
C
/*
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* Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/pramin.h>
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#include <nvgpu/page_allocator.h>
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#include <nvgpu/enabled.h>
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#include <nvgpu/sizes.h>
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#include "gk20a/gk20a.h"
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/*
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* The PRAMIN range is 1 MB, must change base addr if a buffer crosses that.
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* This same loop is used for read/write/memset. Offset and size in bytes.
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* One call to "loop" is done per range, with "arg" supplied.
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*/
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void nvgpu_pramin_access_batched(struct gk20a *g, struct nvgpu_mem *mem,
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u32 offset, u32 size, pramin_access_batch_fn loop, u32 **arg)
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{
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struct nvgpu_page_alloc *alloc = NULL;
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struct nvgpu_sgt *sgt;
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struct nvgpu_sgl *sgl;
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u32 byteoff, start_reg, until_end, n;
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/*
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* TODO: Vidmem is not accesible through pramin on shutdown path.
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* driver should be refactored to prevent this from happening, but for
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* now it is ok just to ignore the writes
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*/
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if (!gk20a_io_exists(g) && nvgpu_is_enabled(g, NVGPU_DRIVER_IS_DYING))
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return;
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alloc = mem->vidmem_alloc;
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sgt = &alloc->sgt;
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nvgpu_sgt_for_each_sgl(sgl, sgt) {
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if (offset >= nvgpu_sgt_get_length(sgt, sgl))
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offset -= nvgpu_sgt_get_length(sgt, sgl);
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else
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break;
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}
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while (size) {
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u32 sgl_len = (u32)nvgpu_sgt_get_length(sgt, sgl);
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byteoff = g->ops.pramin.enter(g, mem, sgt, sgl,
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offset / sizeof(u32));
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start_reg = g->ops.pramin.data032_r(byteoff / sizeof(u32));
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until_end = SZ_1M - (byteoff & (SZ_1M - 1));
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n = min3(size, until_end, (u32)(sgl_len - offset));
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loop(g, start_reg, n / sizeof(u32), arg);
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/* read back to synchronize accesses */
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gk20a_readl(g, start_reg);
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g->ops.pramin.exit(g, mem, sgl);
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size -= n;
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if (n == (sgl_len - offset)) {
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sgl = nvgpu_sgt_get_next(sgt, sgl);
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offset = 0;
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} else {
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offset += n;
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}
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}
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}
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void nvgpu_init_pramin(struct mm_gk20a *mm)
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{
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mm->pramin_window = 0;
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nvgpu_spinlock_init(&mm->pramin_window_lock);
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}
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