Seshendra Gadagottu bf353cea6c gpu: nvgpu: sim_pci: reconcile sim escape paths between RM and nvgpu ...

SIM models are getting updated to have same escape read path
for RM and nvgpu. Updated nvgpu driver code to have same escape
read mechanism as RM for dgpu.

Required for dgpu to work on NET23.

Bug 2539889
Bug 200582707

Change-Id: Ied05dae00928d44249df695429fb5029331f1286
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2256665
Reviewed-by: Lakshmanan M <lm@nvidia.com>
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit

2020-12-15 14:13:28 -06:00

..

sim_netlist.c

gpu: nvgpu: add ctxsw_reg bundles for nvgpu-next

2020-12-15 14:13:28 -06:00

sim_pci.c

gpu: nvgpu: sim_pci: reconcile sim escape paths between RM and nvgpu

2020-12-15 14:13:28 -06:00

sim.c

gpu: nvgpu: Reconcile sim escape paths between RM and nvgpu

2020-12-15 14:13:28 -06:00