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50d9eb1554
MISRA rule 12.2 states that the right hand operand of a shift operator shall lie in the range zero to one less than the width in bits of the essential type of the left hand operand. This patch will fix these violations in posix code by casting them to an appropriate type or using the relevant BITxx() macros. JIRA NVGPU-666 Change-Id: Ibc428ee71977685f413ca0f972efeff34268da62 Signed-off-by: Srirangan Madhavan <smadhavan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1954303 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Sagar Kamble <skamble@nvidia.com> Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>