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7b3950f224
Added pre-populated register space for gv11b: - NV_FUSE 0x00021fff:0x00021000 Registers values were captured for Xavier on DDPX platform, using reg_dump, after disabling railgating and ELPG. Jira NVGPU-3476 Change-Id: Ic96f06501c3e903aef7ed635a88005332758bbb6 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2120663 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Seema Khowala <seemaj@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>