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865514be2d
Move the gp10b HW headers to a new directory specially for them: include/nvgpu/hw/gp10b And change the code to include like so: #include <nvgpu/hw/gp10b/hw_fb_gp10b.h> This is part of the process to restructure the nvgpu driver. Bug 1799159 Change-Id: Ic80ea5b7f5c280839e502e2178a345181f7a7ef9 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1280326 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
109 lines
3.0 KiB
C
109 lines
3.0 KiB
C
/*
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* GP10B FB
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*
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* Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <linux/types.h>
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#include "gk20a/gk20a.h"
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#include "gm20b/fb_gm20b.h"
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#include "gk20a/kind_gk20a.h"
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#include <nvgpu/hw/gp10b/hw_gmmu_gp10b.h>
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static void gp10b_init_uncompressed_kind_map(void)
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{
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gk20a_uc_kind_map[gmmu_pte_kind_z16_2cz_v()] =
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gk20a_uc_kind_map[gmmu_pte_kind_z16_ms2_2cz_v()] =
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gk20a_uc_kind_map[gmmu_pte_kind_z16_ms4_2cz_v()] =
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gk20a_uc_kind_map[gmmu_pte_kind_z16_ms8_2cz_v()] =
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gk20a_uc_kind_map[gmmu_pte_kind_z16_ms16_2cz_v()] =
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gmmu_pte_kind_z16_v();
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gk20a_uc_kind_map[gmmu_pte_kind_c32_ms4_4cbra_v()] =
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gk20a_uc_kind_map[gmmu_pte_kind_c64_ms4_4cbra_v()] =
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gmmu_pte_kind_generic_16bx2_v();
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}
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static bool gp10b_kind_supported(u8 k)
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{
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return (k >= gmmu_pte_kind_z16_2cz_v() &&
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k <= gmmu_pte_kind_z16_ms8_2cz_v())
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|| k == gmmu_pte_kind_z16_ms16_2cz_v()
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|| k == gmmu_pte_kind_c32_ms4_4cbra_v()
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|| k == gmmu_pte_kind_c64_ms4_4cbra_v();
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}
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static bool gp10b_kind_z(u8 k)
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{
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return (k >= gmmu_pte_kind_z16_2cz_v() &&
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k <= gmmu_pte_kind_z16_ms8_2cz_v()) ||
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k == gmmu_pte_kind_z16_ms16_2cz_v();
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}
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static bool gp10b_kind_compressible(u8 k)
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{
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return (k >= gmmu_pte_kind_z16_2cz_v() &&
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k <= gmmu_pte_kind_z16_ms8_2cz_v()) ||
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k == gmmu_pte_kind_z16_ms16_2cz_v() ||
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(k >= gmmu_pte_kind_z16_4cz_v() &&
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k <= gmmu_pte_kind_z16_ms16_4cz_v()) ||
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k == gmmu_pte_kind_c32_ms4_4cbra_v() ||
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k == gmmu_pte_kind_c64_ms4_4cbra_v();
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}
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static bool gp10b_kind_zbc(u8 k)
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{
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return (k >= gmmu_pte_kind_z16_2cz_v() &&
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k <= gmmu_pte_kind_z16_ms8_2cz_v()) ||
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k == gmmu_pte_kind_z16_ms16_2cz_v() ||
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k == gmmu_pte_kind_c32_ms4_4cbra_v() ||
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k == gmmu_pte_kind_c64_ms4_4cbra_v();
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}
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static void gp10b_init_kind_attr(void)
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{
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u16 k;
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for (k = 0; k < 256; k++) {
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if (gp10b_kind_supported((u8)k))
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gk20a_kind_attr[k] |= GK20A_KIND_ATTR_SUPPORTED;
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if (gp10b_kind_compressible((u8)k))
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gk20a_kind_attr[k] |= GK20A_KIND_ATTR_COMPRESSIBLE;
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if (gp10b_kind_z((u8)k))
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gk20a_kind_attr[k] |= GK20A_KIND_ATTR_Z;
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if (gp10b_kind_zbc((u8)k))
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gk20a_kind_attr[k] |= GK20A_KIND_ATTR_ZBC;
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}
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}
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static unsigned int gp10b_fb_compression_page_size(struct gk20a *g)
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{
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return SZ_64K;
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}
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static unsigned int gp10b_fb_compressible_page_size(struct gk20a *g)
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{
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return SZ_4K;
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}
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void gp10b_init_fb(struct gpu_ops *gops)
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{
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gm20b_init_fb(gops);
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gops->fb.compression_page_size = gp10b_fb_compression_page_size;
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gops->fb.compressible_page_size = gp10b_fb_compressible_page_size;
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gp10b_init_uncompressed_kind_map();
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gp10b_init_kind_attr();
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}
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