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The following CL contains the following VBIOS thermal table parsing and PMU interface support. 1) Thermal device table 2) Thermal channel table JIRA DNVGPU-130 Change-Id: Ie3abab4bf099a022b1b59db96811c2ed44079519 Signed-off-by: Lakshmanan M <lm@nvidia.com> Reviewed-on: http://git-master/r/1240630 (cherry picked from commit 814962a4be0a8cd0cddc7bc5211c62308ab1fea2) Reviewed-on: http://git-master/r/1246210 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
43 lines
1.0 KiB
C
43 lines
1.0 KiB
C
/*
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* general thermal device structures & definitions
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*
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* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef _THRMCHANNEL_H_
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#define _THRMCHANNEL_H_
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#include "boardobj/boardobj.h"
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#include "boardobj/boardobjgrp.h"
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#include "ctrl/ctrltherm.h"
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struct therm_channel {
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struct boardobj super;
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s16 scaling;
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s16 offset;
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s32 temp_min;
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s32 temp_max;
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};
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struct therm_channels {
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struct boardobjgrp_e32 super;
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};
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struct therm_channel_device {
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struct therm_channel super;
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u8 therm_dev_idx;
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u8 therm_dev_prov_idx;
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};
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u32 therm_channel_sw_setup(struct gk20a *g);
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#endif
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