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76b78b6fdc
Remove nvgpu_gpuid_t18x.h since this file is now visible. Migrate the relevant definitions and defines into their expected places and make the code use the real defines. No longer is hiding t18x specific stuff necessary. Bug 1799159 Change-Id: I47fa2392e46fdb7aacc70aeb0cc8c3f5ca0dc22f Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1300976 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
68 lines
2.4 KiB
C
68 lines
2.4 KiB
C
/*
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* NVGPU Public Interface Header
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*
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* Copyright (c) 2011-2016, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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/* This file is meant to extend nvgpu.h, not replace it
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* as such, be sure that nvgpu.h is actually the file performing the
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* inclusion, to the extent that's possible.
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*/
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#ifndef _UAPI__LINUX_NVGPU_IOCTL_H
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# error "This file is to be included within nvgpu.h only."
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#endif
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#ifndef _UAPI__LINUX_NVGPU_T18X_IOCTL_H_
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#define _UAPI__LINUX_NVGPU_T18X_IOCTL_H_
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/*
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* this flag is used in struct nvgpu_as_map_buffer_ex_args
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* to specify IO coherence
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*/
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#define NVGPU_AS_MAP_BUFFER_FLAGS_IO_COHERENT (1 << 4)
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/*
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* this flag is used in struct nvgpu_alloc_gpfifo_args
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* to enable re-playable faults for that channel
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*/
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#define NVGPU_ALLOC_GPFIFO_FLAGS_REPLAYABLE_FAULTS_ENABLE (1 << 2)
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/* Flags in nvgpu_alloc_obj_ctx_args.flags */
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#define NVGPU_ALLOC_OBJ_FLAGS_GFXP (1 << 1)
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#define NVGPU_ALLOC_OBJ_FLAGS_CILP (1 << 2)
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/* Flags in nvgpu_preemption_mode_args.graphics_preempt_flags */
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#define NVGPU_GRAPHICS_PREEMPTION_MODE_GFXP (1 << 1)
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/* Flags in nvgpu_preemption_mode_args.compute_preempt_flags */
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#define NVGPU_COMPUTE_PREEMPTION_MODE_CILP (1 << 2)
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/* SM LRF ECC is enabled */
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#define NVGPU_GPU_FLAGS_ECC_ENABLED_SM_LRF (1ULL << 60)
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/* SM SHM ECC is enabled */
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#define NVGPU_GPU_FLAGS_ECC_ENABLED_SM_SHM (1ULL << 61)
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/* TEX ECC is enabled */
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#define NVGPU_GPU_FLAGS_ECC_ENABLED_TEX (1ULL << 62)
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/* L2 ECC is enabled */
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#define NVGPU_GPU_FLAGS_ECC_ENABLED_LTC (1ULL << 63)
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/* All types of ECC are enabled */
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#define NVGPU_GPU_FLAGS_ALL_ECC_ENABLED \
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(NVGPU_GPU_FLAGS_ECC_ENABLED_SM_LRF | \
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NVGPU_GPU_FLAGS_ECC_ENABLED_SM_SHM | \
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NVGPU_GPU_FLAGS_ECC_ENABLED_TEX | \
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NVGPU_GPU_FLAGS_ECC_ENABLED_LTC)
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/* Channel event_id in nvgpu_channel_events_ctrl_ext_args */
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#define NVGPU_IOCTL_CHANNEL_EVENT_ID_CILP_PREEMPTION_STARTED 3
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#define NVGPU_IOCTL_CHANNEL_EVENT_ID_CILP_PREEMPTION_COMPLETE 4
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#endif /* _UAPI__LINUX_NVGPU_T18X_IOCTL_H_ */
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