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* Updated types and added error checks * Modified GR condition for ctxsw disable count CERT-C error check was added to detect error on integer overflow But below logic couldn't detect first overflow, so updated condition INT_MAX < gr->ctxsw_disable_count --> it became true after overflow So, we didn't detected in first overflow and lead to assert on enable JIRA NVGPU-3400 Change-Id: I6b0265a464f8f19efa7b0761612c6e9ffb3bd2bd Signed-off-by: Sagar Kadamati <skadamati@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2206282 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>