mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-23 18:16:01 +03:00
PE unit belongs to GR pipeline but not compute. Hence disabled access to the PE register in the GR Boot flow to prevent following PRIV error when SMC mode is enabled. PRI timeout: ADR 0x00503018 READ DATA 0x00000000 FECS_ERRCODE 0xbadf1100 [Error Type]: decode error Jira NVGPU-6699 Change-Id: Ia6f58258611a010252c7ead46b1b48cbf1b64001 Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2514894 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: Lakshmanan M <lm@nvidia.com> Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>