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2540a98aa4
This patch adds a number of missing 'Targets' fields in the SWUTS of various fifo units, fixes some missing ones and adds gops based targets. Jira NVGPU-4376 Change-Id: I445196e7092b01853786f40b860b29abc5d68371 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2276680 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
106 lines
3.2 KiB
C
106 lines
3.2 KiB
C
/*
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* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef UNIT_NVGPU_CHANNEL_GK20A_H
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#define UNIT_NVGPU_CHANNEL_GK20A_H
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#include <nvgpu/types.h>
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struct unit_module;
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struct gk20a;
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/** @addtogroup SWUTS-fifo-channel-gk20a
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* @{
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*
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* Software Unit Test Specification for fifo/channel/gk20a
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*/
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/**
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* Test specification for: test_gk20a_channel_enable
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*
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* Description: Branch coverage for gk20a_channel_enable
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*
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* Test Type: Feature
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*
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* Targets: gops_channel.enable, gk20a_channel_enable
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Allocate channel
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* - Call gk20a_channel_enable
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* - Check that enable_set bit is set for ccsr_channel_r
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_gk20a_channel_enable(struct unit_module *m,
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struct gk20a *g, void *args);
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/**
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* Test specification for: test_gk20a_channel_disable
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*
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* Description: Branch coverage for gk20a_channel_disable
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*
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* Test Type: Feature
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*
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* Targets: gops_channel.disable, gk20a_channel_disable
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Allocate channel
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* - Call gk20a_channel_disable
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* - Check that enable_clr bit is set for ccsr_channel_r
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_gk20a_channel_disable(struct unit_module *m,
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struct gk20a *g, void *args);
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/**
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* Test specification for: test_gk20a_channel_read_state
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*
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* Description: Branch coverage for gk20a_channel_read_state
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*
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* Test Type: Feature
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*
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* Targets: gops_channel.read_state, gk20a_channel_read_state
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*
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* Input: test_fifo_init_support() run for this GPU
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*
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* Steps:
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* - Allocate channel
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* - Build ccsr_channel_r with all combinations of next, enable,
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* status and busy fields.
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* - Check that interpreted status for next, enabled, busy, ctx_reload
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* and pending_acquire are in accordance with fields read from H/W.
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*
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* Output: Returns PASS if all branches gave expected results. FAIL otherwise.
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*/
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int test_gk20a_channel_read_state(struct unit_module *m,
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struct gk20a *g, void *args);
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/**
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* @}
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*/
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#endif /* UNIT_NVGPU_CHANNEL_GK20A_H */
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