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Author SHA1 Message Date
svcmobrel-release
94a016aa32 Updating prebuilts and/or headers
af3ee56442f16029cb9b13537477c384226b22fc - CODE_OF_CONDUCT.md
ac7f91dfb6c5c469d2d8196c6baebe46ede5aee0 - CHANGELOG.md
1b03ad8c20ddb6d129ade64846377cc86ce4c1de - README.md
d13779dbbab1c776db15f462cd46b29f2c0f8c7c - Makefile
ec5f1eb408e0b650158e0310fb1ddd8e9b323a6f - CONTRIBUTING.md
5728867ce2e96b63b29367be6aa1c0e47bcafc8f - SECURITY.md
7d577fdb9594ae572ff38fdda682a4796ab832ca - COPYING
6b73bf6a534ddc0f64e8ba88739381c3b7fb4b5c - nv-compiler.sh
7ad4bb8aebd57a9be26329a611b14c5a70ccf2b7 - nouveau/extract-firmware-nouveau.py
36f9753dbbef7dd5610312d5b14bffac1a93cee4 - nouveau/nouveau_firmware_layout.ods
80545889e3c9967fd0ae12a65005be31bac354f2 - src/nvidia-modeset/Makefile
80c2c9a2a05beb0202239db8b0dd7080ff21c194 - src/nvidia-modeset/kapi/interface/nvkms-kapi-private.h
36c20e9c111e66601b025802f840e7b87d09cdde - src/nvidia-modeset/kapi/interface/nvkms-kapi.h
27612b72a77ac67cd468ac7f15948d2ad78defed - src/nvidia-modeset/kapi/include/nvkms-kapi-internal.h
727bd77cfbc9ac4989c2ab7eec171ceb516510aa - src/nvidia-modeset/kapi/include/nvkms-kapi-notifiers.h
01d943d6edb0c647c2b8dbc44460948665b03e7a - src/nvidia-modeset/kapi/src/nvkms-kapi-notifiers.c
ce42ceac4c4cf9d249d66ab57ae2f435cd9623fc - src/nvidia-modeset/kapi/src/nvkms-kapi-sync.c
67fe73dc7149daf807194bd9a0f96252cb452179 - src/nvidia-modeset/kapi/src/nvkms-kapi.c
2ea1436104463c5e3d177e8574c3b4298976d37e - src/nvidia-modeset/interface/nvkms-ioctl.h
8e3e74d2b3f45381e7b0012d930cf451cbd1728f - src/nvidia-modeset/interface/nvkms-sync.h
d51449fa2fd19748007f2e98f0233c92b45f9572 - src/nvidia-modeset/interface/nvkms-api-types.h
4da2125966732a80fc154cea4b18b2372b12501e - src/nvidia-modeset/interface/nvkms-api.h
b986bc6591ba17a74ad81ec4c93347564c6d5165 - src/nvidia-modeset/interface/nvkms-format.h
f5f3b11c78a8b0eef40c09e1751615a47f516edb - src/nvidia-modeset/include/nvkms-hal.h
ebafc51b2b274cd1818e471850a5efa9618eb17d - src/nvidia-modeset/include/nvkms-prealloc.h
118d0ea84ff81de16fbdc2c7daf249ee5c82ed6e - src/nvidia-modeset/include/nvkms-modepool.h
6e3681d5caa36312804c91630eaaf510eda897d2 - src/nvidia-modeset/include/nvkms-dma.h
1b75646c99c748f9070208eb58f0082812eabbd9 - src/nvidia-modeset/include/nvkms-private.h
412d8028a548e67e9ef85cb7d3f88385e70c56f9 - src/nvidia-modeset/include/nvkms-console-restore.h
6b21a68e254becdd2641bc456f194f54c23abe51 - src/nvidia-modeset/include/nvkms-framelock.h
4a33d410f090fd4f4dfc9a6de285f8e8fb1c9ced - src/nvidia-modeset/include/nvkms-surface.h
c90e4393f568d96bc98cb52a93bfc3fdea10658d - src/nvidia-modeset/include/nvkms-modeset-workarea.h
8c7e0e15c1038fe518e98d8f86fafb250b10a1d2 - src/nvidia-modeset/include/nvkms-stereo.h
fa829f1cd3b73f194f39879c48962b703f640b65 - src/nvidia-modeset/include/nvkms-vrr.h
c869ccfcda419d80b6691d3667c4e9196493065e - src/nvidia-modeset/include/nvkms-modeset-types.h
ec1374d339746b73bc7c7614695fde68c156074a - src/nvidia-modeset/include/nvkms-rm.h
07ac47b52b1b42c143501c4a95a88a3f86f5be03 - src/nvidia-modeset/include/nvkms-hdmi.h
11bae7c491bbb0ba4cad94b645d47c384191fa5c - src/nvidia-modeset/include/nvkms-flip.h
70d9251f331bbf28f5c5bbdf939ebad94db9362d - src/nvidia-modeset/include/nvkms-softfloat.h
cdf54b0d423f94f04d6f33b672c131125c13d260 - src/nvidia-modeset/include/nvkms-hw-flip.h
377dd4a29b2ea5937a9b8fc3fba0c9e4ef92992e - src/nvidia-modeset/include/nvkms-cursor.h
260b6ef87c755e55a803adad4ce49f2d57315f9a - src/nvidia-modeset/include/nvkms-event.h
8a0ced82697c32b97a80fa3366704014879610e7 - src/nvidia-modeset/include/nvkms-flip-workarea.h
b0d407b0413453ec71481f84cc448d090b90d609 - src/nvidia-modeset/include/nvkms-evo3.h
496b94af536dd912866a05f7b2da53050b50c2f5 - src/nvidia-modeset/include/nvkms-prealloc-types.h
35fa1444c57f7adbbddddc612237f3ad38cdd78f - src/nvidia-modeset/include/nvkms-rmapi.h
15dddd9307fa7ac201bd9ebc1e35e6ac0d2cf6c9 - src/nvidia-modeset/include/nvkms-evo.h
b8854261256a801af52d1201081afa9c17486a96 - src/nvidia-modeset/include/nvkms-3dvision.h
c1c7047929aafc849a924c7fa9f8bc206b8e7524 - src/nvidia-modeset/include/g_nvkms-evo-states.h
49af4a8fa95d0e595deacadbca5360f097722e7f - src/nvidia-modeset/include/nvkms-evo1.h
eb5248c4b0b51e7aecd2de87e496253b3b235c70 - src/nvidia-modeset/include/nvkms-utils-flip.h
4a94381bd8c24b09193577d3f05d6d61f178e1cf - src/nvidia-modeset/include/nvkms-ctxdma.h
be6e0e97c1e7ffc0daa2f14ef7b05b9f9c11dc16 - src/nvidia-modeset/include/nvkms-attributes.h
d05ef9a837f2927fe387e7d157ea76c7ef567807 - src/nvidia-modeset/include/nvkms-lut.h
d57ae79509c667e8d16a4756d85e3564c1b1ac34 - src/nvidia-modeset/include/nvkms-modeset.h
ae03509966df56d98fa72b7528ab43ec2b258381 - src/nvidia-modeset/include/nvkms-utils.h
81fcc817dfb8ae1f98b63d2c1acacc303fedb554 - src/nvidia-modeset/include/nvkms-dpy-override.h
fa8dbffe58d345634ab1ea8743ed29c9ec169f36 - src/nvidia-modeset/include/nvkms-dpy.h
691731826d6daa3bb5a3847a3dd2424d513113c4 - src/nvidia-modeset/include/nvkms-types.h
a79cfb74026085b0aa612c0ae6789083e196bbc2 - src/nvidia-modeset/include/nvkms-evo-states.h
a8fbb7a071c0e7b326f384fed7547e7b6ec81c3e - src/nvidia-modeset/include/dp/nvdp-timer.h
4625828efd425e1b29835ab91fcc3d2d85e92389 - src/nvidia-modeset/include/dp/nvdp-connector-event-sink.h
ae43c46687d16b93189047d9eeed933a67e5571f - src/nvidia-modeset/include/dp/nvdp-connector.h
c386632dbdc0e89019d5618f132dbcb3dff4dafb - src/nvidia-modeset/include/dp/nvdp-device.h
bd2e4a6102432d4ac1faf92b5d3db29e9e3cfafc - src/nvidia-modeset/src/nvkms-utils.c
30ad7839985dea46e6b6d43499210a3056da51ad - src/nvidia-modeset/src/nvkms-utils-flip.c
2b304663f2a005b5ccdecfafb69a3407f2feeb18 - src/nvidia-modeset/src/nvkms-evo2.c
fd64ffbcc1efd446fb3352ceaa8bd4221b23a1d2 - src/nvidia-modeset/src/nvkms-modeset.c
3e723edf2a0a2f4f93032feb4aeaaf7fd0acddfa - src/nvidia-modeset/src/g_nvkms-evo-states.c
2fabe1c14116a2b07f24d01710394ee84a6e3914 - src/nvidia-modeset/src/nvkms-3dvision.c
488724910d9a3bf530303a4fa0889983d11ce5c0 - src/nvidia-modeset/src/nvkms-hdmi.c
761c8540278a1ffb9fe4aa0adb1b4ee95524787a - src/nvidia-modeset/src/nvkms-hal.c
54b41301663dc9fdc45d24c7a43ad4a980821f9d - src/nvidia-modeset/src/nvkms-attributes.c
3261fd9a1eb14f7f3fb0917757b1e2704d4abbd2 - src/nvidia-modeset/src/nvkms-hw-states.c
6d41c9f84cc9ce2d16812e94a3fba055b3fc7308 - src/nvidia-modeset/src/nvkms-conf.c
7d0e38f9d79e0c928bdc67276b8ecb0c18470b88 - src/nvidia-modeset/src/nvkms-hw-flip.c
03fb499633c485e0559da79500d4e66ea50e8d8f - src/nvidia-modeset/src/nvkms-framelock.c
05ca4acdfeb9b99eccc7e222846fc688473322ae - src/nvidia-modeset/src/nvkms-rmapi-dgpu.c
65b02b48caff2a9100b8c5614f91d42fb20da9c0 - src/nvidia-modeset/src/nvkms-dpy-override.c
dff88ceaf95239b51b60af915f92e389bb844425 - src/nvidia-modeset/src/nvkms-cursor.c
f754a27436fd1e1fa103de6110224c21ad7ea9f4 - src/nvidia-modeset/src/nvkms-pow.c
4d81c3052a0793d180642e3367b7870863015ef2 - src/nvidia-modeset/src/nvkms-rm.c
9a8746ee4a4e772b8ac13f06dc0de8a250fdb4c7 - src/nvidia-modeset/src/nvkms-ctxdma.c
403e6dbff0a607c2aecf3204c56633bd7b612ae2 - src/nvidia-modeset/src/nvkms-stereo.c
da726d20eea99a96af4c10aace88f419e8ee2a34 - src/nvidia-modeset/src/nvkms-event.c
b890da1d428f30483d6f69e662218f19c074d011 - src/nvidia-modeset/src/nvkms-evo3.c
c799d52bdc792efc377fb5cd307b0eb445c44d6a - src/nvidia-modeset/src/nvkms-cursor2.c
b7232f4b4b8f0d4c395c241c451fc17b6ab84d7f - src/nvidia-modeset/src/nvkms-evo.c
6f2eb25d57d2dc3c1e5db869cfbdf556878d3332 - src/nvidia-modeset/src/nvkms-console-restore.c
94e9c19b7b6a5e56fd46b0885e7dd6fe698fe2df - src/nvidia-modeset/src/nvkms-prealloc.c
bf1b007fceaa1c38771f9e7d1130f9c0c3eddd80 - src/nvidia-modeset/src/nvkms-lut.c
e13960662d872f84dd77f36f778aee0521b4ff54 - src/nvidia-modeset/src/nvkms-modepool.c
b13bd89b5ac60ceab56e9c2398cf7668375ab7ad - src/nvidia-modeset/src/nvkms-flip.c
9fea40b7b55d6ebf3f73b5d469751c873ffbe7c0 - src/nvidia-modeset/src/nvkms-dma.c
df59641109db4529eed62cf156b1815a3e67ba05 - src/nvidia-modeset/src/nvkms-vrr.c
f4a02d5b6cb1fa5d461514b21e13002ad9cfa1a4 - src/nvidia-modeset/src/nvkms-evo1.c
9e4d3e3505a84d8634a2ef2307628a8fe551a4c3 - src/nvidia-modeset/src/nvkms-surface.c
2fa9d9b3cbeeb9406f2dd51a4f4a5d53844a31c9 - src/nvidia-modeset/src/nvkms-dpy.c
a49319a235d8746b771a7c418277e168a291259f - src/nvidia-modeset/src/nvkms.c
6a35b80a6995777dc9500cac9659e6f0f0c12d23 - src/nvidia-modeset/src/nvkms-cursor3.c
a90b2c295271631b4c3abe6afb8dfd92d6b429c8 - src/nvidia-modeset/src/dp/nvdp-connector.cpp
c19775aebdaaaee3500378d47af6ff0b8eb486b8 - src/nvidia-modeset/src/dp/nvdp-device.cpp
51af3c1ee6b74ee0c9add3fb7d50cbc502980789 - src/nvidia-modeset/src/dp/nvdp-evo-interface.hpp
69fed95ab3954dd5cb26590d02cd8ba09cdff1ac - src/nvidia-modeset/src/dp/nvdp-connector-event-sink.hpp
f96cd982b4c05351faa31d04ac30d6fa7c866bcb - src/nvidia-modeset/src/dp/nvdp-timer.cpp
535ce9f743903eb83a341eef1be812f4e4b50887 - src/nvidia-modeset/src/dp/nvdp-evo-interface.cpp
a2a4b7063fa903cc434163ebceb7c8d48f703c33 - src/nvidia-modeset/src/dp/nvdp-connector-event-sink.cpp
6b985fc50b5040ce1a81418bed73a60edb5d3289 - src/nvidia-modeset/src/dp/nvdp-timer.hpp
110ac212ee8832c3fa3c4f45d6d33eed0301e992 - src/nvidia-modeset/src/dp/nvdp-host.cpp
252660f72b80add6f6071dd0b86288dda8dbb168 - src/nvidia-modeset/os-interface/include/nvkms.h
6e4ae13d024a1df676736752df805b6f91511009 - src/nvidia-modeset/os-interface/include/nvidia-modeset-os-interface.h
c3ab6005d7083e90145cac66addf815c4f93d9a0 - src/nvidia-modeset/lib/nvkms-format.c
7e1249c1d187aec5891eabe5bacae2189d33dc55 - src/nvidia-modeset/lib/nvkms-sync.c
b9fd15957f7ae5effeccb5d8adaa7434b43f44e1 - src/common/softfloat/source/s_roundToUI64.c
d0f8f08c225b60d88b6358d344404ba9df3038ec - src/common/softfloat/source/s_normSubnormalF32Sig.c
824383b03952c611154bea0a862da2b9e2a43827 - src/common/softfloat/source/s_subMagsF32.c
729e790328168c64d65a1355e990274c249bbb3a - src/common/softfloat/source/f32_to_i32_r_minMag.c
68843a93e1f46195243ef1164f611b759cf19d17 - src/common/softfloat/source/f32_le_quiet.c
4445b1fbbd507144f038fd939311ff95bc2cf5f1 - src/common/softfloat/source/ui64_to_f64.c
daeb408588738b3eb4c8b092d7f92ac597cf1fc6 - src/common/softfloat/source/f32_rem.c
aaf6ccb77a1a89fa055a0fb63513297b35e2e54b - src/common/softfloat/source/f64_le_quiet.c
0bf499c0e3a54186fa32b38b310cc9d98ccdcfe3 - src/common/softfloat/source/f32_eq.c
6fa7493285fe2f7fdc0ac056a6367e90327905c2 - src/common/softfloat/source/f32_sub.c
54cbeb5872a86e822bda852ec15d3dcdad4511ce - src/common/softfloat/source/f64_add.c
d4b26dc407a891e9ff5324853f1845a99c5d5cd2 - src/common/softfloat/source/f32_to_i32.c
e4930e155580a0f5aa7f3694a6205bc9aebfe7aa - src/common/softfloat/source/f32_to_f64.c
5a5e0d9f1ee7e8c0d1d4f9fbcf6eba330a5f1792 - src/common/softfloat/source/f32_isSignalingNaN.c
ce37cdce572a3b02d42120e81c4969b39d1a67b6 - src/common/softfloat/source/f64_to_i32.c
5e6f9e120a17cc73297a35e4d57e4b9cbce01780 - src/common/softfloat/source/s_mul64To128.c
b22876b0695f58ee56143c9f461f1dde32fefbf3 - src/common/softfloat/source/f64_to_ui64.c
23b76c1d0be64e27a6f7e2ea7b8919f1a45a8e7c - src/common/softfloat/source/f32_to_ui32_r_minMag.c
dde685423af544e5359efdb51b4bf9457c67fa3b - src/common/softfloat/source/f32_sqrt.c
21a6232d93734b01692689258a3fdfbbf4ff089d - src/common/softfloat/source/s_roundToUI32.c
0108fe6f0d394ad72083aff9bb58507f97a0b669 - src/common/softfloat/source/ui32_to_f64.c
871cb1a4037d7b4e73cb20ad18390736eea7ae36 - src/common/softfloat/source/f32_to_ui64_r_minMag.c
84b0a01ba2a667eb28b166d45bd91352ead83e69 - src/common/softfloat/source/i64_to_f32.c
d701741d8d6a92bb890e53deda1b795f5787f465 - src/common/softfloat/source/f64_le.c
1ff879eca2a273293b5cd6048419b2d2d8063b93 - src/common/softfloat/source/f64_mulAdd.c
00c612847b3bd227a006a4a2697df85866b80315 - src/common/softfloat/source/s_mulAddF32.c
da3b3f94a817909a3dc93ca5fa7675805c7979e0 - src/common/softfloat/source/f64_isSignalingNaN.c
bc992c88f3de09e3a82447cf06dbde7c6604f7f8 - src/common/softfloat/source/f64_to_f32.c
c29536f617d71fe30accac44b2f1df61c98a97dc - src/common/softfloat/source/f64_div.c
50b3147f8413f0595a4c3d6e6eeab84c1ffecada - src/common/softfloat/source/s_normRoundPackToF32.c
1484fc96d7731695bda674e99947280a86990997 - src/common/softfloat/source/f32_to_i64.c
b8c5ccc1e511637d8b2ba2657de4937b80c01c07 - src/common/softfloat/source/f32_le.c
6f83fa864007e8227ae09bb36a7fdc18832d4445 - src/common/softfloat/source/f32_mul.c
00ab2120f71117161d4f6daaa9b90a3036a99841 - src/common/softfloat/source/f32_to_ui32.c
86fdc2472526375539216461732d1db6a9f85b55 - src/common/softfloat/source/s_roundPackToF32.c
38bd00e9c4d2f1354c611404cca6209a6c417669 - src/common/softfloat/source/s_countLeadingZeros64.c
2960704c290f29aae36b8fe006884d5c4abcabb4 - src/common/softfloat/source/f32_div.c
fd40a71c7ebf9d632a384fadf9487cfef4f3ea98 - src/common/softfloat/source/s_shiftRightJam128.c
c3ce12c227d25bc0de48fbcf914fc208e2448741 - src/common/softfloat/source/f64_sub.c
29396b7c23941024a59d5ea06698d2fbc7e1a6ca - src/common/softfloat/source/f64_to_i64.c
5c4ee32cc78efc718aaa60ec31d0b00b1bee3c2c - src/common/softfloat/source/f64_to_ui64_r_minMag.c
c951c9dffa123e4f77ed235eca49ef9b67f9f3d2 - src/common/softfloat/source/s_subMagsF64.c
d19ff7dfece53875f2d6c6f7dd9e7772f7b0b7ec - src/common/softfloat/source/f32_to_i64_r_minMag.c
dafa667ee5dd52c97fc0c3b7144f6b619406c225 - src/common/softfloat/source/s_mulAddF64.c
ab19c6b50c40b8089cb915226d4553d1aa902b0e - src/common/softfloat/source/f64_to_i32_r_minMag.c
2e0fec421f4defd293cf55c5f3af7d91f4b7d2cc - src/common/softfloat/source/ui64_to_f32.c
fe06512577e642b09196d46430d038d027491e9f - src/common/softfloat/source/f32_eq_signaling.c
e7890082ce426d88b4ec93893da32e306478c0d1 - src/common/softfloat/source/s_approxRecipSqrt32_1.c
296c40b0589536cb9af3231ad3dcd7f2baaa6887 - src/common/softfloat/source/f64_lt.c
fb062ecbe62a1f5878fd47f0c61490f2bde279dd - src/common/softfloat/source/s_roundToI32.c
ec1a797b11f6e846928a4a49a8756f288bda1dfa - src/common/softfloat/source/i32_to_f64.c
0e9694d551848d88531f5461a9b3b91611652e9a - src/common/softfloat/source/f64_to_ui32_r_minMag.c
a94c8c2bd74633027e52e96f41d24714d8081eb4 - src/common/softfloat/source/s_approxRecipSqrt_1Ks.c
baa7af4eea226140c26ffe6ab02a863d07f729fb - src/common/softfloat/source/f64_eq_signaling.c
f6d98979ab2d1e2b0d664333104130af6abbcad5 - src/common/softfloat/source/f64_to_i64_r_minMag.c
5c1026617c588bcf5f1e59230bd5bb900600b9ac - src/common/softfloat/source/f64_mul.c
0d8e42636a3409a647291fdb388001c2b11bba07 - src/common/softfloat/source/f32_to_f16.c
9f4d355d85fbe998e243fe4c7bbf8ad23062b6e2 - src/common/softfloat/source/i64_to_f64.c
d9a86343e6cc75714f65f690082dd4b0ba724be9 - src/common/softfloat/source/s_roundPackToF16.c
1a86a6948bf6768bd23a19f1f05d40968c1d2b15 - src/common/softfloat/source/f64_rem.c
e0ad81cfb5d2c0e74dc4ece9518ca15ffc77beaf - src/common/softfloat/source/f32_roundToInt.c
50daf9186bc5d0180d1453c957164b136d5ffc89 - src/common/softfloat/source/f64_eq.c
2db07bbb8242bc55a24ef483af6d648db0660de0 - src/common/softfloat/source/f32_add.c
760fd7c257a1f915b61a1089b2acb143c18a082e - src/common/softfloat/source/s_addMagsF64.c
4b37be398b3e73ae59245f03b2ba2394fc902b4d - src/common/softfloat/source/s_normSubnormalF64Sig.c
69dc4cc63b2a9873a6eb636ee7cb704cbd502001 - src/common/softfloat/source/f64_to_ui32.c
9266c83f3e50093cc45d7be6ab993a0e72af1685 - src/common/softfloat/source/s_roundPackToF64.c
7c8e5ab3f9bf6b2764ce5fffe80b2674be566a12 - src/common/softfloat/source/softfloat_state.c
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3db5bcbcae4063f2356ec76924b4bcc1d0df1a05 - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080ecc.h
55cee85b56cb6ed5d017bab55c40cc8799789c8b - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080nvd.h
66aa4e08f838e1f87e4babacb42d3d59cb6837ff - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080pmu.h
42dc8204c0f6da47c5f741344032fc02702cfac5 - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080ucodefuzzer.h
59254e4bdc475b70cfd0b445ef496f27c20faab0 - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080cipher.h
93a9fa93eb3d1099991e4682b6228124220ca293 - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080fla.h
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4f31fe752e050953a0f87d04063dc152bba261fe - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080clk.h
01a6a431e8aeffeec97755009b4e9575bdf0de7b - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080mc.h
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5c7b955ef5e6f6ca9c0944e8a2b2c4a1ae760e04 - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080spi.h
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4fa54b01cd70c3ca3b5cac93bade62dd09641b97 - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080vgpumgrinternal.h
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6c467ece3508071c2b3a296afffedd592726f8de - src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080bus.h
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67a911b3177b75243e2fceef821ebcfd3668235e - src/common/sdk/nvidia/inc/ctrl/ctrl208f/ctrl208fgpu.h
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1b594c39d1439c3d1ecc24c4325b2ea8c2724548 - src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000syncgpuboost.h
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1feab39692ea8796ac7675f4780dfd51e6e16326 - src/nvidia/kernel/inc/objtmr.h
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0b2233e5cb68257231dd94310559bc09635c8279 - src/nvidia/generated/g_generic_engine_nvoc.c
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3b0e038829647cfe0d8807579db33416a420d1d2 - src/nvidia/generated/g_chips2halspec.h
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0e15fddc0426c42f3d22e5cb5609b5193adb7145 - src/nvidia/generated/g_standard_mem_nvoc.h
0a6b27d74e5e4ba872d77bfd369ddb5772abd8f8 - src/nvidia/generated/g_event_buffer_nvoc.h
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9c03069f964e4d628b68a4ab0cff3b44aee82bdd - src/nvidia/generated/g_rpc-structures.h
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ec550cba2bebff2c5054b6e12fc43d81e37ade48 - kernel-open/nvidia-drm/nvidia-dma-fence-helper.h
8a8b431f45bd0fe477759c1527d792cb9a1fa3f5 - kernel-open/nvidia-drm/nvidia-drm-gem.h
79bcf373ff7d728740716acde5e2d44e924efefa - kernel-open/nvidia-drm/nvidia-drm-gem-nvkms-memory.c
734f8ad9fbbe2e07b7d8c38455f66be9f75de127 - kernel-open/nvidia-drm/nvidia-drm-crtc.c
6528efa1f8061678b8543c5c0be8761cab860858 - kernel-open/nvidia-drm/nvidia-drm-modeset.h
b91df730fba3c2f9401321557bb1bc2e64bbf980 - kernel-open/nvidia-drm/nvidia-drm-connector.h
eca70b3b8146903ec678a60eebb0462e6ccf4569 - kernel-open/nvidia-drm/nvidia-drm-encoder.h
efeac7919ce5bbdab479fe5489e9ea84d2cee0a2 - kernel-open/nvidia-drm/nvidia-drm.Kbuild
4b68b6cb0f98116376be36733f5ae60eec85d78d - kernel-open/nvidia-drm/nvidia-drm-ioctl.h
61c61f91d1a29d6f7794a67eac337152b58aaac0 - kernel-open/nvidia-drm/nvidia-drm-connector.c
fe9132110f104ff7ebba922ce6dd66a2d08a998d - kernel-open/nvidia-drm/nvidia-drm-modeset.c
2eba218d75f3802d7bab34d0dd6320f872b2d604 - kernel-open/nvidia-drm/nvidia-drm-gem-nvkms-memory.h
9a882b31b2acc9e1ad3909c0061eee536e648aae - kernel-open/nvidia-drm/nvidia-drm-drv.h

Change-Id: I4c402d345459fbad7b568857262f5190b68f4ead
2023-12-05 20:47:41 -08:00
48 changed files with 1348 additions and 3238 deletions

View File

@@ -1,7 +1,7 @@
# NVIDIA Linux Open GPU Kernel Module Source
This is the source release of the NVIDIA Linux open GPU kernel modules,
version 540.3.2.
version 540.2.0.
## How to Build
@@ -17,7 +17,7 @@ as root:
Note that the kernel modules built here must be used with GSP
firmware and user-space NVIDIA GPU driver components from a corresponding
540.3.2 driver release. This can be achieved by installing
540.2.0 driver release. This can be achieved by installing
the NVIDIA GPU driver from the .run file using the `--no-kernel-modules`
option. E.g.,
@@ -180,7 +180,7 @@ software applications.
## Compatible GPUs
The open-gpu-kernel-modules can be used on any Turing or later GPU
(see the table below). However, in the 540.3.2 release,
(see the table below). However, in the 540.2.0 release,
GeForce and Workstation support is still considered alpha-quality.
To enable use of the open kernel modules on GeForce and Workstation GPUs,
@@ -188,7 +188,7 @@ set the "NVreg_OpenRmEnableUnsupportedGpus" nvidia.ko kernel module
parameter to 1. For more details, see the NVIDIA GPU driver end user
README here:
https://us.download.nvidia.com/XFree86/Linux-x86_64/540.3.2/README/kernel_open.html
https://us.download.nvidia.com/XFree86/Linux-x86_64/540.2.0/README/kernel_open.html
In the below table, if three IDs are listed, the first is the PCI Device
ID, the second is the PCI Subsystem Vendor ID, and the third is the PCI

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File diff suppressed because it is too large Load Diff

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@@ -72,7 +72,7 @@ EXTRA_CFLAGS += -I$(src)/common/inc
EXTRA_CFLAGS += -I$(src)
EXTRA_CFLAGS += -Wall $(DEFINES) $(INCLUDES) -Wno-cast-qual -Wno-error -Wno-format-extra-args
EXTRA_CFLAGS += -D__KERNEL__ -DMODULE -DNVRM
EXTRA_CFLAGS += -DNV_VERSION_STRING=\"540.3.2\"
EXTRA_CFLAGS += -DNV_VERSION_STRING=\"540.2.0\"
ifneq ($(SYSSRCHOST1X),)
EXTRA_CFLAGS += -I$(SYSSRCHOST1X)
@@ -290,7 +290,6 @@ NV_HEADER_PRESENCE_TESTS = \
linux/of_platform.h \
linux/of_device.h \
linux/of_gpio.h \
linux/of_clk.h \
linux/gpio.h \
linux/gpio/consumer.h \
linux/interconnect.h \

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2016-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2016-2017 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -36,21 +36,12 @@ typedef int vm_fault_t;
* pin_user_pages() was added by commit eddb1c228f7951d399240
* ("mm/gup: introduce pin_user_pages*() and FOLL_PIN") in v5.6-rc1 (2020-01-30)
*
* Removed vmas parameter from pin_user_pages() by commit 40896a02751
* ("mm/gup: remove vmas parameter from pin_user_pages()")
* in linux-next, expected in v6.5-rc1 (2023-05-17)
*
*/
#include <linux/mm.h>
#include <linux/sched.h>
#if defined(NV_PIN_USER_PAGES_PRESENT)
#if defined(NV_PIN_USER_PAGES_HAS_ARGS_VMAS)
#define NV_PIN_USER_PAGES pin_user_pages
#else
#define NV_PIN_USER_PAGES(start, nr_pages, gup_flags, pages, vmas) \
pin_user_pages(start, nr_pages, gup_flags, pages)
#endif // NV_PIN_USER_PAGES_HAS_ARGS_VMAS
#define NV_PIN_USER_PAGES pin_user_pages
#define NV_UNPIN_USER_PAGE unpin_user_page
#else
#define NV_PIN_USER_PAGES NV_GET_USER_PAGES
@@ -73,18 +64,11 @@ typedef int vm_fault_t;
* commit 8e50b8b07f462ab4b91bc1491b1c91bd75e4ad40 which cherry-picked the
* replacement of the write and force parameters with gup_flags
*
* Removed vmas parameter from get_user_pages() by commit 7bbf9c8c99
* ("mm/gup: remove unused vmas parameter from get_user_pages()")
* in linux-next, expected in v6.5-rc1 (2023-05-17)
*
*/
#if defined(NV_GET_USER_PAGES_HAS_ARGS_FLAGS)
#define NV_GET_USER_PAGES(start, nr_pages, flags, pages, vmas) \
get_user_pages(start, nr_pages, flags, pages)
#elif defined(NV_GET_USER_PAGES_HAS_ARGS_FLAGS_VMAS)
#define NV_GET_USER_PAGES get_user_pages
#elif defined(NV_GET_USER_PAGES_HAS_ARGS_TSK_FLAGS_VMAS)
#elif defined(NV_GET_USER_PAGES_HAS_ARGS_TSK_FLAGS)
#define NV_GET_USER_PAGES(start, nr_pages, flags, pages, vmas) \
get_user_pages(current, current->mm, start, nr_pages, flags, pages, vmas)
#else
@@ -97,13 +81,13 @@ typedef int vm_fault_t;
int write = flags & FOLL_WRITE;
int force = flags & FOLL_FORCE;
#if defined(NV_GET_USER_PAGES_HAS_ARGS_WRITE_FORCE_VMAS)
#if defined(NV_GET_USER_PAGES_HAS_ARGS_WRITE_FORCE)
return get_user_pages(start, nr_pages, write, force, pages, vmas);
#else
// NV_GET_USER_PAGES_HAS_ARGS_TSK_WRITE_FORCE_VMAS
// NV_GET_USER_PAGES_HAS_ARGS_TSK_WRITE_FORCE
return get_user_pages(current, current->mm, start, nr_pages, write,
force, pages, vmas);
#endif // NV_GET_USER_PAGES_HAS_ARGS_WRITE_FORCE_VMAS
#endif // NV_GET_USER_PAGES_HAS_ARGS_WRITE_FORCE
}
#endif // NV_GET_USER_PAGES_HAS_ARGS_FLAGS
@@ -116,22 +100,15 @@ typedef int vm_fault_t;
* 64019a2e467a ("mm/gup: remove task_struct pointer for all gup code")
* in v5.9-rc1 (2020-08-11). *
*
* Removed unused vmas parameter from pin_user_pages_remote() by commit
* 83bcc2e132("mm/gup: remove unused vmas parameter from pin_user_pages_remote()")
* in linux-next, expected in v6.5-rc1 (2023-05-14)
*
*/
#if defined(NV_PIN_USER_PAGES_REMOTE_PRESENT)
#if defined(NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_TSK_VMAS)
#if defined (NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_TSK)
#define NV_PIN_USER_PAGES_REMOTE(mm, start, nr_pages, flags, pages, vmas, locked) \
pin_user_pages_remote(NULL, mm, start, nr_pages, flags, pages, vmas, locked)
#elif defined(NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_VMAS)
#define NV_PIN_USER_PAGES_REMOTE pin_user_pages_remote
#else
#define NV_PIN_USER_PAGES_REMOTE(mm, start, nr_pages, flags, pages, vmas, locked) \
pin_user_pages_remote(mm, start, nr_pages, flags, pages, locked)
#endif // NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_TSK_VMAS
#define NV_PIN_USER_PAGES_REMOTE pin_user_pages_remote
#endif // NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_TSK
#else
#define NV_PIN_USER_PAGES_REMOTE NV_GET_USER_PAGES_REMOTE
#endif // NV_PIN_USER_PAGES_REMOTE_PRESENT
@@ -158,30 +135,22 @@ typedef int vm_fault_t;
* commit 64019a2e467a ("mm/gup: remove task_struct pointer for
* all gup code") in v5.9-rc1 (2020-08-11).
*
* Removed vmas parameter from get_user_pages_remote() by commit a4bde14d549
* ("mm/gup: remove vmas parameter from get_user_pages_remote()")
* in linux-next, expected in v6.5-rc1 (2023-05-14)
*
*/
#if defined(NV_GET_USER_PAGES_REMOTE_PRESENT)
#if defined(NV_GET_USER_PAGES_REMOTE_HAS_ARGS_FLAGS_LOCKED)
#define NV_GET_USER_PAGES_REMOTE(mm, start, nr_pages, flags, pages, vmas, locked) \
get_user_pages_remote(mm, start, nr_pages, flags, pages, locked)
#elif defined(NV_GET_USER_PAGES_REMOTE_HAS_ARGS_FLAGS_LOCKED_VMAS)
#define NV_GET_USER_PAGES_REMOTE get_user_pages_remote
#elif defined(NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS_LOCKED_VMAS)
#elif defined(NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS_LOCKED)
#define NV_GET_USER_PAGES_REMOTE(mm, start, nr_pages, flags, pages, vmas, locked) \
get_user_pages_remote(NULL, mm, start, nr_pages, flags, pages, vmas, locked)
#elif defined(NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS_VMAS)
#elif defined(NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS)
#define NV_GET_USER_PAGES_REMOTE(mm, start, nr_pages, flags, pages, vmas, locked) \
get_user_pages_remote(NULL, mm, start, nr_pages, flags, pages, vmas)
#else
// NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_WRITE_FORCE_VMAS
// NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_WRITE_FORCE
static inline long NV_GET_USER_PAGES_REMOTE(struct mm_struct *mm,
unsigned long start,
unsigned long nr_pages,
@@ -198,7 +167,7 @@ typedef int vm_fault_t;
}
#endif // NV_GET_USER_PAGES_REMOTE_HAS_ARGS_FLAGS_LOCKED
#else
#if defined(NV_GET_USER_PAGES_HAS_ARGS_TSK_WRITE_FORCE_VMAS)
#if defined(NV_GET_USER_PAGES_HAS_ARGS_TSK_WRITE_FORCE)
static inline long NV_GET_USER_PAGES_REMOTE(struct mm_struct *mm,
unsigned long start,
unsigned long nr_pages,
@@ -216,7 +185,7 @@ typedef int vm_fault_t;
#else
#define NV_GET_USER_PAGES_REMOTE(mm, start, nr_pages, flags, pages, vmas, locked) \
get_user_pages(NULL, mm, start, nr_pages, flags, pages, vmas)
#endif // NV_GET_USER_PAGES_HAS_ARGS_TSK_WRITE_FORCE_VMAS
#endif // NV_GET_USER_PAGES_HAS_ARGS_TSK_WRITE_FORCE
#endif // NV_GET_USER_PAGES_REMOTE_PRESENT
/*

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2019-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -35,6 +35,6 @@ int nv_platform_count_devices(void);
int nv_soc_register_irqs(nv_state_t *nv);
void nv_soc_free_irqs(nv_state_t *nv);
int nv_disable_simplefb_clocks(void);
int nv_remove_conflicting_framebuffers(void);
#endif

View File

@@ -1652,22 +1652,6 @@ compile_test() {
fi
;;
of_clk_get_parent_count)
#
# Determine if the of_clk_get_parent_count function is present.
#
CODE="
#if defined(NV_LINUX_OF_CLK_H_PRESENT)
#include <linux/of_clk.h>
#endif
void conftest_of_clk_get_parent_count(void)
{
of_clk_get_parent_count();
}
"
compile_check_conftest "$CODE" "NV_OF_CLK_GET_PARENT_COUNT_PRESENT" "" "functions"
;;
of_node_to_nid)
#
# Determine if of_node_to_nid is present
@@ -2482,10 +2466,6 @@ compile_test() {
# commit 768ae309a961 ("mm: replace get_user_pages() write/force
# parameters with gup_flags") in v4.9 (2016-10-13)
#
# Removed vmas parameter from get_user_pages() by commit 7bbf9c8c99
# ("mm/gup: remove unused vmas parameter from get_user_pages()")
# in linux-next, expected in v6.5-rc1
#
# linux-4.4.168 cherry-picked commit 768ae309a961 without
# c12d2da56d0e which is covered in Conftest #3.
#
@@ -2495,28 +2475,22 @@ compile_test() {
# passing conftest's
#
set_get_user_pages_defines () {
if [ "$1" = "NV_GET_USER_PAGES_HAS_ARGS_WRITE_FORCE_VMAS" ]; then
echo "#define NV_GET_USER_PAGES_HAS_ARGS_WRITE_FORCE_VMAS" | append_conftest "functions"
if [ "$1" = "NV_GET_USER_PAGES_HAS_ARGS_WRITE_FORCE" ]; then
echo "#define NV_GET_USER_PAGES_HAS_ARGS_WRITE_FORCE" | append_conftest "functions"
else
echo "#undef NV_GET_USER_PAGES_HAS_ARGS_WRITE_FORCE_VMAS" | append_conftest "functions"
echo "#undef NV_GET_USER_PAGES_HAS_ARGS_WRITE_FORCE" | append_conftest "functions"
fi
if [ "$1" = "NV_GET_USER_PAGES_HAS_ARGS_TSK_WRITE_FORCE_VMAS" ]; then
echo "#define NV_GET_USER_PAGES_HAS_ARGS_TSK_WRITE_FORCE_VMAS" | append_conftest "functions"
if [ "$1" = "NV_GET_USER_PAGES_HAS_ARGS_TSK_WRITE_FORCE" ]; then
echo "#define NV_GET_USER_PAGES_HAS_ARGS_TSK_WRITE_FORCE" | append_conftest "functions"
else
echo "#undef NV_GET_USER_PAGES_HAS_ARGS_TSK_WRITE_FORCE_VMAS" | append_conftest "functions"
echo "#undef NV_GET_USER_PAGES_HAS_ARGS_TSK_WRITE_FORCE" | append_conftest "functions"
fi
if [ "$1" = "NV_GET_USER_PAGES_HAS_ARGS_TSK_FLAGS_VMAS" ]; then
echo "#define NV_GET_USER_PAGES_HAS_ARGS_TSK_FLAGS_VMAS" | append_conftest "functions"
if [ "$1" = "NV_GET_USER_PAGES_HAS_ARGS_TSK_FLAGS" ]; then
echo "#define NV_GET_USER_PAGES_HAS_ARGS_TSK_FLAGS" | append_conftest "functions"
else
echo "#undef NV_GET_USER_PAGES_HAS_ARGS_TSK_FLAGS_VMAS" | append_conftest "functions"
fi
if [ "$1" = "NV_GET_USER_PAGES_HAS_ARGS_FLAGS_VMAS" ]; then
echo "#define NV_GET_USER_PAGES_HAS_ARGS_FLAGS_VMAS" | append_conftest "functions"
else
echo "#undef NV_GET_USER_PAGES_HAS_ARGS_FLAGS_VMAS" | append_conftest "functions"
echo "#undef NV_GET_USER_PAGES_HAS_ARGS_TSK_FLAGS" | append_conftest "functions"
fi
if [ "$1" = "NV_GET_USER_PAGES_HAS_ARGS_FLAGS" ]; then
@@ -2524,7 +2498,6 @@ compile_test() {
else
echo "#undef NV_GET_USER_PAGES_HAS_ARGS_FLAGS" | append_conftest "functions"
fi
}
# Conftest #1: Check if get_user_pages accepts 6 arguments.
@@ -2545,15 +2518,14 @@ compile_test() {
$CC $CFLAGS -c conftest$$.c > /dev/null 2>&1
rm -f conftest$$.c
if [ -f conftest$$.o ]; then
set_get_user_pages_defines "NV_GET_USER_PAGES_HAS_ARGS_WRITE_FORCE_VMAS"
set_get_user_pages_defines "NV_GET_USER_PAGES_HAS_ARGS_WRITE_FORCE"
rm -f conftest$$.o
return
fi
# Conftest #2: Check if get_user_pages has gup_flags instead of
# write and force parameters. And that gup doesn't accept a
# task_struct and mm_struct as its first arguments. get_user_pages
# has vm_area_struct as its last argument.
# task_struct and mm_struct as its first arguments.
# Return if available.
# Fall through to conftest #3 on failure.
@@ -2571,17 +2543,16 @@ compile_test() {
rm -f conftest$$.c
if [ -f conftest$$.o ]; then
set_get_user_pages_defines "NV_GET_USER_PAGES_HAS_ARGS_FLAGS_VMAS"
set_get_user_pages_defines "NV_GET_USER_PAGES_HAS_ARGS_FLAGS"
rm -f conftest$$.o
return
fi
# Conftest #3: Check if get_user_pages has gup_flags instead of
# write and force parameters. The gup has task_struct and
# mm_struct as its first arguments. get_user_pages
# has vm_area_struct as its last argument.
# write and force parameters AND that gup has task_struct and
# mm_struct as its first arguments.
# Return if available.
# Fall through to conftest #4 on failure.
# Fall through to default case if absent.
echo "$CONFTEST_PREAMBLE
#include <linux/mm.h>
@@ -2599,35 +2570,12 @@ compile_test() {
rm -f conftest$$.c
if [ -f conftest$$.o ]; then
set_get_user_pages_defines "NV_GET_USER_PAGES_HAS_ARGS_TSK_FLAGS_VMAS"
set_get_user_pages_defines "NV_GET_USER_PAGES_HAS_ARGS_TSK_FLAGS"
rm -f conftest$$.o
return
fi
# Conftest #4: gup doesn't accept a task_struct and mm_struct as
# its first arguments. check if get_user_pages() does not take
# vmas argument.
# Fall through to default case otherwise.
echo "$CONFTEST_PREAMBLE
#include <linux/mm.h>
long get_user_pages(unsigned long start,
unsigned long nr_pages,
unsigned int gup_flags,
struct page **pages) {
return 0;
}" > conftest$$.c
$CC $CFLAGS -c conftest$$.c > /dev/null 2>&1
rm -f conftest$$.c
if [ -f conftest$$.o ]; then
set_get_user_pages_defines "NV_GET_USER_PAGES_HAS_ARGS_FLAGS"
rm -f conftest$$.o
return
fi
set_get_user_pages_defines "NV_GET_USER_PAGES_HAS_ARGS_TSK_WRITE_FORCE_VMAS"
set_get_user_pages_defines "NV_GET_USER_PAGES_HAS_ARGS_TSK_WRITE_FORCE"
return
;;
@@ -2654,10 +2602,6 @@ compile_test() {
# commit 64019a2e467a ("mm/gup: remove task_struct pointer for
# all gup code") in v5.9-rc1 (2020-08-11).
#
# Removed vmas parameter from get_user_pages_remote() by commit
# a4bde14d549 ("mm/gup: remove vmas parameter from get_user_pages_remote()")
# in linux-next, expected in v6.5-rc1
#
#
# This function sets the NV_GET_USER_PAGES_REMOTE_* macros as per
@@ -2670,28 +2614,22 @@ compile_test() {
echo "#define NV_GET_USER_PAGES_REMOTE_PRESENT" | append_conftest "functions"
fi
if [ "$1" = "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_WRITE_FORCE_VMAS" ]; then
echo "#define NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_WRITE_FORCE_VMAS" | append_conftest "functions"
if [ "$1" = "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_WRITE_FORCE" ]; then
echo "#define NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_WRITE_FORCE" | append_conftest "functions"
else
echo "#undef NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_WRITE_FORCE_VMAS" | append_conftest "functions"
echo "#undef NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_WRITE_FORCE" | append_conftest "functions"
fi
if [ "$1" = "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS_VMAS" ]; then
echo "#define NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS_VMAS" | append_conftest "functions"
if [ "$1" = "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS" ]; then
echo "#define NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS" | append_conftest "functions"
else
echo "#undef NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS_VMAS" | append_conftest "functions"
echo "#undef NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS" | append_conftest "functions"
fi
if [ "$1" = "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS_LOCKED_VMAS" ]; then
echo "#define NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS_LOCKED_VMAS" | append_conftest "functions"
if [ "$1" = "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS_LOCKED" ]; then
echo "#define NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS_LOCKED" | append_conftest "functions"
else
echo "#undef NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS_LOCKED_VMAS" | append_conftest "functions"
fi
if [ "$1" = "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_FLAGS_LOCKED_VMAS" ]; then
echo "#define NV_GET_USER_PAGES_REMOTE_HAS_ARGS_FLAGS_LOCKED_VMAS" | append_conftest "functions"
else
echo "#undef NV_GET_USER_PAGES_REMOTE_HAS_ARGS_FLAGS_LOCKED_VMAS" | append_conftest "functions"
echo "#undef NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS_LOCKED" | append_conftest "functions"
fi
if [ "$1" = "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_FLAGS_LOCKED" ]; then
@@ -2699,7 +2637,6 @@ compile_test() {
else
echo "#undef NV_GET_USER_PAGES_REMOTE_HAS_ARGS_FLAGS_LOCKED" | append_conftest "functions"
fi
}
# conftest #1: check if get_user_pages_remote() is available
@@ -2722,8 +2659,8 @@ compile_test() {
fi
#
# conftest #2: check if get_user_pages_remote() has write, force
# and vmas arguments. Return if these arguments are present
# conftest #2: check if get_user_pages_remote() has write and
# force arguments. Return if these arguments are present
# Fall through to conftest #3 if these args are absent.
#
echo "$CONFTEST_PREAMBLE
@@ -2743,14 +2680,14 @@ compile_test() {
rm -f conftest$$.c
if [ -f conftest$$.o ]; then
set_get_user_pages_remote_defines "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_WRITE_FORCE_VMAS"
set_get_user_pages_remote_defines "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_WRITE_FORCE"
rm -f conftest$$.o
return
fi
#
# conftest #3: check if get_user_pages_remote() has gpu_flags and
# vmas arguments. Return if these arguments are present
# conftest #3: check if get_user_pages_remote() has gpu_flags
# arguments. Return if these arguments are present
# Fall through to conftest #4 if these args are absent.
#
echo "$CONFTEST_PREAMBLE
@@ -2769,14 +2706,13 @@ compile_test() {
rm -f conftest$$.c
if [ -f conftest$$.o ]; then
set_get_user_pages_remote_defines "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS_VMAS"
set_get_user_pages_remote_defines "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS"
rm -f conftest$$.o
return
fi
#
# conftest #4: check if get_user_pages_remote() has locked and
# vmas argument
# conftest #4: check if get_user_pages_remote() has locked argument
# Return if these arguments are present. Fall through to conftest #5
# if these args are absent.
#
@@ -2797,7 +2733,7 @@ compile_test() {
rm -f conftest$$.c
if [ -f conftest$$.o ]; then
set_get_user_pages_remote_defines "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS_LOCKED_VMAS"
set_get_user_pages_remote_defines "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS_LOCKED"
rm -f conftest$$.o
return
fi
@@ -2821,34 +2757,10 @@ compile_test() {
$CC $CFLAGS -c conftest$$.c > /dev/null 2>&1
rm -f conftest$$.c
if [ -f conftest$$.o ]; then
set_get_user_pages_remote_defines "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_FLAGS_LOCKED_VMAS"
rm -f conftest$$.o
fi
#
# conftest #6: check if get_user_pages_remote() does not take
# vmas argument.
#
echo "$CONFTEST_PREAMBLE
#include <linux/mm.h>
long get_user_pages_remote(struct mm_struct *mm,
unsigned long start,
unsigned long nr_pages,
unsigned int gup_flags,
struct page **pages,
int *locked) {
return 0;
}" > conftest$$.c
$CC $CFLAGS -c conftest$$.c > /dev/null 2>&1
rm -f conftest$$.c
if [ -f conftest$$.o ]; then
set_get_user_pages_remote_defines "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_FLAGS_LOCKED"
rm -f conftest$$.o
fi
;;
pin_user_pages)
@@ -2860,65 +2772,17 @@ compile_test() {
# pin_user_pages() was added by commit eddb1c228f7951d399240
# ("mm/gup: introduce pin_user_pages*() and FOLL_PIN") in
# v5.6-rc1 (2020-01-30)
#
# Removed vmas parameter from pin_user_pages() by commit
# 40896a02751("mm/gup: remove vmas parameter from pin_user_pages()")
# in linux-next, expected in v6.5-rc1
set_pin_user_pages_defines () {
if [ "$1" = "" ]; then
echo "#undef NV_PIN_USER_PAGES_PRESENT" | append_conftest "functions"
else
echo "#define NV_PIN_USER_PAGES_PRESENT" | append_conftest "functions"
fi
if [ "$1" = "NV_PIN_USER_PAGES_HAS_ARGS_VMAS" ]; then
echo "#define NV_PIN_USER_PAGES_HAS_ARGS_VMAS" | append_conftest "functions"
else
echo "#undef NV_PIN_USER_PAGES_HAS_ARGS_VMAS" | append_conftest "functions"
fi
}
# conftest #1: check if pin_user_pages() is available
# return if not available.
# Fall through to conftest #2 if it is present
#
echo "$CONFTEST_PREAMBLE
CODE="
#include <linux/mm.h>
void conftest_pin_user_pages(void) {
pin_user_pages();
}" > conftest$$.c
}"
$CC $CFLAGS -c conftest$$.c > /dev/null 2>&1
rm -f conftest$$.c
if [ -f conftest$$.o ]; then
set_pin_user_pages_defines ""
rm -f conftest$$.o
return
fi
# conftest #2: Check if pin_user_pages() has vmas argument
echo "$CONFTEST_PREAMBLE
#include <linux/mm.h>
long pin_user_pages(unsigned long start,
unsigned long nr_pages,
unsigned int gup_flags,
struct page **pages,
struct vm_area_struct **vmas) {
return 0;
}" > conftest$$.c
$CC $CFLAGS -c conftest$$.c > /dev/null 2>&1
rm -f conftest$$.c
if [ -f conftest$$.o ]; then
set_pin_user_pages_defines "NV_PIN_USER_PAGES_HAS_ARGS_VMAS"
rm -f conftest$$.o
else
set_pin_user_pages_defines "NV_PIN_USER_PAGES_PRESENT"
fi
compile_check_conftest "$CODE" "NV_PIN_USER_PAGES_PRESENT" "" "functions"
;;
pin_user_pages_remote)
@@ -2931,10 +2795,6 @@ compile_test() {
# pin_user_pages_remote() removed 'tsk' parameter by
# commit 64019a2e467a ("mm/gup: remove task_struct pointer for
# all gup code") in v5.9-rc1 (2020-08-11).
#
# Removed unused vmas parameter from pin_user_pages_remote() by
# commit 83bcc2e132 ("mm/gup: remove unused vmas parameter from
# pin_user_pages_remote()") in linux-next, expected in v6.5-rc1
#
# This function sets the NV_PIN_USER_PAGES_REMOTE_* macros as per
@@ -2947,16 +2807,10 @@ compile_test() {
echo "#define NV_PIN_USER_PAGES_REMOTE_PRESENT" | append_conftest "functions"
fi
if [ "$1" = "NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_TSK_VMAS" ]; then
echo "#define NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_TSK_VMAS" | append_conftest "functions"
if [ "$1" = "NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_TSK" ]; then
echo "#define NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_TSK" | append_conftest "functions"
else
echo "#undef NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_TSK_VMAS" | append_conftest "functions"
fi
if [ "$1" = "NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_VMAS" ]; then
echo "#define NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_VMAS" | append_conftest "functions"
else
echo "#undef NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_VMAS" | append_conftest "functions"
echo "#undef NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_TSK" | append_conftest "functions"
fi
}
@@ -2979,11 +2833,7 @@ compile_test() {
return
fi
# conftest #2: Check if pin_user_pages_remote() has tsk and
# vmas argument
# Return if these arguments are present else fall through to
# conftest #3
# conftest #2: Check if pin_user_pages_remote() has tsk argument
echo "$CONFTEST_PREAMBLE
#include <linux/mm.h>
long pin_user_pages_remote(struct task_struct *tsk,
@@ -3001,34 +2851,11 @@ compile_test() {
rm -f conftest$$.c
if [ -f conftest$$.o ]; then
set_pin_user_pages_remote_defines "NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_TSK_VMAS"
rm -f conftest$$.o
return
fi
# conftest #3: Check if pin_user_pages_remote() has vmas argument
echo "$CONFTEST_PREAMBLE
#include <linux/mm.h>
long pin_user_pages_remote(struct mm_struct *mm,
unsigned long start,
unsigned long nr_pages,
unsigned int gup_flags,
struct page **pages,
struct vm_area_struct **vmas,
int *locked) {
return 0;
}" > conftest$$.c
$CC $CFLAGS -c conftest$$.c > /dev/null 2>&1
rm -f conftest$$.c
if [ -f conftest$$.o ]; then
set_pin_user_pages_remote_defines "NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_VMAS"
set_pin_user_pages_remote_defines "NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_TSK"
rm -f conftest$$.o
else
set_pin_user_pages_remote_defines "NV_PIN_USER_PAGES_REMOTE_PRESENT"
fi
;;
vfio_pin_pages_has_vfio_device_arg)
@@ -6297,27 +6124,6 @@ compile_test() {
compile_check_conftest "$CODE" "NV_MEMORY_FAILURE_MF_SW_SIMULATED_DEFINED" "" "types"
;;
drm_unlocked_ioctl_flag_present)
# Determine if DRM_UNLOCKED IOCTL flag is present.
#
# DRM_UNLOCKED was removed by commit 2798ffcc1d6a ("drm: Remove
# locking for legacy ioctls and DRM_UNLOCKED") in Linux
# next-20231208.
#
# DRM_UNLOCKED definition was moved from drmP.h to drm_ioctl.h by
# commit 2640981f3600 ("drm: document drm_ioctl.[hc]") in v4.12.
CODE="
#if defined(NV_DRM_DRM_IOCTL_H_PRESENT)
#include <drm/drm_ioctl.h>
#endif
#if defined(NV_DRM_DRMP_H_PRESENT)
#include <drm/drmP.h>
#endif
int flags = DRM_UNLOCKED;"
compile_check_conftest "$CODE" "NV_DRM_UNLOCKED_IOCTL_FLAG_PRESENT" "" "types"
;;
sync_file_get_fence)
#
# Determine if sync_file_get_fence() function is present
@@ -6459,6 +6265,22 @@ compile_test() {
compile_check_conftest "$CODE" "NV_DRM_APERTURE_REMOVE_CONFLICTING_PCI_FRAMEBUFFERS_HAS_DRIVER_ARG" "" "types"
;;
remove_conflicting_framebuffers)
#
# Determine if remove_conflicting_framebuffers function is present.
#
# Added by commit 06415c5 ("fbmem, drm/nouveau: kick firmware framebuffers as soon as possible")
# in v2.6.35-rc1 (2010-05-18)
#
CODE="
#include <linux/fb.h>
void conftest_remove_conflicting_framebuffers(void) {
remove_conflicting_framebuffers();
}"
compile_check_conftest "$CODE" "NV_REMOVE_CONFLICTING_FRAMEBUFFERS_PRESENT" "" "functions"
;;
crypto)
#
# Determine if we support various crypto functions.

View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2024, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2015-2022, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -604,7 +604,9 @@ static int nv_drm_plane_atomic_set_property(
to_nv_drm_plane_state(state);
if (property == nv_dev->nv_out_fence_property) {
#if defined(NV_LINUX_NVHOST_H_PRESENT) && defined(CONFIG_TEGRA_GRHOST)
nv_drm_plane_state->fd_user_ptr = u64_to_user_ptr(val);
#endif
return 0;
} else if (property == nv_dev->nv_input_colorspace_property) {
nv_drm_plane_state->input_colorspace = val;

View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2024, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2015-2022, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -354,15 +354,19 @@ static int nv_drm_create_properties(struct nv_drm_device *nv_dev)
len++;
}
if (nv_dev->supportsSyncpts) {
nv_dev->nv_out_fence_property =
drm_property_create_range(nv_dev->dev, DRM_MODE_PROP_ATOMIC,
"NV_DRM_OUT_FENCE_PTR", 0, U64_MAX);
if (nv_dev->nv_out_fence_property == NULL) {
return -ENOMEM;
}
#if defined(NV_LINUX_NVHOST_H_PRESENT) && defined(CONFIG_TEGRA_GRHOST)
if (!nv_dev->supportsSyncpts) {
return 0;
}
nv_dev->nv_out_fence_property =
drm_property_create_range(nv_dev->dev, DRM_MODE_PROP_ATOMIC,
"NV_DRM_OUT_FENCE_PTR", 0, U64_MAX);
if (nv_dev->nv_out_fence_property == NULL) {
return -ENOMEM;
}
#endif
nv_dev->nv_input_colorspace_property =
drm_property_create_enum(nv_dev->dev, 0, "NV_INPUT_COLORSPACE",
enum_list, len);
@@ -1328,21 +1332,9 @@ static const struct drm_ioctl_desc nv_drm_ioctls[] = {
DRM_RENDER_ALLOW|DRM_UNLOCKED),
#endif
/*
* DRM_UNLOCKED is implicit for all non-legacy DRM driver IOCTLs since Linux
* v4.10 commit fa5386459f06 "drm: Used DRM_LEGACY for all legacy functions"
* (Linux v4.4 commit ea487835e887 "drm: Enforce unlocked ioctl operation
* for kms driver ioctls" previously did it only for drivers that set the
* DRM_MODESET flag), so this will race with SET_CLIENT_CAP. Linux v4.11
* commit dcf727ab5d17 "drm: setclientcap doesn't need the drm BKL" also
* removed locking from SET_CLIENT_CAP so there is no use attempting to lock
* manually. The latter commit acknowledges that this can expose userspace
* to inconsistent behavior when racing with itself, but accepts that risk.
*/
DRM_IOCTL_DEF_DRV(NVIDIA_GET_CLIENT_CAPABILITY,
nv_drm_get_client_capability_ioctl,
0),
#if defined(NV_DRM_ATOMIC_MODESET_AVAILABLE)
DRM_IOCTL_DEF_DRV(NVIDIA_GET_CRTC_CRC32,
nv_drm_get_crtc_crc32_ioctl,
@@ -1395,23 +1387,8 @@ static struct drm_driver nv_drm_driver = {
.ioctls = nv_drm_ioctls,
.num_ioctls = ARRAY_SIZE(nv_drm_ioctls),
/*
* linux-next commit 71a7974ac701 ("drm/prime: Unexport helpers for fd/handle
* conversion") unexports drm_gem_prime_handle_to_fd() and
* drm_gem_prime_fd_to_handle().
*
* Prior linux-next commit 6b85aa68d9d5 ("drm: Enable PRIME import/export for
* all drivers") made these helpers the default when .prime_handle_to_fd /
* .prime_fd_to_handle are unspecified, so it's fine to just skip specifying
* them if the helpers aren't present.
*/
#if NV_IS_EXPORT_SYMBOL_PRESENT_drm_gem_prime_handle_to_fd
.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
#endif
#if NV_IS_EXPORT_SYMBOL_PRESENT_drm_gem_prime_fd_to_handle
.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
#endif
.gem_prime_import = nv_drm_gem_prime_import,
.gem_prime_import_sg_table = nv_drm_gem_prime_import_sg_table,

View File

@@ -582,19 +582,6 @@ static inline int nv_drm_format_num_planes(uint32_t format)
#endif /* defined(NV_DRM_FORMAT_MODIFIERS_PRESENT) */
/*
* DRM_UNLOCKED was removed with linux-next commit 2798ffcc1d6a ("drm: Remove
* locking for legacy ioctls and DRM_UNLOCKED"), but it was previously made
* implicit for all non-legacy DRM driver IOCTLs since Linux v4.10 commit
* fa5386459f06 "drm: Used DRM_LEGACY for all legacy functions" (Linux v4.4
* commit ea487835e887 "drm: Enforce unlocked ioctl operation for kms driver
* ioctls" previously did it only for drivers that set the DRM_MODESET flag), so
* it was effectively a no-op anyway.
*/
#if !defined(NV_DRM_UNLOCKED_IOCTL_FLAG_PRESENT)
#define DRM_UNLOCKED 0
#endif
/*
* drm_vma_offset_exact_lookup_locked() were added
* by kernel commit 2225cfe46bcc which was Signed-off-by:

View File

@@ -55,8 +55,6 @@ NV_CONFTEST_GENERIC_COMPILE_TESTS += drm_atomic_available
NV_CONFTEST_GENERIC_COMPILE_TESTS += is_export_symbol_gpl_refcount_inc
NV_CONFTEST_GENERIC_COMPILE_TESTS += is_export_symbol_gpl_refcount_dec_and_test
NV_CONFTEST_GENERIC_COMPILE_TESTS += drm_alpha_blending_available
NV_CONFTEST_GENERIC_COMPILE_TESTS += is_export_symbol_present_drm_gem_prime_fd_to_handle
NV_CONFTEST_GENERIC_COMPILE_TESTS += is_export_symbol_present_drm_gem_prime_handle_to_fd
NV_CONFTEST_FUNCTION_COMPILE_TESTS += drm_dev_unref
NV_CONFTEST_FUNCTION_COMPILE_TESTS += drm_reinit_primary_mode_group
@@ -139,4 +137,3 @@ NV_CONFTEST_TYPE_COMPILE_TESTS += drm_connector_put
NV_CONFTEST_TYPE_COMPILE_TESTS += vm_area_struct_has_const_vm_flags
NV_CONFTEST_TYPE_COMPILE_TESTS += drm_driver_has_dumb_destroy
NV_CONFTEST_TYPE_COMPILE_TESTS += fence_ops_use_64bit_seqno
NV_CONFTEST_TYPE_COMPILE_TESTS += drm_unlocked_ioctl_flag_present

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2015-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2015-21 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -99,20 +99,6 @@ NvBool nvkms_disable_hdmi_frl(void)
return disable_hdmi_frl;
}
NvBool nvkms_kernel_supports_syncpts(void)
{
/*
* Note this only checks that the kernel has the prerequisite
* support for syncpts; callers must also check that the hardware
* supports syncpts.
*/
#if (defined(CONFIG_TEGRA_GRHOST) || defined(NV_LINUX_HOST1X_NEXT_H_PRESENT))
return NV_TRUE;
#else
return NV_FALSE;
#endif
}
#define NVKMS_SYNCPT_STUBS_NEEDED
/*************************************************************************

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2015-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2015 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -300,11 +300,6 @@ NvU32 nvkms_enumerate_gpus(nv_gpu_info_t *gpu_info);
NvBool nvkms_allow_write_combining(void);
/*!
* Check if OS supports syncpoints.
*/
NvBool nvkms_kernel_supports_syncpts(void);
/*!
* Checks whether the fd is associated with an nvidia character device.
*/

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -607,7 +607,7 @@ nv_imp_icc_get
}
else if (IS_ERR(nvl->nv_imp_icc_path))
{
nv_printf(NV_DBG_ERRORS, "NVRM: invalid path = %d\n",
nv_printf(NV_DBG_ERRORS, "NVRM: invalid path = %s\n",
PTR_ERR(nvl->nv_imp_icc_path));
nvl->nv_imp_icc_path = NULL;
status = NV_ERR_GENERIC;

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2019-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -262,7 +262,7 @@ int nv_soc_register_irqs(nv_state_t *nv)
int dpauxindex;
/* Skip registering interrupts for OpenRM */
if (nv->request_firmware)
if (nv_is_rm_firmware_active(nv))
return 0;
nv->current_soc_irq = -1;
@@ -1386,10 +1386,9 @@ NvBool nv_get_hdcp_enabled(nv_state_t *nv)
return NV_FALSE;
}
int nv_disable_simplefb_clocks(void)
int nv_remove_conflicting_framebuffers(void)
{
int status = 0;
static bool is_coldboot = true;
#if defined(CONFIG_FB) && defined(NV_NUM_REGISTERED_FB_PRESENT)
if (num_registered_fb > 0)
@@ -1400,39 +1399,8 @@ int nv_disable_simplefb_clocks(void)
{
if (!registered_fb[i])
continue;
#if defined(CONFIG_OF) && defined(CONFIG_COMMON_CLK)
struct clk *clock;
struct device_node *np = NULL;
unsigned int clk_count = 0;
int j;
np = of_find_node_by_name(NULL, "framebuffer");
if ((np != NULL) && of_device_is_available(np) && is_coldboot)
{
#if defined(NV_LINUX_OF_CLK_H_PRESENT) && defined(NV_OF_CLK_GET_PARENT_COUNT_PRESENT)
clk_count = of_clk_get_parent_count(np);
for (j = 0; j < clk_count; j++)
{
clock = of_clk_get(np, j);
if (IS_ERR(clock))
{
nv_printf(NV_DBG_ERRORS, "clock %d not found %ld\n", j, PTR_ERR(clock));
continue;
}
else
{
if (__clk_is_enabled(clock))
{
clk_disable_unprepare(clock);
}
clk_put(clock);
}
}
#endif
is_coldboot = false;
}
of_node_put(np);
#if defined(NV_REMOVE_CONFLICTING_FRAMEBUFFERS_PRESENT)
status = remove_conflicting_framebuffers(registered_fb[i]->apertures, nv_platform_driver.driver.name, false);
#endif
}
}

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 1999-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 1999-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -766,7 +766,7 @@ int __init nvidia_init_module(void)
nv_report_applied_patches();
nv_printf(NV_DBG_INFO, "NVRM: loading %s\n", pNVRM_ID);
nv_printf(NV_DBG_ERRORS, "NVRM: loading %s\n", pNVRM_ID);
#if defined(NV_UVM_ENABLE)
rc = nv_uvm_init();
@@ -1255,11 +1255,11 @@ static int nv_start_device(nv_state_t *nv, nvidia_stack_t *sp)
goto failed;
}
rc = nv_disable_simplefb_clocks();
rc = nv_remove_conflicting_framebuffers();
if (rc)
{
NV_DEV_PRINTF(NV_DBG_ERRORS, nv,
"nv_disable_simplefb_clocks failed, status %d\n",
"nv_remove_conflicting_framebuffers failed, status %d\n",
rc);
goto failed;
}

View File

@@ -196,7 +196,7 @@ NV_CONFTEST_FUNCTION_COMPILE_TESTS += devm_clk_bulk_get_all
NV_CONFTEST_FUNCTION_COMPILE_TESTS += get_task_ioprio
NV_CONFTEST_FUNCTION_COMPILE_TESTS += mdev_set_iommu_device
NV_CONFTEST_FUNCTION_COMPILE_TESTS += offline_and_remove_memory
NV_CONFTEST_FUNCTION_COMPILE_TESTS += of_clk_get_parent_count
NV_CONFTEST_FUNCTION_COMPILE_TESTS += remove_conflicting_framebuffers
NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_gpl_of_node_to_nid
NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_gpl_sme_active

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 1999-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 1999-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -1218,6 +1218,9 @@ void NV_API_CALL os_get_screen_info(
if (!registered_fb[i])
continue;
/* Make sure base address is mapped to GPU BAR */
if ((registered_fb[i]->fix.smem_start == consoleBar1Address) ||
(registered_fb[i]->fix.smem_start == consoleBar2Address))
{
*pPhysicalAddress = registered_fb[i]->fix.smem_start;
*pFbWidth = registered_fb[i]->var.xres;

View File

@@ -1 +1 @@
rel-36_lws2_eng_2025-09-23
jetson_36.2

View File

@@ -4,7 +4,7 @@
#if defined(NV_LINUX) || defined(NV_BSD) || defined(NV_SUNOS) || defined(NV_VMWARE) || defined(NV_QNX) || defined(NV_INTEGRITY) || \
(defined(RMCFG_FEATURE_PLATFORM_GSP) && RMCFG_FEATURE_PLATFORM_GSP == 1)
#define NV_VERSION_STRING "540.3.2"
#define NV_VERSION_STRING "540.2.0"
#else

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2015-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2015 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -300,11 +300,6 @@ NvU32 nvkms_enumerate_gpus(nv_gpu_info_t *gpu_info);
NvBool nvkms_allow_write_combining(void);
/*!
* Check if OS supports syncpoints.
*/
NvBool nvkms_kernel_supports_syncpts(void);
/*!
* Checks whether the fd is associated with an nvidia character device.
*/

View File

@@ -8094,11 +8094,7 @@ NVEvoHAL nvEvoC6 = {
TRUE, /* supportsVblankSyncObjects */
FALSE, /* requiresScalingTapsInBothDimensions */
TRUE, /* supportsMergeMode */
// XXX HDMI TODO: Enable 10bpc support in Bug 4590142
// HDMI RGB 10bpc support is not fully working on rel-36 yet for Tegra SOC
// resulting in issues with specific monitors. Hence disabling it temporarily
// until it is fully enabled along with HDR support in above tracking bug.
FALSE, /* supportsHDMI10BPC */
TRUE, /* supportsHDMI10BPC */
NV_EVO3_SUPPORTED_DITHERING_MODES, /* supportedDitheringModes */
sizeof(NVC372_CTRL_IS_MODE_POSSIBLE_PARAMS), /* impStructSize */
NV_EVO_SCALER_2TAPS, /* minScalerTaps */

View File

@@ -561,10 +561,6 @@ SendHDMIVendorSpecificInfoFrame(const NVDispEvoRec *pDispEvo,
NVT_VENDOR_SPECIFIC_INFOFRAME vendorInfoFrame;
NVT_STATUS status;
if (!vendorCtrl.Enable) {
return;
}
status = NvTiming_ConstructVendorSpecificInfoframe(pEdidInfo,
&vendorCtrl,
&vendorInfoFrame);

View File

@@ -1994,7 +1994,6 @@ static NvBool ConstructModeTimingsMetaData(
// Currently hardcoded to send infoframe necessary for HDMI 1.4a 4kx2k extended modes.
if (NVT_GET_TIMING_STATUS_TYPE(timing.etc.status) == NVT_TYPE_HDMI_EXT) {
pVendorInfoFrameCtrl->Enable = 1;
pVendorInfoFrameCtrl->HDMIRevision = 14;
pVendorInfoFrameCtrl->HDMIFormat = NVT_HDMI_VS_BYTE4_HDMI_VID_FMT_EXT;
pVendorInfoFrameCtrl->HDMI_VIC = NVT_GET_TIMING_STATUS_SEQ(timing.etc.status);
pVendorInfoFrameCtrl->ThreeDStruc = NVT_HDMI_VS_BYTE5_HDMI_3DS_NA;
@@ -2002,9 +2001,7 @@ static NvBool ConstructModeTimingsMetaData(
pVendorInfoFrameCtrl->MetadataPresent = 0;
pVendorInfoFrameCtrl->MetadataType = NVT_HDMI_VS_BYTE_OPT2_HDMI_METADATA_TYPE_NA;
} else {
pVendorInfoFrameCtrl->Enable = 1;
pVendorInfoFrameCtrl->HDMIRevision = 14;
pVendorInfoFrameCtrl->HDMIFormat = NVT_HDMI_VS_BYTE4_HDMI_VID_FMT_NONE;
pVendorInfoFrameCtrl->Enable = 0;
}
}
}

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2013-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2013-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -266,7 +266,6 @@ static NvBool QueryGpuCapabilities(NVDevEvoPtr pDevEvo)
}
pDevEvo->supportsSyncpts =
nvkms_kernel_supports_syncpts() &&
nvRmEvoClassListCheck(pDevEvo, NV01_MEMORY_SYNCPOINT);
return TRUE;

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -239,6 +239,12 @@ deviceCtrlCmdOsUnixVTSwitch_IMPL
return NV_OK;
}
NV_STATUS deviceCtrlCmdOsUnixVTGetFBInfo_IMPL(Device *pDevice,
NV0080_CTRL_OS_UNIX_VT_GET_FB_INFO_PARAMS *pParams)
{
return NV_OK;
}
NV_STATUS NV_API_CALL rm_save_low_res_mode(
nvidia_stack_t *sp,
nv_state_t *pNv

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 1999-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 1999-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -45,7 +45,6 @@
#include <objtmr.h>
#include "nverror.h"
#include <gpu/mem_mgr/mem_mgr.h>
#include <gpu/disp/console_mem/disp_console_mem.h>
#include <mem_mgr/io_vaspace.h>
#include <gpu/disp/kern_disp.h>
@@ -604,36 +603,6 @@ osInitNvMapping(
}
}
static void
RmTegraSetConsolePreservationParams(OBJGPU *pGpu)
{
nv_state_t *nv = NV_GET_NV_STATE(pGpu);
NvU64 fbBaseAddress = 0;
NvU64 fbConsoleSize = 0;
if (!gpuFuseSupportsDisplay_HAL(pGpu))
{
return;
}
//
// Check the OS layer for any video memory used by a console
// driver that should be reserved.
//
fbConsoleSize = rm_get_uefi_console_size(nv, &fbBaseAddress);
if (fbConsoleSize == 0)
{
NV_PRINTF(LEVEL_INFO, "No Frame Buffer Present\n");
return;
}
KernelDisplay *pKernelDisplay = GPU_GET_KERNEL_DISPLAY(pGpu);
DisplayConsoleMemory *pConsoleMem = KERNEL_DISPLAY_GET_CONSOLE_MEM(pKernelDisplay);
consolememSetMemory(pGpu, pConsoleMem, fbBaseAddress, fbConsoleSize);
}
static NV_STATUS
RmInitDeviceDma(
nv_state_t *nv
@@ -1280,7 +1249,6 @@ NvBool RmInitAdapter(
pOS = SYS_GET_OS(pSys);
RmTegraSetConsolePreservationParams(pGpu);
RmInitAcpiMethods(pOS, pSys, pGpu);
if (IS_GSP_CLIENT(pGpu) && IsT234DorBetter(pGpu))

View File

@@ -1,142 +0,0 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include <core/locks.h>
#include <ctrl/ctrl0080/ctrl0080unix.h>
#include <gpu/device/device.h>
#include <gpu/gpu.h>
#include <nv-priv.h>
#include <nv.h>
#include <osapi.h>
#include <gpu/mem_mgr/mem_mgr.h>
#include <gpu/disp/kern_disp.h>
#include <gpu/disp/console_mem/disp_console_mem.h>
static NvBool
RmDisplayConsoleMemDescPresent
(
OBJGPU *pGpu
)
{
NvBool bPresent = NV_FALSE;
KernelDisplay *pKernelDisplay = GPU_GET_KERNEL_DISPLAY(pGpu);
DisplayConsoleMemory *pConsoleMem = KERNEL_DISPLAY_GET_CONSOLE_MEM(pKernelDisplay);
if (consolememGetMemDesc(pGpu, pConsoleMem) != NULL)
{
bPresent = NV_TRUE;
}
return bPresent;
}
NV_STATUS deviceCtrlCmdOsUnixVTGetFBInfo_IMPL
(
Device *pDevice,
NV0080_CTRL_OS_UNIX_VT_GET_FB_INFO_PARAMS *pParams
)
{
OBJGPU *pGpu = GPU_RES_GET_GPU(pDevice);
NvBool bContinue = NV_TRUE;
if (rmGpuLocksAcquire(GPUS_LOCK_FLAGS_NONE, RM_LOCK_MODULES_FB) == NV_OK)
{
// See if the console is on one of the subdevices of this device.
portMemSet(pParams, 0, sizeof(*pParams));
SLI_LOOP_START(SLI_LOOP_FLAGS_NONE)
nv_state_t *nv = NV_GET_NV_STATE(pGpu);
if (RmDisplayConsoleMemDescPresent(pGpu) && bContinue)
{
NvU64 baseAddr;
NvU32 width, height, depth, pitch;
// There should only be one.
NV_ASSERT(pParams->width == 0);
pParams->subDeviceInstance = gpumgrGetSubDeviceInstanceFromGpu(pGpu);
// Console is either mapped to BAR1 or BAR2 + 16 MB
os_get_screen_info(&baseAddr, &width, &height, &depth, &pitch,
nv->bars[NV_GPU_BAR_INDEX_FB].cpu_address,
nv->bars[NV_GPU_BAR_INDEX_IMEM].cpu_address + 0x1000000);
pParams->width = (NvU16)width;
pParams->height = (NvU16)height;
pParams->depth = (NvU16)depth;
pParams->pitch = (NvU16)pitch;
if (baseAddr != 0)
{
bContinue = NV_FALSE;
}
}
SLI_LOOP_END
rmGpuLocksRelease(GPUS_LOCK_FLAGS_NONE, NULL);
}
else
{
NV_PRINTF(LEVEL_INFO,"%s: Failed to acquire GPU lock", __FUNCTION__);
}
return NV_OK;
}
void
dispdeviceFillVgaSavedDisplayState
(
OBJGPU *pGpu,
NvU64 vgaAddr,
NvU8 vgaMemType,
NvBool vgaValid,
NvU64 workspaceAddr,
NvU8 workspaceMemType,
NvBool workspaceValid,
NvBool baseValid,
NvBool workspaceBaseValid
)
{
nv_state_t *nv = NV_GET_NV_STATE(pGpu);
nv_priv_t *nvp = NV_GET_NV_PRIV(nv);
NvBool use_vbios = NV_PRIMARY_VGA(nv) && RmGpuHasIOSpaceEnabled(nv);
if (use_vbios)
{
nvp->vga.base.addr = vgaAddr;
nvp->vga.base.memTarget = vgaMemType;
nvp->vga.base.valid = vgaValid;
nvp->vga.baseValid = baseValid;
nvp->vga.workspaceBase.addr = workspaceAddr;
nvp->vga.workspaceBase.memTarget = workspaceMemType;
nvp->vga.workspaceBase.valid = workspaceValid;
nvp->vga.workspaceBaseValid = workspaceBaseValid;
}
}

View File

@@ -45,7 +45,6 @@
#include <class/cl003e.h> // NV01_MEMORY_SYSTEM
#include <class/cl00c3.h> // NV01_MEMORY_SYNCPOINT
#include <class/cl0071.h> // NV01_MEMORY_SYSTEM_OS_DESCRIPTOR
#include <class/cl0076.h> // NV01_MEMORY_FRAMEBUFFER_CONSOLE
#include <class/cl00f2.h> // IO_VASPACE_A
#include <class/cl0005.h> // NV01_EVENT
#include <nvos.h> // NV01_EVENT_KERNEL_CALLBACK
@@ -130,10 +129,6 @@
#define NV01_MEMORY_SYSTEM_OS_DESCRIPTOR (0x00000071)
#endif
#ifndef NV01_MEMORY_FRAMEBUFFER_CONSOLE
#define NV01_MEMORY_FRAMEBUFFER_CONSOLE (0x00000076)
#endif
#ifndef IO_VASPACE_A
#define IO_VASPACE_A (0x000000f2)
#endif

View File

@@ -1,356 +0,0 @@
#define NVOC_CONSOLE_MEM_H_PRIVATE_ACCESS_ALLOWED
#include "nvoc/runtime.h"
#include "nvoc/rtti.h"
#include "nvtypes.h"
#include "nvport/nvport.h"
#include "nvport/inline/util_valist.h"
#include "utils/nvassert.h"
#include "g_console_mem_nvoc.h"
#ifdef DEBUG
char __nvoc_class_id_uniqueness_check_0xaac69e = 1;
#endif
extern const struct NVOC_CLASS_DEF __nvoc_class_def_ConsoleMemory;
extern const struct NVOC_CLASS_DEF __nvoc_class_def_Object;
extern const struct NVOC_CLASS_DEF __nvoc_class_def_RsResource;
extern const struct NVOC_CLASS_DEF __nvoc_class_def_RmResourceCommon;
extern const struct NVOC_CLASS_DEF __nvoc_class_def_RmResource;
extern const struct NVOC_CLASS_DEF __nvoc_class_def_Memory;
void __nvoc_init_ConsoleMemory(ConsoleMemory*);
void __nvoc_init_funcTable_ConsoleMemory(ConsoleMemory*);
NV_STATUS __nvoc_ctor_ConsoleMemory(ConsoleMemory*, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams);
void __nvoc_init_dataField_ConsoleMemory(ConsoleMemory*);
void __nvoc_dtor_ConsoleMemory(ConsoleMemory*);
extern const struct NVOC_EXPORT_INFO __nvoc_export_info_ConsoleMemory;
static const struct NVOC_RTTI __nvoc_rtti_ConsoleMemory_ConsoleMemory = {
/*pClassDef=*/ &__nvoc_class_def_ConsoleMemory,
/*dtor=*/ (NVOC_DYNAMIC_DTOR) &__nvoc_dtor_ConsoleMemory,
/*offset=*/ 0,
};
static const struct NVOC_RTTI __nvoc_rtti_ConsoleMemory_Object = {
/*pClassDef=*/ &__nvoc_class_def_Object,
/*dtor=*/ &__nvoc_destructFromBase,
/*offset=*/ NV_OFFSETOF(ConsoleMemory, __nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_base_Object),
};
static const struct NVOC_RTTI __nvoc_rtti_ConsoleMemory_RsResource = {
/*pClassDef=*/ &__nvoc_class_def_RsResource,
/*dtor=*/ &__nvoc_destructFromBase,
/*offset=*/ NV_OFFSETOF(ConsoleMemory, __nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource),
};
static const struct NVOC_RTTI __nvoc_rtti_ConsoleMemory_RmResourceCommon = {
/*pClassDef=*/ &__nvoc_class_def_RmResourceCommon,
/*dtor=*/ &__nvoc_destructFromBase,
/*offset=*/ NV_OFFSETOF(ConsoleMemory, __nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RmResourceCommon),
};
static const struct NVOC_RTTI __nvoc_rtti_ConsoleMemory_RmResource = {
/*pClassDef=*/ &__nvoc_class_def_RmResource,
/*dtor=*/ &__nvoc_destructFromBase,
/*offset=*/ NV_OFFSETOF(ConsoleMemory, __nvoc_base_Memory.__nvoc_base_RmResource),
};
static const struct NVOC_RTTI __nvoc_rtti_ConsoleMemory_Memory = {
/*pClassDef=*/ &__nvoc_class_def_Memory,
/*dtor=*/ &__nvoc_destructFromBase,
/*offset=*/ NV_OFFSETOF(ConsoleMemory, __nvoc_base_Memory),
};
static const struct NVOC_CASTINFO __nvoc_castinfo_ConsoleMemory = {
/*numRelatives=*/ 6,
/*relatives=*/ {
&__nvoc_rtti_ConsoleMemory_ConsoleMemory,
&__nvoc_rtti_ConsoleMemory_Memory,
&__nvoc_rtti_ConsoleMemory_RmResource,
&__nvoc_rtti_ConsoleMemory_RmResourceCommon,
&__nvoc_rtti_ConsoleMemory_RsResource,
&__nvoc_rtti_ConsoleMemory_Object,
},
};
const struct NVOC_CLASS_DEF __nvoc_class_def_ConsoleMemory =
{
/*classInfo=*/ {
/*size=*/ sizeof(ConsoleMemory),
/*classId=*/ classId(ConsoleMemory),
/*providerId=*/ &__nvoc_rtti_provider,
#if NV_PRINTF_STRINGS_ALLOWED
/*name=*/ "ConsoleMemory",
#endif
},
/*objCreatefn=*/ (NVOC_DYNAMIC_OBJ_CREATE) &__nvoc_objCreateDynamic_ConsoleMemory,
/*pCastInfo=*/ &__nvoc_castinfo_ConsoleMemory,
/*pExportInfo=*/ &__nvoc_export_info_ConsoleMemory
};
static NvBool __nvoc_thunk_ConsoleMemory_resCanCopy(struct RsResource *pConsoleMemory) {
return conmemCanCopy((struct ConsoleMemory *)(((unsigned char *)pConsoleMemory) - __nvoc_rtti_ConsoleMemory_RsResource.offset));
}
static NV_STATUS __nvoc_thunk_Memory_conmemCheckMemInterUnmap(struct ConsoleMemory *pMemory, NvBool bSubdeviceHandleProvided) {
return memCheckMemInterUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), bSubdeviceHandleProvided);
}
static NvBool __nvoc_thunk_RmResource_conmemShareCallback(struct ConsoleMemory *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) {
return rmresShareCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RmResource.offset), pInvokingClient, pParentRef, pSharePolicy);
}
static NV_STATUS __nvoc_thunk_RsResource_conmemMapTo(struct ConsoleMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) {
return resMapTo((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset), pParams);
}
static NV_STATUS __nvoc_thunk_Memory_conmemGetMapAddrSpace(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) {
return memGetMapAddrSpace((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pCallContext, mapFlags, pAddrSpace);
}
static NvU32 __nvoc_thunk_RsResource_conmemGetRefCount(struct ConsoleMemory *pResource) {
return resGetRefCount((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset));
}
static void __nvoc_thunk_RsResource_conmemAddAdditionalDependants(struct RsClient *pClient, struct ConsoleMemory *pResource, RsResourceRef *pReference) {
resAddAdditionalDependants(pClient, (struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset), pReference);
}
static NV_STATUS __nvoc_thunk_RmResource_conmemControl_Prologue(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
return rmresControl_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RmResource.offset), pCallContext, pParams);
}
static NvBool __nvoc_thunk_Memory_conmemIsGpuMapAllowed(struct ConsoleMemory *pMemory, struct OBJGPU *pGpu) {
return memIsGpuMapAllowed((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pGpu);
}
static NV_STATUS __nvoc_thunk_RsResource_conmemUnmapFrom(struct ConsoleMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) {
return resUnmapFrom((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset), pParams);
}
static void __nvoc_thunk_RmResource_conmemControl_Epilogue(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
rmresControl_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RmResource.offset), pCallContext, pParams);
}
static NV_STATUS __nvoc_thunk_RsResource_conmemControlLookup(struct ConsoleMemory *pResource, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams, const struct NVOC_EXPORTED_METHOD_DEF **ppEntry) {
return resControlLookup((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset), pParams, ppEntry);
}
static NV_STATUS __nvoc_thunk_Memory_conmemControl(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
return memControl((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pCallContext, pParams);
}
static NV_STATUS __nvoc_thunk_Memory_conmemUnmap(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) {
return memUnmap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pCallContext, pCpuMapping);
}
static NV_STATUS __nvoc_thunk_Memory_conmemGetMemInterMapParams(struct ConsoleMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) {
return memGetMemInterMapParams((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pParams);
}
static NV_STATUS __nvoc_thunk_Memory_conmemGetMemoryMappingDescriptor(struct ConsoleMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) {
return memGetMemoryMappingDescriptor((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), ppMemDesc);
}
static NV_STATUS __nvoc_thunk_RsResource_conmemControlFilter(struct ConsoleMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
return resControlFilter((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset), pCallContext, pParams);
}
static NV_STATUS __nvoc_thunk_RmResource_conmemControlSerialization_Prologue(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
return rmresControlSerialization_Prologue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RmResource.offset), pCallContext, pParams);
}
static NV_STATUS __nvoc_thunk_Memory_conmemIsReady(struct ConsoleMemory *pMemory, NvBool bCopyConstructorContext) {
return memIsReady((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), bCopyConstructorContext);
}
static NV_STATUS __nvoc_thunk_Memory_conmemCheckCopyPermissions(struct ConsoleMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) {
return memCheckCopyPermissions((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pDstGpu, pDstDevice);
}
static void __nvoc_thunk_RsResource_conmemPreDestruct(struct ConsoleMemory *pResource) {
resPreDestruct((struct RsResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RsResource.offset));
}
static NV_STATUS __nvoc_thunk_Memory_conmemIsDuplicate(struct ConsoleMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) {
return memIsDuplicate((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), hMemory, pDuplicate);
}
static void __nvoc_thunk_RmResource_conmemControlSerialization_Epilogue(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
rmresControlSerialization_Epilogue((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RmResource.offset), pCallContext, pParams);
}
static NV_STATUS __nvoc_thunk_Memory_conmemMap(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) {
return memMap((struct Memory *)(((unsigned char *)pMemory) + __nvoc_rtti_ConsoleMemory_Memory.offset), pCallContext, pParams, pCpuMapping);
}
static NvBool __nvoc_thunk_RmResource_conmemAccessCallback(struct ConsoleMemory *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) {
return rmresAccessCallback((struct RmResource *)(((unsigned char *)pResource) + __nvoc_rtti_ConsoleMemory_RmResource.offset), pInvokingClient, pAllocParams, accessRight);
}
const struct NVOC_EXPORT_INFO __nvoc_export_info_ConsoleMemory =
{
/*numEntries=*/ 0,
/*pExportEntries=*/ 0
};
void __nvoc_dtor_Memory(Memory*);
void __nvoc_dtor_ConsoleMemory(ConsoleMemory *pThis) {
__nvoc_dtor_Memory(&pThis->__nvoc_base_Memory);
PORT_UNREFERENCED_VARIABLE(pThis);
}
void __nvoc_init_dataField_ConsoleMemory(ConsoleMemory *pThis) {
PORT_UNREFERENCED_VARIABLE(pThis);
}
NV_STATUS __nvoc_ctor_Memory(Memory* , CALL_CONTEXT *, struct RS_RES_ALLOC_PARAMS_INTERNAL *);
NV_STATUS __nvoc_ctor_ConsoleMemory(ConsoleMemory *pThis, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams) {
NV_STATUS status = NV_OK;
status = __nvoc_ctor_Memory(&pThis->__nvoc_base_Memory, arg_pCallContext, arg_pParams);
if (status != NV_OK) goto __nvoc_ctor_ConsoleMemory_fail_Memory;
__nvoc_init_dataField_ConsoleMemory(pThis);
status = __nvoc_conmemConstruct(pThis, arg_pCallContext, arg_pParams);
if (status != NV_OK) goto __nvoc_ctor_ConsoleMemory_fail__init;
goto __nvoc_ctor_ConsoleMemory_exit; // Success
__nvoc_ctor_ConsoleMemory_fail__init:
__nvoc_dtor_Memory(&pThis->__nvoc_base_Memory);
__nvoc_ctor_ConsoleMemory_fail_Memory:
__nvoc_ctor_ConsoleMemory_exit:
return status;
}
static void __nvoc_init_funcTable_ConsoleMemory_1(ConsoleMemory *pThis) {
PORT_UNREFERENCED_VARIABLE(pThis);
pThis->__conmemCanCopy__ = &conmemCanCopy_IMPL;
pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__resCanCopy__ = &__nvoc_thunk_ConsoleMemory_resCanCopy;
pThis->__conmemCheckMemInterUnmap__ = &__nvoc_thunk_Memory_conmemCheckMemInterUnmap;
pThis->__conmemShareCallback__ = &__nvoc_thunk_RmResource_conmemShareCallback;
pThis->__conmemMapTo__ = &__nvoc_thunk_RsResource_conmemMapTo;
pThis->__conmemGetMapAddrSpace__ = &__nvoc_thunk_Memory_conmemGetMapAddrSpace;
pThis->__conmemGetRefCount__ = &__nvoc_thunk_RsResource_conmemGetRefCount;
pThis->__conmemAddAdditionalDependants__ = &__nvoc_thunk_RsResource_conmemAddAdditionalDependants;
pThis->__conmemControl_Prologue__ = &__nvoc_thunk_RmResource_conmemControl_Prologue;
pThis->__conmemIsGpuMapAllowed__ = &__nvoc_thunk_Memory_conmemIsGpuMapAllowed;
pThis->__conmemUnmapFrom__ = &__nvoc_thunk_RsResource_conmemUnmapFrom;
pThis->__conmemControl_Epilogue__ = &__nvoc_thunk_RmResource_conmemControl_Epilogue;
pThis->__conmemControlLookup__ = &__nvoc_thunk_RsResource_conmemControlLookup;
pThis->__conmemControl__ = &__nvoc_thunk_Memory_conmemControl;
pThis->__conmemUnmap__ = &__nvoc_thunk_Memory_conmemUnmap;
pThis->__conmemGetMemInterMapParams__ = &__nvoc_thunk_Memory_conmemGetMemInterMapParams;
pThis->__conmemGetMemoryMappingDescriptor__ = &__nvoc_thunk_Memory_conmemGetMemoryMappingDescriptor;
pThis->__conmemControlFilter__ = &__nvoc_thunk_RsResource_conmemControlFilter;
pThis->__conmemControlSerialization_Prologue__ = &__nvoc_thunk_RmResource_conmemControlSerialization_Prologue;
pThis->__conmemIsReady__ = &__nvoc_thunk_Memory_conmemIsReady;
pThis->__conmemCheckCopyPermissions__ = &__nvoc_thunk_Memory_conmemCheckCopyPermissions;
pThis->__conmemPreDestruct__ = &__nvoc_thunk_RsResource_conmemPreDestruct;
pThis->__conmemIsDuplicate__ = &__nvoc_thunk_Memory_conmemIsDuplicate;
pThis->__conmemControlSerialization_Epilogue__ = &__nvoc_thunk_RmResource_conmemControlSerialization_Epilogue;
pThis->__conmemMap__ = &__nvoc_thunk_Memory_conmemMap;
pThis->__conmemAccessCallback__ = &__nvoc_thunk_RmResource_conmemAccessCallback;
}
void __nvoc_init_funcTable_ConsoleMemory(ConsoleMemory *pThis) {
__nvoc_init_funcTable_ConsoleMemory_1(pThis);
}
void __nvoc_init_Memory(Memory*);
void __nvoc_init_ConsoleMemory(ConsoleMemory *pThis) {
pThis->__nvoc_pbase_ConsoleMemory = pThis;
pThis->__nvoc_pbase_Object = &pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_base_Object;
pThis->__nvoc_pbase_RsResource = &pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource;
pThis->__nvoc_pbase_RmResourceCommon = &pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RmResourceCommon;
pThis->__nvoc_pbase_RmResource = &pThis->__nvoc_base_Memory.__nvoc_base_RmResource;
pThis->__nvoc_pbase_Memory = &pThis->__nvoc_base_Memory;
__nvoc_init_Memory(&pThis->__nvoc_base_Memory);
__nvoc_init_funcTable_ConsoleMemory(pThis);
}
NV_STATUS __nvoc_objCreate_ConsoleMemory(ConsoleMemory **ppThis, Dynamic *pParent, NvU32 createFlags, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams) {
NV_STATUS status;
Object *pParentObj;
ConsoleMemory *pThis;
status = __nvoc_handleObjCreateMemAlloc(createFlags, sizeof(ConsoleMemory), (void**)&pThis, (void**)ppThis);
if (status != NV_OK)
return status;
portMemSet(pThis, 0, sizeof(ConsoleMemory));
__nvoc_initRtti(staticCast(pThis, Dynamic), &__nvoc_class_def_ConsoleMemory);
pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_base_Object.createFlags = createFlags;
if (pParent != NULL && !(createFlags & NVOC_OBJ_CREATE_FLAGS_PARENT_HALSPEC_ONLY))
{
pParentObj = dynamicCast(pParent, Object);
objAddChild(pParentObj, &pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_base_Object);
}
else
{
pThis->__nvoc_base_Memory.__nvoc_base_RmResource.__nvoc_base_RsResource.__nvoc_base_Object.pParent = NULL;
}
__nvoc_init_ConsoleMemory(pThis);
status = __nvoc_ctor_ConsoleMemory(pThis, arg_pCallContext, arg_pParams);
if (status != NV_OK) goto __nvoc_objCreate_ConsoleMemory_cleanup;
*ppThis = pThis;
return NV_OK;
__nvoc_objCreate_ConsoleMemory_cleanup:
// do not call destructors here since the constructor already called them
if (createFlags & NVOC_OBJ_CREATE_FLAGS_IN_PLACE_CONSTRUCT)
portMemSet(pThis, 0, sizeof(ConsoleMemory));
else
portMemFree(pThis);
// coverity[leaked_storage:FALSE]
return status;
}
NV_STATUS __nvoc_objCreateDynamic_ConsoleMemory(ConsoleMemory **ppThis, Dynamic *pParent, NvU32 createFlags, va_list args) {
NV_STATUS status;
CALL_CONTEXT * arg_pCallContext = va_arg(args, CALL_CONTEXT *);
struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams = va_arg(args, struct RS_RES_ALLOC_PARAMS_INTERNAL *);
status = __nvoc_objCreate_ConsoleMemory(ppThis, pParent, createFlags, arg_pCallContext, arg_pParams);
return status;
}

View File

@@ -1,249 +0,0 @@
#ifndef _G_CONSOLE_MEM_NVOC_H_
#define _G_CONSOLE_MEM_NVOC_H_
#include "nvoc/runtime.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
* SPDX-FileCopyrightText: Copyright (c) 1993-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include "g_console_mem_nvoc.h"
#ifndef _CONSOLE_MEMORY_H_
#define _CONSOLE_MEMORY_H_
#include "mem_mgr/mem.h"
/*!
* This class is used to create hMemory referencing reserved console memory
*/
#ifdef NVOC_CONSOLE_MEM_H_PRIVATE_ACCESS_ALLOWED
#define PRIVATE_FIELD(x) x
#else
#define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x)
#endif
struct ConsoleMemory {
const struct NVOC_RTTI *__nvoc_rtti;
struct Memory __nvoc_base_Memory;
struct Object *__nvoc_pbase_Object;
struct RsResource *__nvoc_pbase_RsResource;
struct RmResourceCommon *__nvoc_pbase_RmResourceCommon;
struct RmResource *__nvoc_pbase_RmResource;
struct Memory *__nvoc_pbase_Memory;
struct ConsoleMemory *__nvoc_pbase_ConsoleMemory;
NvBool (*__conmemCanCopy__)(struct ConsoleMemory *);
NV_STATUS (*__conmemCheckMemInterUnmap__)(struct ConsoleMemory *, NvBool);
NvBool (*__conmemShareCallback__)(struct ConsoleMemory *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *);
NV_STATUS (*__conmemMapTo__)(struct ConsoleMemory *, RS_RES_MAP_TO_PARAMS *);
NV_STATUS (*__conmemGetMapAddrSpace__)(struct ConsoleMemory *, CALL_CONTEXT *, NvU32, NV_ADDRESS_SPACE *);
NvU32 (*__conmemGetRefCount__)(struct ConsoleMemory *);
void (*__conmemAddAdditionalDependants__)(struct RsClient *, struct ConsoleMemory *, RsResourceRef *);
NV_STATUS (*__conmemControl_Prologue__)(struct ConsoleMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *);
NvBool (*__conmemIsGpuMapAllowed__)(struct ConsoleMemory *, struct OBJGPU *);
NV_STATUS (*__conmemUnmapFrom__)(struct ConsoleMemory *, RS_RES_UNMAP_FROM_PARAMS *);
void (*__conmemControl_Epilogue__)(struct ConsoleMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *);
NV_STATUS (*__conmemControlLookup__)(struct ConsoleMemory *, struct RS_RES_CONTROL_PARAMS_INTERNAL *, const struct NVOC_EXPORTED_METHOD_DEF **);
NV_STATUS (*__conmemControl__)(struct ConsoleMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *);
NV_STATUS (*__conmemUnmap__)(struct ConsoleMemory *, CALL_CONTEXT *, RsCpuMapping *);
NV_STATUS (*__conmemGetMemInterMapParams__)(struct ConsoleMemory *, RMRES_MEM_INTER_MAP_PARAMS *);
NV_STATUS (*__conmemGetMemoryMappingDescriptor__)(struct ConsoleMemory *, MEMORY_DESCRIPTOR **);
NV_STATUS (*__conmemControlFilter__)(struct ConsoleMemory *, struct CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *);
NV_STATUS (*__conmemControlSerialization_Prologue__)(struct ConsoleMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *);
NV_STATUS (*__conmemIsReady__)(struct ConsoleMemory *, NvBool);
NV_STATUS (*__conmemCheckCopyPermissions__)(struct ConsoleMemory *, struct OBJGPU *, struct Device *);
void (*__conmemPreDestruct__)(struct ConsoleMemory *);
NV_STATUS (*__conmemIsDuplicate__)(struct ConsoleMemory *, NvHandle, NvBool *);
void (*__conmemControlSerialization_Epilogue__)(struct ConsoleMemory *, CALL_CONTEXT *, struct RS_RES_CONTROL_PARAMS_INTERNAL *);
NV_STATUS (*__conmemMap__)(struct ConsoleMemory *, CALL_CONTEXT *, struct RS_CPU_MAP_PARAMS *, RsCpuMapping *);
NvBool (*__conmemAccessCallback__)(struct ConsoleMemory *, struct RsClient *, void *, RsAccessRight);
};
#ifndef __NVOC_CLASS_ConsoleMemory_TYPEDEF__
#define __NVOC_CLASS_ConsoleMemory_TYPEDEF__
typedef struct ConsoleMemory ConsoleMemory;
#endif /* __NVOC_CLASS_ConsoleMemory_TYPEDEF__ */
#ifndef __nvoc_class_id_ConsoleMemory
#define __nvoc_class_id_ConsoleMemory 0xaac69e
#endif /* __nvoc_class_id_ConsoleMemory */
extern const struct NVOC_CLASS_DEF __nvoc_class_def_ConsoleMemory;
#define __staticCast_ConsoleMemory(pThis) \
((pThis)->__nvoc_pbase_ConsoleMemory)
#ifdef __nvoc_console_mem_h_disabled
#define __dynamicCast_ConsoleMemory(pThis) ((ConsoleMemory*)NULL)
#else //__nvoc_console_mem_h_disabled
#define __dynamicCast_ConsoleMemory(pThis) \
((ConsoleMemory*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(ConsoleMemory)))
#endif //__nvoc_console_mem_h_disabled
NV_STATUS __nvoc_objCreateDynamic_ConsoleMemory(ConsoleMemory**, Dynamic*, NvU32, va_list);
NV_STATUS __nvoc_objCreate_ConsoleMemory(ConsoleMemory**, Dynamic*, NvU32, CALL_CONTEXT * arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL * arg_pParams);
#define __objCreate_ConsoleMemory(ppNewObj, pParent, createFlags, arg_pCallContext, arg_pParams) \
__nvoc_objCreate_ConsoleMemory((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pCallContext, arg_pParams)
#define conmemCanCopy(pConsoleMemory) conmemCanCopy_DISPATCH(pConsoleMemory)
#define conmemCheckMemInterUnmap(pMemory, bSubdeviceHandleProvided) conmemCheckMemInterUnmap_DISPATCH(pMemory, bSubdeviceHandleProvided)
#define conmemShareCallback(pResource, pInvokingClient, pParentRef, pSharePolicy) conmemShareCallback_DISPATCH(pResource, pInvokingClient, pParentRef, pSharePolicy)
#define conmemMapTo(pResource, pParams) conmemMapTo_DISPATCH(pResource, pParams)
#define conmemGetMapAddrSpace(pMemory, pCallContext, mapFlags, pAddrSpace) conmemGetMapAddrSpace_DISPATCH(pMemory, pCallContext, mapFlags, pAddrSpace)
#define conmemGetRefCount(pResource) conmemGetRefCount_DISPATCH(pResource)
#define conmemAddAdditionalDependants(pClient, pResource, pReference) conmemAddAdditionalDependants_DISPATCH(pClient, pResource, pReference)
#define conmemControl_Prologue(pResource, pCallContext, pParams) conmemControl_Prologue_DISPATCH(pResource, pCallContext, pParams)
#define conmemIsGpuMapAllowed(pMemory, pGpu) conmemIsGpuMapAllowed_DISPATCH(pMemory, pGpu)
#define conmemUnmapFrom(pResource, pParams) conmemUnmapFrom_DISPATCH(pResource, pParams)
#define conmemControl_Epilogue(pResource, pCallContext, pParams) conmemControl_Epilogue_DISPATCH(pResource, pCallContext, pParams)
#define conmemControlLookup(pResource, pParams, ppEntry) conmemControlLookup_DISPATCH(pResource, pParams, ppEntry)
#define conmemControl(pMemory, pCallContext, pParams) conmemControl_DISPATCH(pMemory, pCallContext, pParams)
#define conmemUnmap(pMemory, pCallContext, pCpuMapping) conmemUnmap_DISPATCH(pMemory, pCallContext, pCpuMapping)
#define conmemGetMemInterMapParams(pMemory, pParams) conmemGetMemInterMapParams_DISPATCH(pMemory, pParams)
#define conmemGetMemoryMappingDescriptor(pMemory, ppMemDesc) conmemGetMemoryMappingDescriptor_DISPATCH(pMemory, ppMemDesc)
#define conmemControlFilter(pResource, pCallContext, pParams) conmemControlFilter_DISPATCH(pResource, pCallContext, pParams)
#define conmemControlSerialization_Prologue(pResource, pCallContext, pParams) conmemControlSerialization_Prologue_DISPATCH(pResource, pCallContext, pParams)
#define conmemIsReady(pMemory, bCopyConstructorContext) conmemIsReady_DISPATCH(pMemory, bCopyConstructorContext)
#define conmemCheckCopyPermissions(pMemory, pDstGpu, pDstDevice) conmemCheckCopyPermissions_DISPATCH(pMemory, pDstGpu, pDstDevice)
#define conmemPreDestruct(pResource) conmemPreDestruct_DISPATCH(pResource)
#define conmemIsDuplicate(pMemory, hMemory, pDuplicate) conmemIsDuplicate_DISPATCH(pMemory, hMemory, pDuplicate)
#define conmemControlSerialization_Epilogue(pResource, pCallContext, pParams) conmemControlSerialization_Epilogue_DISPATCH(pResource, pCallContext, pParams)
#define conmemMap(pMemory, pCallContext, pParams, pCpuMapping) conmemMap_DISPATCH(pMemory, pCallContext, pParams, pCpuMapping)
#define conmemAccessCallback(pResource, pInvokingClient, pAllocParams, accessRight) conmemAccessCallback_DISPATCH(pResource, pInvokingClient, pAllocParams, accessRight)
NvBool conmemCanCopy_IMPL(struct ConsoleMemory *pConsoleMemory);
static inline NvBool conmemCanCopy_DISPATCH(struct ConsoleMemory *pConsoleMemory) {
return pConsoleMemory->__conmemCanCopy__(pConsoleMemory);
}
static inline NV_STATUS conmemCheckMemInterUnmap_DISPATCH(struct ConsoleMemory *pMemory, NvBool bSubdeviceHandleProvided) {
return pMemory->__conmemCheckMemInterUnmap__(pMemory, bSubdeviceHandleProvided);
}
static inline NvBool conmemShareCallback_DISPATCH(struct ConsoleMemory *pResource, struct RsClient *pInvokingClient, struct RsResourceRef *pParentRef, RS_SHARE_POLICY *pSharePolicy) {
return pResource->__conmemShareCallback__(pResource, pInvokingClient, pParentRef, pSharePolicy);
}
static inline NV_STATUS conmemMapTo_DISPATCH(struct ConsoleMemory *pResource, RS_RES_MAP_TO_PARAMS *pParams) {
return pResource->__conmemMapTo__(pResource, pParams);
}
static inline NV_STATUS conmemGetMapAddrSpace_DISPATCH(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, NvU32 mapFlags, NV_ADDRESS_SPACE *pAddrSpace) {
return pMemory->__conmemGetMapAddrSpace__(pMemory, pCallContext, mapFlags, pAddrSpace);
}
static inline NvU32 conmemGetRefCount_DISPATCH(struct ConsoleMemory *pResource) {
return pResource->__conmemGetRefCount__(pResource);
}
static inline void conmemAddAdditionalDependants_DISPATCH(struct RsClient *pClient, struct ConsoleMemory *pResource, RsResourceRef *pReference) {
pResource->__conmemAddAdditionalDependants__(pClient, pResource, pReference);
}
static inline NV_STATUS conmemControl_Prologue_DISPATCH(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
return pResource->__conmemControl_Prologue__(pResource, pCallContext, pParams);
}
static inline NvBool conmemIsGpuMapAllowed_DISPATCH(struct ConsoleMemory *pMemory, struct OBJGPU *pGpu) {
return pMemory->__conmemIsGpuMapAllowed__(pMemory, pGpu);
}
static inline NV_STATUS conmemUnmapFrom_DISPATCH(struct ConsoleMemory *pResource, RS_RES_UNMAP_FROM_PARAMS *pParams) {
return pResource->__conmemUnmapFrom__(pResource, pParams);
}
static inline void conmemControl_Epilogue_DISPATCH(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
pResource->__conmemControl_Epilogue__(pResource, pCallContext, pParams);
}
static inline NV_STATUS conmemControlLookup_DISPATCH(struct ConsoleMemory *pResource, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams, const struct NVOC_EXPORTED_METHOD_DEF **ppEntry) {
return pResource->__conmemControlLookup__(pResource, pParams, ppEntry);
}
static inline NV_STATUS conmemControl_DISPATCH(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
return pMemory->__conmemControl__(pMemory, pCallContext, pParams);
}
static inline NV_STATUS conmemUnmap_DISPATCH(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, RsCpuMapping *pCpuMapping) {
return pMemory->__conmemUnmap__(pMemory, pCallContext, pCpuMapping);
}
static inline NV_STATUS conmemGetMemInterMapParams_DISPATCH(struct ConsoleMemory *pMemory, RMRES_MEM_INTER_MAP_PARAMS *pParams) {
return pMemory->__conmemGetMemInterMapParams__(pMemory, pParams);
}
static inline NV_STATUS conmemGetMemoryMappingDescriptor_DISPATCH(struct ConsoleMemory *pMemory, MEMORY_DESCRIPTOR **ppMemDesc) {
return pMemory->__conmemGetMemoryMappingDescriptor__(pMemory, ppMemDesc);
}
static inline NV_STATUS conmemControlFilter_DISPATCH(struct ConsoleMemory *pResource, struct CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
return pResource->__conmemControlFilter__(pResource, pCallContext, pParams);
}
static inline NV_STATUS conmemControlSerialization_Prologue_DISPATCH(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
return pResource->__conmemControlSerialization_Prologue__(pResource, pCallContext, pParams);
}
static inline NV_STATUS conmemIsReady_DISPATCH(struct ConsoleMemory *pMemory, NvBool bCopyConstructorContext) {
return pMemory->__conmemIsReady__(pMemory, bCopyConstructorContext);
}
static inline NV_STATUS conmemCheckCopyPermissions_DISPATCH(struct ConsoleMemory *pMemory, struct OBJGPU *pDstGpu, struct Device *pDstDevice) {
return pMemory->__conmemCheckCopyPermissions__(pMemory, pDstGpu, pDstDevice);
}
static inline void conmemPreDestruct_DISPATCH(struct ConsoleMemory *pResource) {
pResource->__conmemPreDestruct__(pResource);
}
static inline NV_STATUS conmemIsDuplicate_DISPATCH(struct ConsoleMemory *pMemory, NvHandle hMemory, NvBool *pDuplicate) {
return pMemory->__conmemIsDuplicate__(pMemory, hMemory, pDuplicate);
}
static inline void conmemControlSerialization_Epilogue_DISPATCH(struct ConsoleMemory *pResource, CALL_CONTEXT *pCallContext, struct RS_RES_CONTROL_PARAMS_INTERNAL *pParams) {
pResource->__conmemControlSerialization_Epilogue__(pResource, pCallContext, pParams);
}
static inline NV_STATUS conmemMap_DISPATCH(struct ConsoleMemory *pMemory, CALL_CONTEXT *pCallContext, struct RS_CPU_MAP_PARAMS *pParams, RsCpuMapping *pCpuMapping) {
return pMemory->__conmemMap__(pMemory, pCallContext, pParams, pCpuMapping);
}
static inline NvBool conmemAccessCallback_DISPATCH(struct ConsoleMemory *pResource, struct RsClient *pInvokingClient, void *pAllocParams, RsAccessRight accessRight) {
return pResource->__conmemAccessCallback__(pResource, pInvokingClient, pAllocParams, accessRight);
}
NV_STATUS conmemConstruct_IMPL(struct ConsoleMemory *arg_pConsoleMemory, CALL_CONTEXT *arg_pCallContext, struct RS_RES_ALLOC_PARAMS_INTERNAL *arg_pParams);
#define __nvoc_conmemConstruct(arg_pConsoleMemory, arg_pCallContext, arg_pParams) conmemConstruct_IMPL(arg_pConsoleMemory, arg_pCallContext, arg_pParams)
#undef PRIVATE_FIELD
#endif
#ifdef __cplusplus
} // extern "C"
#endif
#endif // _G_CONSOLE_MEM_NVOC_H_

View File

@@ -1,163 +0,0 @@
#define NVOC_DISP_CONSOLE_MEM_H_PRIVATE_ACCESS_ALLOWED
#include "nvoc/runtime.h"
#include "nvoc/rtti.h"
#include "nvtypes.h"
#include "nvport/nvport.h"
#include "nvport/inline/util_valist.h"
#include "utils/nvassert.h"
#include "g_disp_console_mem_nvoc.h"
#ifdef DEBUG
char __nvoc_class_id_uniqueness_check_0x0f96d3 = 1;
#endif
extern const struct NVOC_CLASS_DEF __nvoc_class_def_DisplayConsoleMemory;
extern const struct NVOC_CLASS_DEF __nvoc_class_def_Object;
void __nvoc_init_DisplayConsoleMemory(DisplayConsoleMemory*);
void __nvoc_init_funcTable_DisplayConsoleMemory(DisplayConsoleMemory*);
NV_STATUS __nvoc_ctor_DisplayConsoleMemory(DisplayConsoleMemory*);
void __nvoc_init_dataField_DisplayConsoleMemory(DisplayConsoleMemory*);
void __nvoc_dtor_DisplayConsoleMemory(DisplayConsoleMemory*);
extern const struct NVOC_EXPORT_INFO __nvoc_export_info_DisplayConsoleMemory;
static const struct NVOC_RTTI __nvoc_rtti_DisplayConsoleMemory_DisplayConsoleMemory = {
/*pClassDef=*/ &__nvoc_class_def_DisplayConsoleMemory,
/*dtor=*/ (NVOC_DYNAMIC_DTOR) &__nvoc_dtor_DisplayConsoleMemory,
/*offset=*/ 0,
};
static const struct NVOC_RTTI __nvoc_rtti_DisplayConsoleMemory_Object = {
/*pClassDef=*/ &__nvoc_class_def_Object,
/*dtor=*/ &__nvoc_destructFromBase,
/*offset=*/ NV_OFFSETOF(DisplayConsoleMemory, __nvoc_base_Object),
};
static const struct NVOC_CASTINFO __nvoc_castinfo_DisplayConsoleMemory = {
/*numRelatives=*/ 2,
/*relatives=*/ {
&__nvoc_rtti_DisplayConsoleMemory_DisplayConsoleMemory,
&__nvoc_rtti_DisplayConsoleMemory_Object,
},
};
const struct NVOC_CLASS_DEF __nvoc_class_def_DisplayConsoleMemory =
{
/*classInfo=*/ {
/*size=*/ sizeof(DisplayConsoleMemory),
/*classId=*/ classId(DisplayConsoleMemory),
/*providerId=*/ &__nvoc_rtti_provider,
#if NV_PRINTF_STRINGS_ALLOWED
/*name=*/ "DisplayConsoleMemory",
#endif
},
/*objCreatefn=*/ (NVOC_DYNAMIC_OBJ_CREATE) &__nvoc_objCreateDynamic_DisplayConsoleMemory,
/*pCastInfo=*/ &__nvoc_castinfo_DisplayConsoleMemory,
/*pExportInfo=*/ &__nvoc_export_info_DisplayConsoleMemory
};
const struct NVOC_EXPORT_INFO __nvoc_export_info_DisplayConsoleMemory =
{
/*numEntries=*/ 0,
/*pExportEntries=*/ 0
};
void __nvoc_dtor_Object(Object*);
void __nvoc_dtor_DisplayConsoleMemory(DisplayConsoleMemory *pThis) {
__nvoc_consolememDestruct(pThis);
__nvoc_dtor_Object(&pThis->__nvoc_base_Object);
PORT_UNREFERENCED_VARIABLE(pThis);
}
void __nvoc_init_dataField_DisplayConsoleMemory(DisplayConsoleMemory *pThis) {
PORT_UNREFERENCED_VARIABLE(pThis);
}
NV_STATUS __nvoc_ctor_Object(Object* );
NV_STATUS __nvoc_ctor_DisplayConsoleMemory(DisplayConsoleMemory *pThis) {
NV_STATUS status = NV_OK;
status = __nvoc_ctor_Object(&pThis->__nvoc_base_Object);
if (status != NV_OK) goto __nvoc_ctor_DisplayConsoleMemory_fail_Object;
__nvoc_init_dataField_DisplayConsoleMemory(pThis);
status = __nvoc_consolememConstruct(pThis);
if (status != NV_OK) goto __nvoc_ctor_DisplayConsoleMemory_fail__init;
goto __nvoc_ctor_DisplayConsoleMemory_exit; // Success
__nvoc_ctor_DisplayConsoleMemory_fail__init:
__nvoc_dtor_Object(&pThis->__nvoc_base_Object);
__nvoc_ctor_DisplayConsoleMemory_fail_Object:
__nvoc_ctor_DisplayConsoleMemory_exit:
return status;
}
static void __nvoc_init_funcTable_DisplayConsoleMemory_1(DisplayConsoleMemory *pThis) {
PORT_UNREFERENCED_VARIABLE(pThis);
}
void __nvoc_init_funcTable_DisplayConsoleMemory(DisplayConsoleMemory *pThis) {
__nvoc_init_funcTable_DisplayConsoleMemory_1(pThis);
}
void __nvoc_init_Object(Object*);
void __nvoc_init_DisplayConsoleMemory(DisplayConsoleMemory *pThis) {
pThis->__nvoc_pbase_DisplayConsoleMemory = pThis;
pThis->__nvoc_pbase_Object = &pThis->__nvoc_base_Object;
__nvoc_init_Object(&pThis->__nvoc_base_Object);
__nvoc_init_funcTable_DisplayConsoleMemory(pThis);
}
NV_STATUS __nvoc_objCreate_DisplayConsoleMemory(DisplayConsoleMemory **ppThis, Dynamic *pParent, NvU32 createFlags) {
NV_STATUS status;
Object *pParentObj;
DisplayConsoleMemory *pThis;
status = __nvoc_handleObjCreateMemAlloc(createFlags, sizeof(DisplayConsoleMemory), (void**)&pThis, (void**)ppThis);
if (status != NV_OK)
return status;
portMemSet(pThis, 0, sizeof(DisplayConsoleMemory));
__nvoc_initRtti(staticCast(pThis, Dynamic), &__nvoc_class_def_DisplayConsoleMemory);
pThis->__nvoc_base_Object.createFlags = createFlags;
if (pParent != NULL && !(createFlags & NVOC_OBJ_CREATE_FLAGS_PARENT_HALSPEC_ONLY))
{
pParentObj = dynamicCast(pParent, Object);
objAddChild(pParentObj, &pThis->__nvoc_base_Object);
}
else
{
pThis->__nvoc_base_Object.pParent = NULL;
}
__nvoc_init_DisplayConsoleMemory(pThis);
status = __nvoc_ctor_DisplayConsoleMemory(pThis);
if (status != NV_OK) goto __nvoc_objCreate_DisplayConsoleMemory_cleanup;
*ppThis = pThis;
return NV_OK;
__nvoc_objCreate_DisplayConsoleMemory_cleanup:
// do not call destructors here since the constructor already called them
if (createFlags & NVOC_OBJ_CREATE_FLAGS_IN_PLACE_CONSTRUCT)
portMemSet(pThis, 0, sizeof(DisplayConsoleMemory));
else
portMemFree(pThis);
// coverity[leaked_storage:FALSE]
return status;
}
NV_STATUS __nvoc_objCreateDynamic_DisplayConsoleMemory(DisplayConsoleMemory **ppThis, Dynamic *pParent, NvU32 createFlags, va_list args) {
NV_STATUS status;
status = __nvoc_objCreate_DisplayConsoleMemory(ppThis, pParent, createFlags);
return status;
}

View File

@@ -1,174 +0,0 @@
#ifndef _G_DISP_CONSOLE_MEM_NVOC_H_
#define _G_DISP_CONSOLE_MEM_NVOC_H_
#include "nvoc/runtime.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
* SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include "g_disp_console_mem_nvoc.h"
#ifndef DISPLAY_CONSOLE_MEMORY_H
#define DISPLAY_CONSOLE_MEMORY_H
/* ------------------------ Includes --------------------------------------- */
#include "nvtypes.h"
#include "nvoc/utility.h"
#include "gpu/disp/kern_disp.h"
#include "gpu/mem_mgr/mem_desc.h"
/* ------------------------ Forward Declaration ---------------------------- */
/* ------------------------ Macros & Defines ------------------------------- */
#define KERNEL_DISPLAY_GET_CONSOLE_MEM(p) ((p)->pConsoleMem)
/* ------------------------ Types definitions ------------------------------ */
#ifdef NVOC_DISP_CONSOLE_MEM_H_PRIVATE_ACCESS_ALLOWED
#define PRIVATE_FIELD(x) x
#else
#define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x)
#endif
struct DisplayConsoleMemory {
const struct NVOC_RTTI *__nvoc_rtti;
struct Object __nvoc_base_Object;
struct Object *__nvoc_pbase_Object;
struct DisplayConsoleMemory *__nvoc_pbase_DisplayConsoleMemory;
NV_ADDRESS_SPACE consoleMemAddrSpace;
NvU32 consoleMemAttr;
NvU64 consoleMemBaseAddress;
NvU64 consoleMemSize;
MEMORY_DESCRIPTOR *pConsoleMemDesc;
void *pConsoleMem;
};
#ifndef __NVOC_CLASS_DisplayConsoleMemory_TYPEDEF__
#define __NVOC_CLASS_DisplayConsoleMemory_TYPEDEF__
typedef struct DisplayConsoleMemory DisplayConsoleMemory;
#endif /* __NVOC_CLASS_DisplayConsoleMemory_TYPEDEF__ */
#ifndef __nvoc_class_id_DisplayConsoleMemory
#define __nvoc_class_id_DisplayConsoleMemory 0x0f96d3
#endif /* __nvoc_class_id_DisplayConsoleMemory */
extern const struct NVOC_CLASS_DEF __nvoc_class_def_DisplayConsoleMemory;
#define __staticCast_DisplayConsoleMemory(pThis) \
((pThis)->__nvoc_pbase_DisplayConsoleMemory)
#ifdef __nvoc_disp_console_mem_h_disabled
#define __dynamicCast_DisplayConsoleMemory(pThis) ((DisplayConsoleMemory*)NULL)
#else //__nvoc_disp_console_mem_h_disabled
#define __dynamicCast_DisplayConsoleMemory(pThis) \
((DisplayConsoleMemory*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(DisplayConsoleMemory)))
#endif //__nvoc_disp_console_mem_h_disabled
NV_STATUS __nvoc_objCreateDynamic_DisplayConsoleMemory(DisplayConsoleMemory**, Dynamic*, NvU32, va_list);
NV_STATUS __nvoc_objCreate_DisplayConsoleMemory(DisplayConsoleMemory**, Dynamic*, NvU32);
#define __objCreate_DisplayConsoleMemory(ppNewObj, pParent, createFlags) \
__nvoc_objCreate_DisplayConsoleMemory((ppNewObj), staticCast((pParent), Dynamic), (createFlags))
NV_STATUS consolememConstruct_IMPL(struct DisplayConsoleMemory *arg_pConsoleMem);
#define __nvoc_consolememConstruct(arg_pConsoleMem) consolememConstruct_IMPL(arg_pConsoleMem)
void consolememDestruct_IMPL(struct DisplayConsoleMemory *pConsoleMem);
#define __nvoc_consolememDestruct(pConsoleMem) consolememDestruct_IMPL(pConsoleMem)
NV_STATUS consolememStateInitLocked_IMPL(struct OBJGPU *pGpu, struct DisplayConsoleMemory *pConsoleMem);
#ifdef __nvoc_disp_console_mem_h_disabled
static inline NV_STATUS consolememStateInitLocked(struct OBJGPU *pGpu, struct DisplayConsoleMemory *pConsoleMem) {
NV_ASSERT_FAILED_PRECOMP("DisplayConsoleMemory was disabled!");
return NV_ERR_NOT_SUPPORTED;
}
#else //__nvoc_disp_console_mem_h_disabled
#define consolememStateInitLocked(pGpu, pConsoleMem) consolememStateInitLocked_IMPL(pGpu, pConsoleMem)
#endif //__nvoc_disp_console_mem_h_disabled
void consolememStateDestroy_IMPL(struct OBJGPU *pGpu, struct DisplayConsoleMemory *pConsoleMem);
#ifdef __nvoc_disp_console_mem_h_disabled
static inline void consolememStateDestroy(struct OBJGPU *pGpu, struct DisplayConsoleMemory *pConsoleMem) {
NV_ASSERT_FAILED_PRECOMP("DisplayConsoleMemory was disabled!");
}
#else //__nvoc_disp_console_mem_h_disabled
#define consolememStateDestroy(pGpu, pConsoleMem) consolememStateDestroy_IMPL(pGpu, pConsoleMem)
#endif //__nvoc_disp_console_mem_h_disabled
NV_STATUS consolememStateLoad_IMPL(struct OBJGPU *pGpu, struct DisplayConsoleMemory *pConsoleMem, NvU32 flags);
#ifdef __nvoc_disp_console_mem_h_disabled
static inline NV_STATUS consolememStateLoad(struct OBJGPU *pGpu, struct DisplayConsoleMemory *pConsoleMem, NvU32 flags) {
NV_ASSERT_FAILED_PRECOMP("DisplayConsoleMemory was disabled!");
return NV_ERR_NOT_SUPPORTED;
}
#else //__nvoc_disp_console_mem_h_disabled
#define consolememStateLoad(pGpu, pConsoleMem, flags) consolememStateLoad_IMPL(pGpu, pConsoleMem, flags)
#endif //__nvoc_disp_console_mem_h_disabled
NV_STATUS consolememStateUnload_IMPL(struct OBJGPU *pGpu, struct DisplayConsoleMemory *pConsoleMem, NvU32 flags);
#ifdef __nvoc_disp_console_mem_h_disabled
static inline NV_STATUS consolememStateUnload(struct OBJGPU *pGpu, struct DisplayConsoleMemory *pConsoleMem, NvU32 flags) {
NV_ASSERT_FAILED_PRECOMP("DisplayConsoleMemory was disabled!");
return NV_ERR_NOT_SUPPORTED;
}
#else //__nvoc_disp_console_mem_h_disabled
#define consolememStateUnload(pGpu, pConsoleMem, flags) consolememStateUnload_IMPL(pGpu, pConsoleMem, flags)
#endif //__nvoc_disp_console_mem_h_disabled
PMEMORY_DESCRIPTOR consolememGetMemDesc_IMPL(struct OBJGPU *pGpu, struct DisplayConsoleMemory *pConsoleMem);
#ifdef __nvoc_disp_console_mem_h_disabled
static inline PMEMORY_DESCRIPTOR consolememGetMemDesc(struct OBJGPU *pGpu, struct DisplayConsoleMemory *pConsoleMem) {
NV_ASSERT_FAILED_PRECOMP("DisplayConsoleMemory was disabled!");
return NULL;
}
#else //__nvoc_disp_console_mem_h_disabled
#define consolememGetMemDesc(pGpu, pConsoleMem) consolememGetMemDesc_IMPL(pGpu, pConsoleMem)
#endif //__nvoc_disp_console_mem_h_disabled
void consolememSetMemory_IMPL(struct OBJGPU *pGpu, struct DisplayConsoleMemory *pConsoleMem, NvU64 memoryRegionBaseAddress, NvU64 memoryRegionSize);
#ifdef __nvoc_disp_console_mem_h_disabled
static inline void consolememSetMemory(struct OBJGPU *pGpu, struct DisplayConsoleMemory *pConsoleMem, NvU64 memoryRegionBaseAddress, NvU64 memoryRegionSize) {
NV_ASSERT_FAILED_PRECOMP("DisplayConsoleMemory was disabled!");
}
#else //__nvoc_disp_console_mem_h_disabled
#define consolememSetMemory(pGpu, pConsoleMem, memoryRegionBaseAddress, memoryRegionSize) consolememSetMemory_IMPL(pGpu, pConsoleMem, memoryRegionBaseAddress, memoryRegionSize)
#endif //__nvoc_disp_console_mem_h_disabled
#undef PRIVATE_FIELD
#endif // DISPLAY_CONSOLE_MEMORY_H
#ifdef __cplusplus
} // extern "C"
#endif
#endif // _G_DISP_CONSOLE_MEM_NVOC_H_

View File

@@ -572,18 +572,6 @@ typedef struct DisplayInstanceMemory DisplayInstanceMemory;
#endif /* __nvoc_class_id_DisplayInstanceMemory */
struct DisplayConsoleMemory;
#ifndef __NVOC_CLASS_DisplayConsoleMemory_TYPEDEF__
#define __NVOC_CLASS_DisplayConsoleMemory_TYPEDEF__
typedef struct DisplayConsoleMemory DisplayConsoleMemory;
#endif /* __NVOC_CLASS_DisplayConsoleMemory_TYPEDEF__ */
#ifndef __nvoc_class_id_DisplayConsoleMemory
#define __nvoc_class_id_DisplayConsoleMemory 0x0f96d3
#endif /* __nvoc_class_id_DisplayConsoleMemory */
struct KernelHead;
#ifndef __NVOC_CLASS_KernelHead_TYPEDEF__
@@ -1392,7 +1380,6 @@ typedef struct OBJGMMU OBJGMMU;
#define ENG_DPU MKENGDESC(classId(OBJDPU), 0)
#define ENG_FAN MKENGDESC(classId(Fan), 0)
#define ENG_INST MKENGDESC(classId(DisplayInstanceMemory), 0)
#define ENG_CONSOLE_MEM MKENGDESC(classId(DisplayConsoleMemory), 0)
#define ENG_KERNEL_HEAD MKENGDESC(classId(KernelHead), 0)
#define ENG_VOLT MKENGDESC(classId(OBJVOLT), 0)
#define ENG_INTR MKENGDESC(classId(Intr), 0)

View File

@@ -115,7 +115,6 @@ struct KernelDisplay {
NvBool PDB_PROP_KDISP_BUG_2089053_SERIALIZE_AGGRESSIVE_VBLANKS_ONLY_ON_HMD_ACTIVE;
NvBool PDB_PROP_KDISP_IN_AWAKEN_INTR;
struct DisplayInstanceMemory *pInst;
struct DisplayConsoleMemory *pConsoleMem;
struct KernelHead *pKernelHead[4];
const KernelDisplayStaticInfo *pStaticInfo;
NvBool bWarPurgeSatellitesOnCoreFree;
@@ -209,33 +208,6 @@ static inline void kdispDestructInstMem(struct KernelDisplay *pKernelDisplay) {
#define kdispDestructInstMem_HAL(pKernelDisplay) kdispDestructInstMem(pKernelDisplay)
NV_STATUS kdispConstructConsoleMem_IMPL(struct KernelDisplay *pKernelDisplay);
#ifdef __nvoc_kern_disp_h_disabled
static inline NV_STATUS kdispConstructConsoleMem(struct KernelDisplay *pKernelDisplay) {
NV_ASSERT_FAILED_PRECOMP("KernelDisplay was disabled!");
return NV_ERR_NOT_SUPPORTED;
}
#else //__nvoc_kern_disp_h_disabled
#define kdispConstructConsoleMem(pKernelDisplay) kdispConstructConsoleMem_IMPL(pKernelDisplay)
#endif //__nvoc_kern_disp_h_disabled
#define kdispConstructConsoleMem_HAL(pKernelDisplay) kdispConstructConsoleMem(pKernelDisplay)
void kdispDestructConsoleMem_IMPL(struct KernelDisplay *pKernelDisplay);
#ifdef __nvoc_kern_disp_h_disabled
static inline void kdispDestructConsoleMem(struct KernelDisplay *pKernelDisplay) {
NV_ASSERT_FAILED_PRECOMP("KernelDisplay was disabled!");
}
#else //__nvoc_kern_disp_h_disabled
#define kdispDestructConsoleMem(pKernelDisplay) kdispDestructConsoleMem_IMPL(pKernelDisplay)
#endif //__nvoc_kern_disp_h_disabled
#define kdispDestructConsoleMem_HAL(pKernelDisplay) kdispDestructConsoleMem(pKernelDisplay)
NV_STATUS kdispSelectClass_v03_00_KERNEL(struct OBJGPU *pGpu, struct KernelDisplay *pKernelDisplay, NvU32 swClass);

View File

@@ -387,17 +387,6 @@ typedef struct SyncpointMemory SyncpointMemory;
#define __nvoc_class_id_SyncpointMemory 0x529def
#endif /* __nvoc_class_id_SyncpointMemory */
struct ConsoleMemory;
#ifndef __NVOC_CLASS_ConsoleMemory_TYPEDEF__
#define __NVOC_CLASS_ConsoleMemory_TYPEDEF__
typedef struct ConsoleMemory ConsoleMemory;
#endif /* __NVOC_CLASS_ConsoleMemory_TYPEDEF__ */
#ifndef __nvoc_class_id_ConsoleMemory
#define __nvoc_class_id_ConsoleMemory 0xaac69e
#endif /* __nvoc_class_id_ConsoleMemory */
struct DispSfUser;
#ifndef __NVOC_CLASS_DispSfUser_TYPEDEF__
@@ -513,7 +502,6 @@ struct NVOCFwdDeclHack {
struct SystemMemory *PRIVATE_FIELD(SystemMemory_NV01_MEMORY_SYSTEM);
struct OsDescMemory *PRIVATE_FIELD(OsDescMemory_NV01_MEMORY_SYSTEM_OS_DESCRIPTOR);
struct SyncpointMemory *PRIVATE_FIELD(SyncpointMemory_NV01_MEMORY_SYNCPOINT);
struct ConsoleMemory *PRIVATE_FIELD(ConsoleMemory_NV01_MEMORY_FRAMEBUFFER_CONSOLE);
struct DispSfUser *PRIVATE_FIELD(DispSfUser_NVC671_DISP_SF_USER);
struct NvDispApi *PRIVATE_FIELD(NvDispApi_NVC670_DISPLAY);
struct DispSwObj *PRIVATE_FIELD(DispSwObj_NVC372_DISPLAY_SW);

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2008-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2008-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2008-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2008-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2008-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2008-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a

View File

@@ -303,7 +303,7 @@
#define RMCFG_CLASS_NV01_MEMORY_SYNCPOINT 1
#define RMCFG_CLASS_NV01_MEMORY_SYSTEM_OS_DESCRIPTOR 1
#define RMCFG_CLASS_NV01_MEMORY_DEVICELESS 0
#define RMCFG_CLASS_NV01_MEMORY_FRAMEBUFFER_CONSOLE 1
#define RMCFG_CLASS_NV01_MEMORY_FRAMEBUFFER_CONSOLE 0
#define RMCFG_CLASS_NV01_MEMORY_HW_RESOURCES 0
#define RMCFG_CLASS_NV01_MEMORY_LIST_SYSTEM 0
#define RMCFG_CLASS_NV01_MEMORY_LIST_FBMEM 0
@@ -528,7 +528,6 @@
#define RMCFG_MODULE_SF 1 // Display component: Serial Formatter, output protocol formatting
#define RMCFG_MODULE_DISPLAY_INSTANCE_MEMORY 1
#define RMCFG_MODULE_KERNEL_HEAD 1
#define RMCFG_MODULE_DISPLAY_CONSOLE_MEMORY 1
#define RMCFG_MODULE_INTR 0
#define RMCFG_MODULE_MC 0
#define RMCFG_MODULE_KERNEL_MC 0 // Master Control-related code needed in Kernel RM

View File

@@ -1,3 +0,0 @@
#include "g_disp_console_mem_nvoc.h"

View File

@@ -1,3 +0,0 @@
#include "g_console_mem_nvoc.h"

View File

@@ -1,224 +0,0 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
/**************************** Instmem Routines *****************************\
* *
* Display console memory object function Definitions. *
* *
\***************************************************************************/
#define RM_STRICT_CONFIG_EMIT_DISP_ENGINE_DEFINITIONS 0
#include "gpu/disp/kern_disp.h"
#include "gpu/disp/console_mem/disp_console_mem.h"
#include "gpu/mem_mgr/mem_mgr.h"
#include "os/nv_memory_type.h"
/*! @brief Constructor */
NV_STATUS
consolememConstruct_IMPL
(
DisplayConsoleMemory *pConsoleMem
)
{
pConsoleMem->pConsoleMem = NULL;
pConsoleMem->pConsoleMemDesc = NULL;
return NV_OK;
}
/*! @brief destructor */
void
consolememDestruct_IMPL
(
DisplayConsoleMemory *pConsoleMem
)
{
// Free up the console mem descriptors
memdescDestroy(pConsoleMem->pConsoleMemDesc);
pConsoleMem->pConsoleMemDesc = NULL;
}
/*! @brief Set console memory params */
void
consolememSetMemory_IMPL
(
OBJGPU *pGpu,
DisplayConsoleMemory *pConsoleMem,
NvU64 memoryRegionBaseAddress,
NvU64 memoryRegionSize
)
{
pConsoleMem->consoleMemBaseAddress = memoryRegionBaseAddress;
pConsoleMem->consoleMemSize = memoryRegionSize;
}
/*! @brief Initialize console memory descriptor */
static NV_STATUS
consolememInitMemDesc
(
OBJGPU *pGpu,
DisplayConsoleMemory *pConsoleMem
)
{
NV_STATUS status = NV_OK;
MEMORY_DESCRIPTOR *pMemDesc = NULL;
RmPhysAddr *pPteArray = NULL;
if (pGpu->getProperty(pGpu, PDB_PROP_GPU_TEGRA_SOC_NVDISPLAY))
{
//
// FB reserved memory logic not be getting called for Tegra system memory scanout.
// So as ConsoleMem Desc is not getting initialized, currently hardcoding
// dispConsoleMemAttr to NV_MEMORY_UNCACHED this needs to be set based on system configuration/registry parameter.
//
pConsoleMem->consoleMemAttr = NV_MEMORY_UNCACHED;
pConsoleMem->consoleMemAddrSpace = ADDR_SYSMEM;
}
else
{
NV_PRINTF(LEVEL_ERROR, "DisplayConsoleMemory is not supported for non Tegra SOC Display yet.\n");
NV_ASSERT(0);
status = NV_ERR_NOT_SUPPORTED;
goto exit;
}
switch (pConsoleMem->consoleMemAddrSpace)
{
default:
case ADDR_FBMEM:
{
NV_PRINTF(LEVEL_ERROR, "DisplayConsoleMemory is not supported for ADDR_FBMEM address space yet.\n");
NV_ASSERT(0);
status = NV_ERR_NOT_SUPPORTED;
}
break;
case ADDR_SYSMEM:
{
if (pConsoleMem->consoleMemSize > 0)
{
NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR,
memdescCreate(&pConsoleMem->pConsoleMemDesc, pGpu,
pConsoleMem->consoleMemSize,
RM_PAGE_SIZE,
NV_MEMORY_CONTIGUOUS, pConsoleMem->consoleMemAddrSpace,
pConsoleMem->consoleMemAttr,
MEMDESC_FLAGS_SKIP_RESOURCE_COMPUTE),
exit);
pMemDesc = pConsoleMem->pConsoleMemDesc;
memdescSetAddress(pMemDesc, NvP64_NULL);
memdescSetMemData(pMemDesc, NULL, NULL);
memdescSetFlag(pMemDesc, MEMDESC_FLAGS_SKIP_IOMMU_MAPPING, NV_TRUE);
pPteArray = memdescGetPteArray(pMemDesc, AT_GPU);
pPteArray[0] = pConsoleMem->consoleMemBaseAddress;
}
}
break;
}
exit:
// Clean-up is handled by the caller
return status;
}
/*! @brief Free all memory allocations done for display console memory */
static void
consolememDestroy
(
OBJGPU *pGpu,
DisplayConsoleMemory *pConsoleMem
)
{
// Free up the console mem descriptors
memdescDestroy(pConsoleMem->pConsoleMemDesc);
pConsoleMem->pConsoleMemDesc = NULL;
}
NV_STATUS
consolememStateInitLocked_IMPL
(
OBJGPU *pGpu,
DisplayConsoleMemory *pConsoleMem
)
{
NV_STATUS status = NV_OK;
// Memory descriptor has to be created in StateInit call and not in Construct call
// because console memory region parameters are read from linux kernel after
// construct call.
NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR,
consolememInitMemDesc(pGpu, pConsoleMem), exit);
exit:
if (status != NV_OK)
{
consolememDestroy(pGpu, pConsoleMem);
}
return status;
}
void
consolememStateDestroy_IMPL
(
OBJGPU *pGpu,
DisplayConsoleMemory *pConsoleMem
)
{
consolememDestroy(pGpu, pConsoleMem);
}
NV_STATUS
consolememStateLoad_IMPL
(
OBJGPU *pGpu,
DisplayConsoleMemory *pConsoleMem,
NvU32 flags
)
{
return NV_OK;
}
NV_STATUS
consolememStateUnload_IMPL
(
OBJGPU *pGpu,
DisplayConsoleMemory *pConsoleMem,
NvU32 flags
)
{
return NV_OK;
}
PMEMORY_DESCRIPTOR
consolememGetMemDesc_IMPL
(
OBJGPU *pGpu,
DisplayConsoleMemory *pConsoleMem
)
{
return pConsoleMem->pConsoleMemDesc;
}

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2021-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -39,7 +39,6 @@
#include "gpu/device/device.h"
#include "gpu/disp/kern_disp.h"
#include "gpu/disp/inst_mem/disp_inst_mem.h"
#include "gpu/disp/console_mem/disp_console_mem.h"
#include "gpu/disp/head/kernel_head.h"
#include "gpu/disp/disp_objs.h"
#include "gpu_mgr/gpu_mgr.h"
@@ -112,13 +111,6 @@ kdispConstructEngine_IMPL(OBJGPU *pGpu,
return status;
}
pKernelDisplay->pConsoleMem = NULL;
status = kdispConstructConsoleMem_HAL(pKernelDisplay);
if (status != NV_OK)
{
return status;
}
status = kdispConstructKhead(pKernelDisplay);
// We defer checking whether DISP has been disabled some other way until
@@ -135,7 +127,6 @@ kdispDestruct_IMPL
{
// Destroy children
kdispDestructInstMem_HAL(pKernelDisplay);
kdispDestructConsoleMem_HAL(pKernelDisplay);
kdispDestructKhead(pKernelDisplay);
}
@@ -170,37 +161,6 @@ kdispDestructInstMem_IMPL
pKernelDisplay->pInst = NULL;
}
/*! Constructor for DisplayConsoleMemory */
NV_STATUS
kdispConstructConsoleMem_IMPL
(
KernelDisplay *pKernelDisplay
)
{
NV_STATUS status;
DisplayConsoleMemory *pConsole;
status = objCreate(&pConsole, pKernelDisplay, DisplayConsoleMemory);
if (status != NV_OK)
{
return status;
}
pKernelDisplay->pConsoleMem = pConsole;
return NV_OK;
}
/*! Destructor for DisplayConsoleMemory */
void
kdispDestructConsoleMem_IMPL
(
KernelDisplay *pKernelDisplay
)
{
objDelete(pKernelDisplay->pConsoleMem);
pKernelDisplay->pConsoleMem = NULL;
}
/*! Constructor for Kernel head */
NV_STATUS
kdispConstructKhead_IMPL
@@ -488,12 +448,6 @@ kdispStateInitLocked_IMPL(OBJGPU *pGpu,
instmemStateInitLocked(pGpu, pKernelDisplay->pInst), exit);
}
if (pKernelDisplay->pConsoleMem != NULL)
{
NV_CHECK_OK_OR_GOTO(status, LEVEL_ERROR,
consolememStateInitLocked(pGpu, pKernelDisplay->pConsoleMem), exit);
}
if (pKernelDisplay->getProperty(pKernelDisplay, PDB_PROP_KDISP_IMP_ENABLE))
{
// NOTE: Fills IMP parameters and populate those to disp object in Tegra
@@ -515,10 +469,7 @@ kdispStateDestroy_IMPL(OBJGPU *pGpu,
{
instmemStateDestroy(pGpu, pKernelDisplay->pInst);
}
if (pKernelDisplay->pConsoleMem != NULL)
{
consolememStateDestroy(pGpu, pKernelDisplay->pConsoleMem);
}
portMemFree((void*) pKernelDisplay->pStaticInfo);
pKernelDisplay->pStaticInfo = NULL;

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -31,7 +31,6 @@
#include "gpu/gpu.h"
#include "gpu/disp/kern_disp.h"
#include "gpu/disp/inst_mem/disp_inst_mem.h"
#include "gpu/disp/console_mem/disp_console_mem.h"
#include "gpu/subdevice/subdevice.h"
#include "gpu/eng_desc.h"
#include "nv_ref.h"
@@ -3808,13 +3807,6 @@ gpuInitDispIpHal_IMPL
pRmHalspecOwner);
}
void __nvoc_init_funcTable_DisplayConsoleMemory(DisplayConsoleMemory *, RmHalspecOwner *);
void __nvoc_init_dataField_DisplayConsoleMemory(DisplayConsoleMemory *, RmHalspecOwner *);
__nvoc_init_funcTable_DisplayConsoleMemory(KERNEL_DISPLAY_GET_CONSOLE_MEM(pKernelDisplay),
pRmHalspecOwner);
__nvoc_init_dataField_DisplayConsoleMemory(KERNEL_DISPLAY_GET_CONSOLE_MEM(pKernelDisplay),
pRmHalspecOwner);
return NV_OK;
}

View File

@@ -1,98 +0,0 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2018-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include "mem_mgr_internal.h"
#include "mem_mgr/console_mem.h"
#include "gpu/mem_mgr/mem_desc.h"
#include <gpu/disp/kern_disp.h>
#include <gpu/disp/console_mem/disp_console_mem.h>
#include "os/os.h"
#include "gpu/mem_mgr/mem_mgr.h"
#include "rmapi/client.h"
#include "virtualization/hypervisor/hypervisor.h"
#include "class/cl003e.h" // NV01_MEMORY_SYSTEM
#include "class/cl0040.h" // NV01_MEMORY_LOCAL_USER
static PMEMORY_DESCRIPTOR
_getDisplayConsoleMemDesc
(
OBJGPU *pGpu
)
{
MEMORY_DESCRIPTOR *pMemDesc = NULL;
KernelDisplay *pKernelDisplay = GPU_GET_KERNEL_DISPLAY(pGpu);
DisplayConsoleMemory *pConsoleMem = KERNEL_DISPLAY_GET_CONSOLE_MEM(pKernelDisplay);
pMemDesc = consolememGetMemDesc(pGpu, pConsoleMem);
return pMemDesc;
}
NV_STATUS
conmemConstruct_IMPL
(
ConsoleMemory *pConsoleMemory,
CALL_CONTEXT *pCallContext,
RS_RES_ALLOC_PARAMS_INTERNAL *pParams
)
{
NV_STATUS status = NV_OK;
Memory *pMemory = staticCast(pConsoleMemory, Memory);
OBJGPU *pGpu = pMemory->pGpu;
MEMORY_DESCRIPTOR *pMemDesc = _getDisplayConsoleMemDesc(pGpu);
NV_ASSERT_OR_RETURN(RMCFG_FEATURE_KERNEL_RM, NV_ERR_NOT_SUPPORTED);
// Copy-construction has already been done by the base Memory class
if (RS_IS_COPY_CTOR(pParams))
return NV_OK;
if (pMemDesc == NULL)
{
return NV_ERR_INVALID_ARGUMENT;
}
NV_ASSERT(pMemDesc->Allocated == 0);
memdescAddRef(pMemDesc);
pMemDesc->DupCount++;
status = memConstructCommon(pMemory, NV01_MEMORY_SYSTEM, 0, pMemDesc,
0, NULL, 0, 0, 0, 0, NVOS32_MEM_TAG_NONE,
(HWRESOURCE_INFO *)NULL);
if (status != NV_OK)
{
memdescDestroy(pMemDesc);
}
return status;
}
NvBool
conmemCanCopy_IMPL
(
ConsoleMemory *pConsoleMemory
)
{
return NV_TRUE;
}

View File

@@ -181,16 +181,6 @@ RS_ENTRY(
/* Resource Free Priority */ RS_FREE_PRIORITY_DEFAULT,
/* Flags */ RS_FLAGS_ALLOC_PRIVILEGED | RS_FLAGS_ACQUIRE_GPU_GROUP_LOCK,
/* Required Access Rights */ RS_ACCESS_NONE
)
RS_ENTRY(
/* External Class */ NV01_MEMORY_FRAMEBUFFER_CONSOLE,
/* Internal Class */ ConsoleMemory,
/* Multi-Instance */ NV_TRUE,
/* Parents */ RS_LIST(classId(Device)),
/* Alloc Param Info */ RS_NONE,
/* Resource Free Priority */ RS_FREE_PRIORITY_DEFAULT,
/* Flags */ RS_FLAGS_ALLOC_PRIVILEGED | RS_FLAGS_ACQUIRE_GPUS_LOCK,
/* Required Access Rights */ RS_ACCESS_NONE
)
/* Subdevice Children: */
RS_ENTRY(

View File

@@ -5,13 +5,11 @@ SRCS += generated/g_binary_api_nvoc.c
SRCS += generated/g_chips2halspec_nvoc.c
SRCS += generated/g_client_nvoc.c
SRCS += generated/g_client_resource_nvoc.c
SRCS += generated/g_console_mem_nvoc.c
SRCS += generated/g_context_dma_nvoc.c
SRCS += generated/g_dce_client_nvoc.c
SRCS += generated/g_device_nvoc.c
SRCS += generated/g_disp_capabilities_nvoc.c
SRCS += generated/g_disp_channel_nvoc.c
SRCS += generated/g_disp_console_mem_nvoc.c
SRCS += generated/g_disp_inst_mem_nvoc.c
SRCS += generated/g_disp_objs_nvoc.c
SRCS += generated/g_disp_sf_user_nvoc.c
@@ -70,7 +68,6 @@ SRCS += arch/nvalloc/unix/src/osunix.c
SRCS += arch/nvalloc/unix/src/power-management-tegra.c
SRCS += arch/nvalloc/unix/src/registry.c
SRCS += arch/nvalloc/unix/src/rmobjexportimport.c
SRCS += arch/nvalloc/unix/src/unix_console.c
SRCS += interface/deprecated/rmapi_deprecated_utils.c
SRCS += interface/rmapi/src/g_finn_rm_api.c
SRCS += src/kernel/core/hal/hal.c
@@ -93,7 +90,6 @@ SRCS += src/kernel/gpu/device_ctrl.c
SRCS += src/kernel/gpu/device_share.c
SRCS += src/kernel/gpu/disp/arch/v03/kern_disp_0300.c
SRCS += src/kernel/gpu/disp/arch/v04/kern_disp_0402.c
SRCS += src/kernel/gpu/disp/console_mem/disp_console_mem.c
SRCS += src/kernel/gpu/disp/disp_capabilities.c
SRCS += src/kernel/gpu/disp/disp_channel.c
SRCS += src/kernel/gpu/disp/disp_common_kern_ctrl_minimal.c
@@ -132,7 +128,6 @@ SRCS += src/kernel/gpu_mgr/gpu_db.c
SRCS += src/kernel/gpu_mgr/gpu_group.c
SRCS += src/kernel/gpu_mgr/gpu_mgmt_api.c
SRCS += src/kernel/gpu_mgr/gpu_mgr.c
SRCS += src/kernel/mem_mgr/console_mem.c
SRCS += src/kernel/mem_mgr/io_vaspace.c
SRCS += src/kernel/mem_mgr/mem.c
SRCS += src/kernel/mem_mgr/os_desc_mem.c

View File

@@ -1,4 +1,4 @@
NVIDIA_VERSION = 540.3.2
NVIDIA_VERSION = 540.2.0
# This file.
VERSION_MK_FILE := $(lastword $(MAKEFILE_LIST))