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22e582e01d1c9c258ac56873f1aa0822acb695f3
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253 Commits

Author SHA1 Message Date
Narayan Reddy
22e582e01d osi: core: move err injec code to vltest 
issue: HSI error injection logic is enabled by default
and is exposed as an ioctl which is a safety-related concern.

fix: move HSI error injection code only for
VLTEST build

Jira NET-1235
Bug 4449611

Change-Id: I9a23895249c7db52586a83a042cf514ef0e5faae
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/3077931
(cherry picked from commit 5af42a33298f5408b4209223802139501acf9d39)
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/3132843
Signed-off-by: Revanth Kumar Uppala <ruppala@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/3293329
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
 2025-02-07 00:25:06 -08:00
Mohan Thadikamalla
163e9cf67c osi: core: Add OSI_CMD_READ_HSI_ERR command 
Issue:
Observed HSI diagnostic timer execution is taking
more than MAX_PROC_TIME due to OSI_CMD_READ_MMC
execution time. As this is reading 151 MMC
registers for MGBE and 91 registers for EQOS.

Fix:
As this OSI_CMD_READ_MMC command execution is not
meeting the MAX_PROC_TIME, add new OSI_CMD_READ_HSI_ERR
command only to read 5 MMC error registers.

Bug 4069585

Change-Id: I38a10b7f09ac7614d548b5caa4203f1c94889908
Signed-off-by: Mohan Thadikamalla <mohant@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2895845
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-05-10 06:28:28 -07:00
Sanath Kumar Gampa
cf366ff65c osi: MACSEC changes to add byp lut with VF MAC 
Issue: If the supplicant is killed for some reason Data would flow
plain on that interface, this is not expected

Fix: All the unicast frames from/to the MACSEC interfaceare
authenticated or dropped. Below are the detailes of the changes:

1. Update Rx bypass LUT such that frames on the MACSEC VF(on which
supplicant is launched) would be authenticated or dropped.
2. A dummy SCI LUT is created with the MACSEC VF MACID such
that all the tx frames from MACSEC VF would be sectagged.
3.As part of delete SCI LUT, added the an_valid map as 0 such
that Invalid_SC_AN errors are seen when frames are transmitted
post session termination.

Added below cleanup changes as well to this CL

1. Remove osi_macsec_en API and have single API to init and deinit
2. Remove explicit command from supplicant to set control port and
set protected frames. Handle the same in osi_macsec_init

Bug 3984665

Change-Id: I9e0cdd9862d175b034478b7c5d59c1397c39c933
Signed-off-by: Sanath Kumar Gampa <sgampa@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2875774
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Mahesh Patil <maheshp@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-04-21 11:34:42 -07:00
Rakesh Goyal
f3a4320760 osi: core: add m2m sync error detection and reporting 
Issue: New safety requirement to detect
and report M2M eqos sync error.

Fix: add support for error detection and
reporting.

Bug 4033627

Change-Id: I377b8f11a6518841e21fe9e1ab3682447b31138b
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2875581
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-04-01 10:51:54 -07:00
Mahesh Patil
047a42bef8 osi: core: Update eqos pad calibration 
Updated eqos pad calibration for qnx

Bug 2831220
Bug 3500401

Change-Id: I2301e66ae8bc905b8a61deb37694b0875a20173d
Signed-off-by: Mahesh Patil <maheshp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2846450
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2023-02-25 11:07:02 -08:00
Mohan Thadikamalla
43efa1f979 nvethernetrm: Fix Linux safety builds issues 
Issue:
Observed compilation issues
on the nvethernet driver
for DRIVE Linux safety builds.

Fix:
Move out required defines from OSI_STRIPPED_LIB

Bug 3939603

Change-Id: I2418b2b3bd21b5ed4e7e75a3b585f2f542a451c1
Signed-off-by: Mohan Thadikamalla <mohant@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2843094
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2023-02-23 15:22:24 -08:00
Narayan Reddy
a65d45e6c9 osi: core: add PHY write verify err inject support 
Add PHY write verify HSI error injection support

Bug 3510868

Change-Id: I371f24b9eb9a9e422d3e61e76820d32f51611aec
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2858194
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2023-02-18 02:36:54 -08:00
Hareesh Kesireddy
086e4f09fc osi: l3l4: disable IPFE when wildcard enabled 
- Having IPFE set causes MAC to drop all packets which
  do not match with configured l3l4 filters. Hence
  disable IPFE related code using a compile switch.

Bug 3576506

Change-Id: Ibf6c0e724141c9f7dc16a41de476057fc8eb7835
Signed-off-by: Hareesh Kesireddy <hkesireddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2834367
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2023-02-17 07:20:42 -08:00
Narayan Reddy
3fff0cd9ba osi: core: fix Doxygen warnings 
1) Fix Doxygen warnings
2) include debug.h code only when OSI_DEBUG
is defined

JIRA NET-570

Change-Id: I5d002b959925bec3898cc2faafe3f506b3c9bd22
Signed-off-by: Narayan Reddy<narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2847327
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2023-02-04 16:49:50 -08:00
Bibhay Ranjan
91511ff641 nvethernetrm: Log compilation using LOG_OSI flag 
Based on the cflag LOG_OSI logging code will be
compiled

Bug 3759976
Bug 3954687

Change-Id: Ief57c926bc4d3b1d0d251e5da77d0eb73d928d62
Signed-off-by: Bibhay Ranjan <bibhayr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2811077
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2023-01-27 20:00:22 -08:00
Bhadram Varka
59afaa132c osi: dma: move *_dma.c and debug.c out of safety 
eqos_dma.c, mgbe_dma.c and debug.c files not used
for safety builds. Move this out of safety build
compilation

Bug 3949980

Change-Id: I5922446e0098717061ae1c181ccd462b4566f299
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2846847
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-01-23 22:37:25 -08:00
Bhadram Varka
32fa453326 nvethernetrm: move pause-frame macros 
Pause frames not programmed in safety builds
so move those macros under non safety builds.

Bug 3932946

Change-Id: Iff89373c4ffd20b35589f3f3852ef191f5f54acf
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2844105
Reviewed-by: Mohan Thadikamalla <mohant@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-01-19 07:52:33 -08:00
Diptanshu Jamgade
8089f79df8 osi: core: Update OSI_PAUSE_FRAMES_DISABLE 
Issue:
Wrong value of OSI_PAUSE_FRAMES_DISABLE
enabling flow control at probe.

Fix:
Update OSI_PAUSE_FRAMES_DISABLE as per
dt-bindings to disable pause frame support
as a default

Bug 3932946

Change-Id: I0d5227c06b4b5627dc47f5542bbf5d2a0e7ed3bf
Signed-off-by: Diptanshu Jamgade <djamgade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2839839
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2023-01-14 18:12:09 -08:00
Rakesh Goyal
6a8f317407 osi: core: validate input argument 
Validate input argument for exported
data structures

Bug 3789594

Change-Id: Ib16ace8cc933fcfce635f82ad0c89dc5791c999b
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2827045
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-12-16 03:33:19 -08:00
Mohan Thadikamalla
0ee7e64669 osi: core: Cleanup MAC start and stop ioctls 
Issue:
Observed STOP MAC ioctl
failure on standard builds.

Fix:
-Update ivc_core_deinit to call
core_deinit command
- As MAC start and stop is part
of init/deinit clean up these IOCTLs

Bug 3889287

Change-Id: I07ba4dd5dc2e9630a4e4001199c6aae24ade6c70
Signed-off-by: Mohan Thadikamalla <mohant@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2819152
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-12-13 06:22:38 -08:00
Rakesh Goyal
379f8ae9a5 osi: core: enable m2m by default 
Mac2Mac sync code enable by default.

Bug 3883951

Change-Id: Iaf09dba80be0d180bf23dff70c65a8e6f34ab9d2
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2814598
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-12-08 00:05:39 -08:00
Mahesh Patil
de2d2e2fcc osi: core: eqos pad calibration reg offsets 
Make eqos pad calibration reg ETHER_QOS_AUTO_CAL_CONFIG_0 offsets
AUTO_CAL_PD_OFFSET and 	AUTO_CAL_PU_OFFSET configurable as per
customer boards tuning

Bug 3846183

Change-Id: Ic305ced0d8324d7b9f5a03ffa7d6c21f7a12d9e5
Signed-off-by: Mahesh Patil <maheshp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2805651
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Nagaraj Annaiah <nannaiah@nvidia.com>
Reviewed-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-12-08 00:01:22 -08:00
Hareesh Kesireddy
6f0c3604d0 osi: l3l4: split perfect inv bit for each field 
- HW has separate Inverse Match bits in l3l4 control register for each
  source address, destination address, source port and destination port.
- Hence, added separate Inverse match bits for all the 4 fields in
  osi l3l4 structure to provide flexibility for l3l4 users.
- Fixed validation parameter sequence to validate l3l4 parameters
  before processing filter data.

Bug 3576506
Bug 3825731

Change-Id: Id7f8939acd92ad5799f2ad0d7cef5d4fcb7e00c5
Signed-off-by: Hareesh Kesireddy <hkesireddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2820517
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-12-05 20:44:28 -08:00
Bibhay Ranjan
aa21c9e4bf nvethernet: Fix the incorrect code in CFLAGS 
Issue:
Few places incorrect CFLAGS are used.
OSD based flags cannot be used in OSI

Fix:
Move the code under correct CFLAGS
remove the OSD based codes

Note:
The OSD based logging need to be reimplemnedted
by  the macsec module.

Bug 3759976

Change-Id: I407b945a24028792f146bc08adf67428612978c3
Signed-off-by: Bibhay Ranjan <bibhayr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2811917
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-12-05 20:33:14 -08:00
Bibhay Ranjan
a315ac8155 nvethernetrm: Universal config.tmk for all OS 
Issue:
Currently each OS defines OSI CFLAGS locally which
creates issues in structure memory, if mismatched

Fix:
Move all the shared CFLAGS to OSI controlled config.tmk

Bug 3759976

Change-Id: I9d957ebbc2fc8a176ef70d42b5ae6a9ccb7f342f
Signed-off-by: Bibhay Ranjan <bibhayr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2808840
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-12-05 20:33:09 -08:00
Hareesh Kesireddy
3be2a1e7f3 osi: l3l4: support four tuple for l3l4 fitlers 
Following implemented for non safety.
- Moved l3l4 filter index assignment to OSI for better management.
  OSDs need not worry about managing l3l4 filter indexes.
- Restructured code to support four tuple for osi l3 l4 filter.
- Added a wildcard l3l4 filter at highest filter index to allow the
  the packets to receive on default dma channel (from l2 filter) for the
  packets which do not match with any of the configured l3 l4 filters.
- For IPv4, allowed user to configure all SA+DA+SP+DP together at a
  single l3l4 filter index or user can selectively add any
  combination among them (e.g, only SA or SP+DA, etc.).
- For IPV6, only restriction is to add either of the SA or DA only
  but not both at a time at a single l3l4 index.

Bug 3576506
Bug 3825731

Change-Id: I20bd197f5bf793a77f5e723d1875875d442af66e
Signed-off-by: Hareesh Kesireddy <hkesireddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2802626
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-11-30 06:16:47 -08:00
Mohan Thadikamalla
2ac6b6f645 osi: core: Update ethernet stats to VF osi core 
Issue:
When the ethernet server got enabled,
OSI core stats are not getting
updated to VF's.

Fix:
Add IOCTL to copy OSI core stats
into VF's OSI core structure.

Bug 3763499

Change-Id: Ib0a957ff90805b7e716d8f5994e0a65d63660c1e
Signed-off-by: Mohan Thadikamalla <mohant@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2808680
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-11-24 18:12:30 -08:00
Rakesh Goyal
9597f795e4 nvethernetrm: take arguments field out of union 
ioctl_data as well as arguments required to
support PTP IOCTL in ASIL path

Bug 3868362

Change-Id: Id6d3cf7626b7426a8e44a086335501cf86f50d62
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2807393
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-11-24 00:39:47 -08:00
Narayan Reddy
67ffdc1d3c osi: core: merge ioctl calls to osi_core_init 
By default enable below settings during core init,
so that we can avoid the same by calling from Guest OS

1) bring mac out of reset
2) forward error packets
3) set mode to full duplex
4) enable rx csum
5) Configure PTP
6) start mac

Bug 3701869

Change-Id: I26578b7a0b8c91c4880d9ef6a3a171ab1c1945aa
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2809705
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-11-23 08:06:55 -08:00
Sanath Kumar Gampa
70e0744729 osi: Removal of global variables related to HSI 
Removed Report ID and error codes from global and moved them to local.

Bug 3857897

Change-Id: Ib1a5d70782e8c8e26ca3f04316f7f2bb2b03735f
Signed-off-by: Sanath Kumar Gampa <sgampa@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2806355
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Mohan Thadikamalla <mohant@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-11-17 07:19:11 -08:00
Bhadram Varka
2fb7d1d324 osi: eqos: configure MTL RXFIFO and PFC threshold 
MTL RXFIFO memory available for EQOS - 64KB
Below is the distribution -
1) Q0 - 36KB
2) Q1 to Q6 - 2KB
3) Q8 - 16KB

It also update flow control parameters for
the Rx queues
1) Q0 - FULL_MINUS_16K
2) Q1 to Q7 - FULL_MINUS_1_5K

Bug 3787316

Change-Id: I59031ad03f02d5804fcc65cb24e05559e6358500
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2789263
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-11-14 20:55:16 -08:00
Sanath Kumar Gampa
a8387466cd osi:core: Address review comments on HSI changes 
Bug 3590939
Change-Id: Id54b61871d5152c58376781c421077c62174bc2f
Signed-off-by: Sanath Kumar Gampa <sgampa@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2801135
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-11-09 11:19:09 -08:00
Om Prakash Singh
70bf517f34 osi: core: add support for HSI error injection 
Add new osi ioctl command OSI_CMD_HSI_INJECT_ERR for
IP specific error injection configuration.
different type of error is injected based on input
error code value.

Bug 3806923
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Change-Id: I01269d211293aa67471fadcf6e349f049f9c1a51
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2786840
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-11-09 11:18:59 -08:00
Om Prakash Singh
aaf12511a3 osi: core: enable HSI_SUPPORT and fix MISRA issue 
enable HSI_SUPPORT at OSI unit level and address
misra issues.

Bug 3590939
Change-Id: Ia87bafe077553d0140219047a578100c3f5684aa
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2784224
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-11-09 11:18:49 -08:00
Om Prakash Singh
b35c75e1db osi: core: add SW error code for XPCS write failure 
As return specific error code on PCS read-after-write fails.
And add SW error code to report for FSI on failure.

Bug 3792855

Change-Id: I51b8a088247d98621750af7bb42100a078c083c2
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2781195
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-11-09 11:18:39 -08:00
Om Prakash Singh
30475a497f osi: core: use u16 type for reporter ID 
reporter IDs are u16 type for error reporting API

Bug 3590939

Change-Id: Iae56610dce407fbf8d4b3a1ea67d3f568c22a681
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2781194
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-11-09 11:18:29 -08:00
Om Prakash Singh
36a6a3d487 osi: core: macsec: enable SECURE_REG_VIOL intr 
enable SECURE_REG_VIOL interrupt to generate
uncorrected Error for illegal access errors
for MACSEC Registers

Bug 3590939

Change-Id: I4f50c1b709ed3662eb6062dcbbbe42a8e36f101c
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2767836
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-11-09 11:18:14 -08:00
Narayan Reddy
81242cd874 osi: core: Fix misc optimizations 
1) remove duplicate checks
2) remove unused APIs
3) moved to STRIPPED if not used

Bug 3701869

Change-Id: Id6ba8649ff5135affa949ea8dde947db10003f80
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2784309
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-11-04 16:17:25 -07:00
Zhongjie Wang
4a9893133d osi: dma: using swcx to store nvsocket rx data idx 
- Added a data_idx field in rx swcx to store nvsocket data index.
  Tx data idx has been added in a earlier commit.

Jira NET-242

Change-Id: I81e4c41efceabab4dbf556ac3f57ca26e0737a81
Signed-off-by: Zhongjie Wang <zhowang@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2778530
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Ajay Gupta <ajayg@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-10-25 18:05:24 -07:00
Diptanshu Jamgade
4a8382d6fb nvethernetrm: update OSI_PAUSE_FRAMES_ENABLE macro 
Update OSI_PAUSE_FRAMES_ENABLE as per the updated
DT-bindings.

Bug 3529804

Change-Id: Ice290ef85c370956cec2a7b29cc0b6f82ac39093
Signed-off-by: Diptanshu Jamgade <djamgade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2790122
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-10-20 02:13:37 -07:00
Bhadram Varka
492fa1868d osi: core: remove safety backup and save/restore code 
Bug 3701869

Change-Id: Ib2b139db7c8829d01f57581a18506ba6641cd4ab
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2787478
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-10-06 17:26:44 -07:00
Narayan Reddy
4c85b5e49e osi: core: Fix MISRA issues 
===== DIFF ======
Total misra violation count changed by -71
Rule: MISRA_C-2012_Directive_4.5 Diff: -3
Rule: MISRA_C-2012_Rule_11.1 Diff: -5
Rule: MISRA_C-2012_Rule_11.3 Diff: -1
Rule: MISRA_C-2012_Rule_11.5 Diff: 1
Rule: MISRA_C-2012_Rule_12.1 Diff: -6
Rule: MISRA_C-2012_Rule_12.2 Diff: -7
Rule: MISRA_C-2012_Rule_15.1 Diff: -1
Rule: MISRA_C-2012_Rule_15.6 Diff: -1
Rule: MISRA_C-2012_Rule_16.1 Diff: -1
Rule: MISRA_C-2012_Rule_16.3 Diff: -1
Rule: MISRA_C-2012_Rule_17.7 Diff: -4
Rule: MISRA_C-2012_Rule_17.8 Diff: -5
Rule: MISRA_C-2012_Rule_2.4 Diff: -4
Rule: MISRA_C-2012_Rule_2.5 Diff: -18
Rule: MISRA_C-2012_Rule_20.5 Diff: -1
Rule: MISRA_C-2012_Rule_5.6 Diff: -1
Rule: MISRA_C-2012_Rule_5.8 Diff: -1
Rule: MISRA_C-2012_Rule_5.9 Diff: -4
Rule: MISRA_C-2012_Rule_8.3 Diff: -2
Rule: MISRA_C-2012_Rule_8.9 Diff: -5
Rule: MISRA_C-2012_Rule_9.5 Diff: -1
Rule: Total Diff: -71

Bug 3695218

Change-Id: I9bd904f8a77195ca34fb2d47639a214f0083ccf7
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2776281
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-09-29 19:38:37 -07:00
Bhadram Varka
5fba408c31 osi: mgbe: configure MTL RXFIFO and flow control 
MTL RXFIFO memory available for MGBE - 192KB
Below is the distribution -
1) Q0 - 160KB
2) Q1 to Q8 - 2KB
3) Q9 - 16KB

It also update flow control parameters for
the Rx queues
1) Q0 - FULL_MINUS_32K
2) Q1 to Q9 - FULL_MINUS_1_5K

Bug 3787316

Change-Id: I3049d742e784aa3273090191856482121a3e1d3e
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2779472
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-09-28 12:47:58 -07:00
Rakesh Goyal
80575def01 nvethernetrm: support L2 filter from ioctls 
Move L2 and L3 structure to osi_core as new structure
at OSD level created to user data.
Number of max L2 filter check based on mac version.

Bug 3659048

Change-Id: I9e1e7c015e8c3a0579a363ccd6bcfe9d84e67eea
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2777333
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-09-24 13:21:25 -07:00
Rakesh Goyal
fdf60cfb28 nvethernetrm: update filename and location 
Update file name to be added in SDK

Bug 3704251

Change-Id: Ibc6b53a6c152973f249d8af94a33cd537b1ea7ec
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2778302
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-09-21 01:13:51 -07:00
Rakesh Goyal
6b4ddb8043 nvethernetrm: take exported ioctl related header out 
Issue: SW needs to support IOCTL on safety builds and
these header should be exposed to user

Fix: Create new header file which is exposed externally
     Fix Coverity issues
     Enable TSN and FRP for safety build
     Optimize the code between eqos and mgbe

Bug 3704251

Change-Id: I2807f8283a296de1f96d3f902cb4ad5a4781be50
Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2759333
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
 2022-09-12 20:52:00 -07:00
Hareesh Kesireddy
744ff93208 osi: dma: provide choice for driver to skip dmb 
- Added a skip dmb flag in tx_ring to let driver
  decide whether barrier need to be performed or not.
- Using rsvd1 in tx swcx for storing nvsocket data index.

Bug 3672681
Jira NET-332

Change-Id: Ie35b7487c6ba2ae92acd46ec51ec4342b856e404
Signed-off-by: Hareesh Kesireddy <hkesireddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2771038
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-09-11 23:37:21 -07:00
Bhadram Varka
f77e6e4eb6 osi: dma: Fix MISRA issues 
===== DIFF ======
Total misra violation count changed by -162
Rule: MISRA_C-2012_Directive_4.6 Diff: -13
Rule: MISRA_C-2012_Directive_4.9 Diff: 5
Rule: MISRA_C-2012_Rule_10.1 Diff: -2
Rule: MISRA_C-2012_Rule_11.3 Diff: -15
Rule: MISRA_C-2012_Rule_11.5 Diff: 15
Rule: MISRA_C-2012_Rule_12.2 Diff: -2
Rule: MISRA_C-2012_Rule_15.1 Diff: 64
Rule: MISRA_C-2012_Rule_15.4 Diff: 5
Rule: MISRA_C-2012_Rule_15.5 Diff: -76
Rule: MISRA_C-2012_Rule_15.6 Diff: -1
Rule: MISRA_C-2012_Rule_15.7 Diff: -2
Rule: MISRA_C-2012_Rule_16.4 Diff: -1
Rule: MISRA_C-2012_Rule_2.3 Diff: -2
Rule: MISRA_C-2012_Rule_2.4 Diff: -1
Rule: MISRA_C-2012_Rule_2.5 Diff: -106
Rule: MISRA_C-2012_Rule_5.7 Diff: -1
Rule: MISRA_C-2012_Rule_5.9 Diff: -6
Rule: MISRA_C-2012_Rule_8.13 Diff: -18
Rule: MISRA_C-2012_Rule_8.2 Diff: -1
Rule: MISRA_C-2012_Rule_8.3 Diff: -2
Rule: MISRA_C-2012_Rule_8.9 Diff: -2
Rule: Total Diff: -162
*******************CERT report
Analysis summary report:
Defects/Coding rule violations found : 47 Total
	CERT_INT30-C 	 47 - (Deviation Not approved)
	Total 	 47
===== DIFF ======
Total cert violation count changed by -16
Rule: CERT_INT30-C Diff: -16
Rule: Total Diff: -16
*******************CERT ADV report
Analysis summary report:
Defects/Coding rule violations found : 36 Total
	CERT_DCL37-C (Full Deviation) 	 36 - (Deviation Approved)
	Total 	 36
===== DIFF ======
Total cert_adv violation count changed by -76
Rule: CERT_DCL37-C Diff: -62
Rule: CERT_EXP39-C Diff: -14
Rule: Total Diff: -76

JIRA NET-224

Change-Id: I2084da3d98646e6f9fb7933adbee39343e509e8d
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2744955
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-09-09 11:15:17 -07:00
Narayan Reddy
28053a560e osi: core: fix misra 2.x rules 
===== DIFF ======
Total misra violation count changed by -591
Rule: MISRA_C-2012_Rule_2.2 Diff: -1
Rule: MISRA_C-2012_Rule_2.3 Diff: -3
Rule: MISRA_C-2012_Rule_2.4 Diff: -2
Rule: MISRA_C-2012_Rule_2.5 Diff: -585
Rule: Total Diff: -591

Bug 3695218

Change-Id: I57e85ba94f434cb3bd729b4f5f75bb4a592fb279
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2768383
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-09-02 04:58:41 -07:00
Narayan Reddy
f816ebf1e8 osi: core: fix misra 4.6 rule 
===== DIFF ======
Total misra violation count changed by -240
Rule: MISRA_C-2012_Directive_4.6 Diff: -240
Rule: Total Diff: -240

Bug 3695218

Change-Id: Ida2d3a775872637eda3058ea361a00346c86f7f7
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2767895
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
 2022-08-30 00:05:29 -07:00
Narayan Reddy
3bf72bdd4a mgbe: core: call lane bringup on local fault 
call lane bringup when there are local faults
and stop the network queues.
restart the network queues when proper link is up

Bug 3744088
Bug 3654543
Bug 3665378

Change-Id: I33180c965b29543dcdfb0d8f611be06b6b97a42e
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2730882
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com>
Reviewed-by: Krishna Thota <kthota@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2022-08-17 10:38:17 -07:00
Bhadram Varka
0417da8260 osi: dma: compile out not required code for Safety QNX 
Bug 200770328

Change-Id: I8ee51c89954b47ceff5e261b6a2d8cc6b3f16f36
Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2735897
Reviewed-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2022-08-06 05:04:20 -07:00
Narayan Reddy
f971d40513 osi: core: skip out not required code for Safety QNX 
Bug 3701869

Change-Id: Ic1f676708ff6e3faf7dbed09f0e7048448252e57
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2739627
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Bhadram Varka <vbhadram@nvidia.com>
 2022-08-06 05:04:15 -07:00
Sanath Kumar Gampa
aedaf1db80 osi: macsec API cleanup 
Bug 3709820

Change-Id: I935ca2d373bea1b7d8b15f790ffc3719fa9d0881
Signed-off-by: Sanath Kumar Gampa <sgampa@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2738227
Reviewed-by: Bhadram Varka <vbhadram@nvidia.com>
Reviewed-by: Mahesh Patil <maheshp@nvidia.com>
Reviewed-by: Srinivas Ramachandran <srinivasra@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2022-07-26 10:06:20 -07:00
Narayan Reddy
be51977e02 osi: core: combine config_fw_err_pkts 
Bug 3701869

Change-Id: I5a0fe6e24d8aa69054a18f927d7135552482e8b9
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/kernel/nvethernetrm/+/2739131
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2022-07-13 16:28:15 -07:00