This is needed when building HWPM driver locally without
NVIDIA build system.
- driver.c: use kernel version check to select the correct
signature of class:devnode
- mem_mgmt_utils.c:
- use kernel version check to provide correct parameter
of MODULE_IMPORT_NS macro
- use kernel version check to select the correct signature
of get_user_pages function
- mem_mgmt_utils.h: use kernel version check to select
between iosys-map or dma-buf-map
Bug 5120925
Change-Id: Ib33afc4d99056d5b872f0d4362e0e6c25eb7b64a
Signed-off-by: Besar Wicaksono <bwicaksono@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3306471
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Yifei Wan <ywan@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
The driver will use brute force approach and iterate over
the static instance/element array when the corresponding
*_overlimit is set to true. However, during initialization
the driver may still allocate a dynamic array for the
instance/element, which will be unused (waisted).
This patch reuse the *overlimit option to also disable
the dynamic allocation. This is also needed to configure
IP that has instances without a regular address stride
pattern, like the routers in different dielets in next4.
JIRA MSST-832
Change-Id: Ia616435c38f27962a1632e3d08eb3e9cfe9f0ba8
Signed-off-by: Besar Wicaksono <bwicaksono@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3298868
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Yifei Wan <ywan@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Fix the shift value for incorporating element fs
mask to the final IP floorsweeping mask.
The floorsweeping info contains the fs info
of all the elements in the IP. The patch fixes
an issue for IP with more than two instances,
where the element fs info of 3rd instance
onwards are not calculated correctly.
Change-Id: Idfa69171b3630ca62f684f7130400a55d451f2ff
Signed-off-by: Besar Wicaksono <bwicaksono@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3307893
Reviewed-by: Yifei Wan <ywan@nvidia.com>
Reviewed-by: Vedashree Vidwans <vvidwans@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
When an IP is not enabled in HWPM Makefile, an error
message is given out. This has a higher log_level
which causes the Kernel Warning test in GVS to fail.
Hence, depreciate the log level to warning as not enabling
an IP for HWPM profiling is not an error per say.
Bug 4345706
Signed-off-by: vasukis <vasukis@nvidia.com>
Change-Id: Ib85931c06f42168e86aea5b0b2cb208f93216042
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3284317
Reviewed-by: Yifei Wan <ywan@nvidia.com>
Reviewed-by: Besar Wicaksono <bwicaksono@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
The HWPM driver fails to be with Linux v6.13 because of the following
two issues:
1. In Linux v6.13, commit cdd30ebb1b9f ("module: Convert symbol
namespace to string literal") updated the MODULE_IMPORT_NS macro to
take a string literal as an argument in Linux v6.13. Use conftest to
detect if MODULE_IMPORT_NS takes a string literal as an argument and
update the HWPM driver accordingly.
2. The following build error is observed:
In file included from os/linux/clk_rst_utils.c:17:
include/linux/reset.h:30:49:
error: implicit declaration of function ‘BIT’
[-Werror=implicit-function-declaration]
30 | #define RESET_CONTROL_FLAGS_BIT_ACQUIRED BIT(2)
| ^~~
Fix the above by including the 'bits.h' header file.
Bug 4991705
Change-Id: I26cba920a0b0af251fd2f623ab9326ecafef5a5f
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3261738
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Besar Wicaksono <bwicaksono@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Currently, HWPM driver checks regops address to validate that the
address belongs to an IP allowlist that is reserved for profiling.
However, it is possible that the allowlist doesn't include all register
offset that are required for profiling. This scenario is often
encountered during early stages of bringup. This patch adds a debugfs
node to make HWPM driver skip allowlist check. This change will allow
users to dynamically skip allowlist check when debugfs is available.
JIRA THWPM-65
Change-Id: Ic85a1c7fac6a95f7cde532f3bdf6040bbcc7f5f3
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3241080
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: Vasuki Shankar <vasukis@nvidia.com>
The num_entries variable indicates the number of credit
programming requests that is sent from user space test app.
Current implementation has been configured to loop through
this in such a way that leads to an additional loop.
This change fixes the issue.
Bug 4571175
Signed-off-by: vasukis <vasukis@nvidia.com>
Change-Id: Id9fd4315e5ef470c697bf2815e16b42e746edf45
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3212369
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Add IOCTL infra for Cross trigger programming in HWPM Driver.
Cross Triggering involves the access to secure register, which
cannot be issued by user space application. Hence, implement
cross trigger functionality in HWPM kernel driver.
Bug 4571175
Signed-off-by: vasukis <vasukis@nvidia.com>
Change-Id: Ia46227c4678d3ee282ebae8c58e116feaf4e59cb
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3147289
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
- Add HWPM Driver support for Credit Programming. Credit
programming can be accomplished by read-write into
secure HWPM registers, which cannot come in as a reg_ops
request from User Space application.
- Implement an empty credit programming handler for T234 and
th500.
- Implement OS agnostic HALs for Credit programming.
Bug 4571175
Signed-off-by: vasukis <vasukis@nvidia.com>
Change-Id: I18dcff47dfe461bce3dcb6d78f39ff0156b4b0a5
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3127013
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
HWPM driver uses nested structures and arrays of structures. The IP
structure setup logic allocates pointer arrays based on dynamic list of
IPs and aperture addresses. This dynamic list is required to search
given regops address in less amount of time.
However, there is a chance that the number of pointers computed
dynamically is huge. And huge amount of memory will be required for the
dynamic pointers array, which is impractical.
This, this patch modifies ip structure setup and address to aperture
conversion logic to use static indexes if the pointer array size is
huge.
This patch modifies relevant functions to always use static arrays
to access instance and aperture structures.
If dynamic pointers array is allocated, the patch adds logic to
translate dynamic index to static index using inst_index_mask for
instances and new added aperture_index for element level structures.
Add/update few log message to improve relayed information.
Bug 4707244
Change-Id: Ib4847e6575f82b628a3ce838ad69196a4bc08fed
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3186843
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
This patch fixes issues found during testing
and guidance provided by devtools. The following
is changed in this patch:
1. mcf_iobhx and mcf_ocu are merged into a single mcf_soc IP.
2a. c2c is changed from 2 instances to 1.
2b. Remove C2CS0/1 which are the broadcast apertures.
Also remove the allowlist offset specific to broadcast
aperture.
3. mss_hub is changed from 1 instance to 8.
4. mss_channel is changed from 1 instance to 32.
5. mc0 perfmux is added to mcf_clink.
6. mcf_core is changed from 1 instance to 8.
7. License headers updated where necessary.
8. c2c allowlist updated to have just the offsets common
to all links.
9. Added a verbose comment explaining the design of
th500_hwpm_force_enable_ips()
10. Added back validate_current_config module parameter
as many systems still don't support fuses.
11. If all F's are read back for a regop in ip_readl(),
return -ENODEV.
There is a corresponding patch to update the python scripts
that generated many of the C and header files.
Bug 4287384
Change-Id: I8e14b0165dfa1abb9f5e04de577a41f0eb278246
Signed-off-by: Vishal Aslot <vaslot@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3134365
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Eric Lu <ericlu@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Currently, conditions to compile HWPM driver based on build config is
not defined well in the Makefiles. Update Makefiles to
- use external chip specific flags to include chip source files
- add copyright information
- revise IP force enablement logic, remove unused MINIMAL_IP_ENABLE flag
- follow a standard way of including source files and config flags.
Jira THWPM-109
Change-Id: I6d32b5b67d34c65b56fb9cb9d6a1c4cca7b11cc6
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3121175
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
A recent change has led to EMC fuse mask calculation regression.
This is being corrected in this patch. The emc_fuse_disable mask
is set in such a way that, each bit corresponds to 4 MSS Channels.
For example, emc_fuse_disable mask=1100, corresponds to MSS_Channel0
to MSS_Channel7 being present, while MSS_Channel8 to MSS_Channel15
are floorswept. However, in HWPM Driver, the logic to represent a
floorswept IP element is indicated by '1'. Correct the logic to
indicate this.
Bug 4490868
Change-Id: Id83d9e1d983c3fbf8f58cef3a1ff45334d7eadd6
Signed-off-by: vasukis <vasukis@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3122752
Reviewed-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
A recent change has led to EMC fuse mask calculation regression.
This is being corrected in this patch. The emc_fuse_disable mask is
set in such a way that, each bit corresponds to 4 MSS Channels.
For example, emc_fuse_disable mask=1100, corresponds to MSS_Channel0
to MSS_Channel7 being present, while MSS_Channel8 to MSS_Channel15
are floorswept. However, in HWPM Driver, the logic to represent
a floorswept IP element is indicated by '1'. Correct the logic to
indicate this.
Bug 4490868
Signed-off-by: vasukis <vasukis@nvidia.com>
Change-Id: Ia3825db29715e04aa43822283b160252d00f0a81
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3099298
Reviewed-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
ACPI configs are not required for aaos as
aaos is booted with dtb and not acpi.
Disabling CONFIG_ACPI results in a build failure as
it's undefined in the #if directive
so adding this check to see whether it is defined
resolves the issue and allows aaos to build
successfully with CONFIG_ACPI disabled
Bug 4559177
Change-Id: I9f068c373d6dc57acb610a107eb8a2e90a0e944b
Signed-off-by: Ahmad Chaudhry <ahmadc@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3115456
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Vedashree Vidwans <vvidwans@nvidia.com>
- Modify condition to include TH500 files for correct config. Since
TH500 is only supported with BaseOS and TinyLinux, the TH500 HWPM
config flag will be defined as part of the BaseOS/TinyLinux builds.
- Add new debug log mask for active debugs. This will allow us to enable
debug messages related to active debugs reducing amount of logs.
- Add condition to check ARCH_TEGRA config required for kernel specific
APIs.
Jira THWPM-69
Change-Id: I637bdbd2e5d72808611f63f4f719e5072f85ca34
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2978365
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Tested-by: Vasuki Shankar <vasukis@nvidia.com>
HWPM code from HWPM repo is not currently used to compile with kernel
5.10. However, CL to compile HWPM repo for kernel 5.10 is required to
validate latest changes on Pre-Si.
Since conftest is only available for kernel version later than 5.10.
Add condition to include conftest only if HWPM is used as OOT module.
Bug 4119327
Change-Id: I760164447ff5c340884212f83966af72f1ee27da
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3011333
Tested-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
Reviewed-by: Vishal Aslot <vaslot@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
The conftest script already has a test for checking which variant of the
get_user_pages() function is present in the kernel. So use the
definition generated by conftest to select which function variant is
used.
Bug 4276500
Change-Id: I29d216c8cead657c1daca4ce11b3dc3f74928467
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3015357
Reviewed-by: Vedashree Vidwans <vvidwans@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Currently, HWPM requires raw readl/writel functions
to access sticky bits and as workaround for IP registers.
- Move the raw readl/writel logic along with IO mapping
of the address to a static function.
- Implement the wrapper functions to access sticky bits
and IP registers to use the created static functions.
Jira THWPM-86
Change-Id: Ib0b3229d4b8795d19aca142233622a166436e3bd
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/3014028
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: Vasuki Shankar <vasukis@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This patch adds support for MCF SOC performance
monitoring in the driver. MCF SOC has two different
types of perfmuxes connected to the same perfmon:
one is the OCU type and the other is IBHX and OBHX.
IBHX is only accessible via MC16 aperture. Therefore,
this patch adds two separate IPs: OCU and IOBHX.
However, both are tied to the MCF SOC perfmon (mcfsoc0).
Bug 4287384
Signed-off-by: Vishal Aslot <vaslot@nvidia.com>
Change-Id: If15498a44e02270f9106337078931edbe043c254
Reviewed-on: https://git-master.nvidia.com/r/c/linux-hwpm/+/2986232
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Vedashree Vidwans <vvidwans@nvidia.com>
