Commit Graph

485 Commits

Author SHA1 Message Date
anupamg
50d6a0cb32 DCE-KMD: Use OS abstraction for atomic operations
- Replace linux specific implementation with OS absraction
  added to display/drivers

JIRA TDS-16052

Change-Id: I089dd75954cb8cfa533a697dddc2ae9c501c26a0
Signed-off-by: anupamg <anupamg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3171169
Reviewed-by: Mahesh Kumar <mahkumar@nvidia.com>
Reviewed-by: Arun Swain <arswain@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
2025-07-24 10:19:12 +00:00
anupamg
8533f2be4a DCE-KMD: Use OS abstraction for types.h
- DCE-KMD code is only compiled on Linux Kernel today. So it has
  some linux specific dependencies.

- We will be compiling the same code for new DispalySerer HVRTOS
  process. To support this we will need to abstract out OS
  specific dependencies from DCE-KMD.

- Common OS abstraction code will be developed under display/drivers/
  server/ repo.

- DCE-KMD will start using that os abtsaction and this is the first
  CL towards that effort.

JIRA TDS-16052

Change-Id: I51fba684ac285139225a2999338e73c724d9d499
Signed-off-by: anupamg <anupamg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3167249
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Arun Swain <arswain@nvidia.com>
Reviewed-by: Mahesh Kumar <mahkumar@nvidia.com>
2025-07-24 10:19:12 +00:00
anupamg
d8cf86fa95 DCE-KMD: Add OS abstraction
- Add OS abstraction for DCE-KMD driver as it will be used
  for Linux as well as HVRTOS.

- The original OS abstraction headers are maintined under
  display/drivers repo (display/drivers/server/os/include/).
    - From that copy, only linux-kmd relevant headers
      are mirrored here as there's no need to mirror HVRTOS
      related headers.

- But we need a copy here as we cannot include external paths
  in kernel builds.

JIRA TDS-16126

Change-Id: Iabebef33719c38a8aa4db8573a0dd7dd7e5f83f6
Signed-off-by: anupamg <anupamg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3194862
Reviewed-by: Arun Swain <arswain@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
2025-07-24 10:19:12 +00:00
rajangam
6163a70525 t264: Changes to support SMMU on OESP
1. No need to handle OESP case separately to load
values into mailbox registers.
2. OESP now supports SMMU one can use DRAM to share data.

Bug 3247553

Signed-off-by: rajangam <rajangam@nvidia.com>

Change-Id: I0463d1ccf26f173a1bea9304373cbad192e58d20
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3211209
Tested-by: Jason Li (SW-TEGRA) <jasl@nvidia.com>
Reviewed-by: David Pu <dpu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Jason Li (SW-TEGRA) <jasl@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2025-07-24 10:19:12 +00:00
Jason Li
1440655254 psc: Add support for mutex mailbox
This change adds support for mailbox with mutex.

In OESP/SB, GP mailboxes are used. Since they are mailbox with mutex,
the driver needs to acquire mutex before using it.

Jira SEC-15577

Signed-off-by: Jason Li (SW-TEGRA) <jasl@nvidia.com>
Change-Id: I8bc95402b1a4fc7227058aded1d417cfa3e5fae6
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3261139
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: David Pu <dpu@nvidia.com>
2025-07-24 10:19:12 +00:00
Jon Hunter
ff48ee63b1 drivers: Fix MODULE_IMPORT_NS for Linux v6.13
In Linux v6.13, commit cdd30ebb1b9f ("module: Convert symbol namespace
to string literal") updated the MODULE_IMPORT_NS macro to take a string
literal as an argument in Linux v6.13. Use conftest to detect if
MODULE_IMPORT_NS takes a string literal as an argument and update the
various drivers accordingly.

Bug 4991705

Change-Id: I8f34860648965dc2334e2916d5404522510778ff
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3263798
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2025-07-24 10:19:11 +00:00
Jon Hunter
efeecacbd1 tegra: rtcpu: Fix build for Linux v6.12
In Linux v6.12 the definition 'no_llseek' was finally removed. Since
Linux v6.0 it had been redefined as NULL. Add a test to conftest to
determine if 'no_llseek' is present and if not then it is no longer
necessary to populate this and we can leave as NULL.

Bug 4876974

Change-Id: Idc0f5eff6f95f404a24b6d795f6a9460b99639e4
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3261670
Reviewed-by: svcacv <svcacv@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Pushpesh Pranjal <ppranjal@nvidia.com>
2025-07-24 10:19:11 +00:00
Jon Hunter
4b5bdb9393 nvadsp: t264: Add missing bits.h header
With Linux v6.13, the Tegra264 NVADSP driver fails to build and the
following errors are observed:

 In file included from drivers/platform/tegra/nvadsp/dev-t264.c:4:
  include/linux/reset.h:30:49: error: implicit declaration of function
  ‘BIT’ [-Werror=implicit-function-declaration]
   30 | #define RESET_CONTROL_FLAGS_BIT_ACQUIRED        BIT(2)
      |                                                 ^~~

 In file included from drivers/platform/tegra/nvadsp/dev-t264-aon.c:4:
  /include/linux/reset.h:30:49: error: implicit declaration of function
  ‘BIT’ [-Werror=implicit-function-declaration]
   30 | #define RESET_CONTROL_FLAGS_BIT_ACQUIRED        BIT(2)
      |                                                 ^~~

Fix this by adding the missing 'bits.h' header.

Bug 4991705

Change-Id: I08a6cb59339f8e5221fdc3f39b2a7323cae0cd1f
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3261688
Reviewed-by: svcacv <svcacv@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Viswanath L <viswanathl@nvidia.com>
2025-07-24 10:19:11 +00:00
Pushpesh Pranjal
007a357ab1 kernel: nvidia-oot: fix GVS build issue
- fix for no prototype issue
- class_create failure
- ISO C90 mixed declarations

Jira CAMERASW-29337

Change-Id: I16cc1b6f36df1e1f59acc6add927f30e5a963302
Signed-off-by: Pushpesh Pranjal <ppranjal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3248722
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Evgeny Kornev <ekornev@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
2025-07-24 10:19:11 +00:00
Pushpesh Pranjal
cbf1e15fdc kernel: nvidia-oot: adding use case to discard existing traces
- Add usecase to discard existing traces, using a write call,
that sets last read event index to header's next event index.

Jira CAMERASW-29336

Change-Id: Ibfc94cf5f5484b5a4ad9c2cc6f9eaeb4937ac564
Signed-off-by: Pushpesh Pranjal <ppranjal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3242168
(cherry picked from commit 148495ac64e645aff04abdf1d0334e7ea6400982)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3248850
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Evgeny Kornev <ekornev@nvidia.com>
2025-07-24 10:19:11 +00:00
Pushpesh Pranjal
1ad8bfcf97 kernel: nvidia-oot: adding non-blocking use case
- adding non-blocking use case for fetching raw traces

Jira CAMERASW-27488

Change-Id: Ic60ceb08e9d3e68bf5db20c0da9325c3c183169e
Signed-off-by: Pushpesh Pranjal <ppranjal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3227561
(cherry picked from commit 04b0de1c19db16fb6cfc9b8057d395000c9f6011)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3241812
Reviewed-by: Evgeny Kornev <ekornev@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
2025-07-24 10:19:11 +00:00
Pushpesh Pranjal
2ac9b955e8 tegra: rtcpu : add device node for fetching raw traces
- added a device node to fetch the raw traces
- keeping both option available: existing worker method,
  using device node to fetch raw traces
- both blocking & non-blocking call support,
  user can decide it
- multiple file open support, each file descriptor
  context have its own read pointer of trace memory

Jira CAMERASW-27486
Jira CAMERASW-27487
Jira CAMERASW-27774

Change-Id: I93942d273570857b0073e0e863e41c221c36ebb7
Signed-off-by: Pushpesh Pranjal <ppranjal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3215749
(cherry picked from commit 21a9c245ea4be51117c379d77c45de1ddc3a167c)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3241811
Reviewed-by: Evgeny Kornev <ekornev@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2025-07-24 10:19:11 +00:00
Akihiro Mizusawa
1656f9c566 nv-oot: rtcpu: Check early boot logs
- Define boot log related HSP message ID's.
- Call camrtc_hsp_vm_read_boot_log as the first step during the HSP
handshake.
- The read_boot_log function will wait for 2000 ms for a boot log
message. If the RCE has hung during boot, this will timeout, and return
with error.
- Move dev_set_drvdata to before camrtc_hsp_probe in camrtc_hsp_create.
Explanation: The RCE, during a normal boot sequence, will boot before
the RTCPU KMD starts probing, so the mailbox will already be full
when the HSP driver is initializing. The RTCPU HSP full interrupt
handler will be called immediately after the handlers are registered
by the mailbox driver. The interrupt handler will reference the HSP
device's drvdata, and it was a race condition as to whether the
interrupt handler would be called before the drvdata was set.
Thus, this change sets drvdata before the interrupt handlers are
installed to prevent this race condition.
- Update the full interrupt handler to return if camhsp is null.

Jira CAMERASW-27443

Change-Id: Ibb7ed41771d2178e0d06adb94ae1955db61b9d92
Signed-off-by: Akihiro Mizusawa <amizusawa@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3239620
Reviewed-by: Chinniah Poosapadi <cpoosapadi@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Semi Malinen <smalinen@nvidia.com>
Reviewed-by: Frank Chen <frankc@nvidia.com>
2025-07-24 10:19:10 +00:00
Mahesh Kumar
119816136c platform: dce: fix ipc_client_unregister race cond
This patch fixes a race condition between
tegra_dce_unregister_ipc_client and dce_client_ipc_wakeup.

If dce_client_ipc_wakeup is called just after unregistering
it'll result in accessing already freed data structures and
kernel crash. This patch adds a check to validate if the client_ipc
struct is valid before accessing its members.

Bug 4913921

Change-Id: Ie7f25379d7254d1f1ad4fb17baafee353f6d9eca
Signed-off-by: Mahesh Kumar <mahkumar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3239873
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
2025-07-24 10:19:10 +00:00
mhulagabal
4c3f0cf0b4 dce: Convert error codes to hex and group errors
- Converted error codes from decimal to hexadecimal
- Segregated the errors group-wise
- Changed unsigned to signed

- JIRA TDS-15862

Change-Id: I9da522265ce858d05065908c3e345661bf0b3f65
Signed-off-by: mhulagabal <mhulagabal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3236309
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Mahesh Kumar <mahkumar@nvidia.com>
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
2025-07-24 10:19:10 +00:00
Praveen James
2d1629804e fsicom: update hsp mb assignment to fsi core
Hsp mb for fsicom notifications are
assigned to configured fsi notification
core in sequence.

Bug 4825460
Jira FSIS-565

Change-Id: I9365f7c8c6459ad749f6fbf0a0dd9775b4225822
Signed-off-by: Praveen James <pjames@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3204135
(cherry picked from commit b0b1e5cbbf888a558aedd563d81057301ee4ac8a)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3206769
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Kovid Kumar <kovidk@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3217463
2025-07-24 10:19:10 +00:00
Praveen James
55847ce7a0 fsicom: Add support for fsi core2 and core3
fsicom driver updated to support fsicom
channels without notification. With notification
disabled channels fsicom can support all four
cores of FSI

Bug 4805453
DOS-SHR-10636

Change-Id: I6cf4dd36c1570505dbcf582499189bd974ed095f
Signed-off-by: Praveen James <pjames@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3197598
(cherry picked from commit 1dbdf63d67b102908c845671d18ddf4d14ae498f)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3206768
Reviewed-by: Kovid Kumar <kovidk@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3217458
2025-07-24 10:19:10 +00:00
Akihiro Mizusawa
dadd61f04c tegra rtcpu: add debug map test buffers for ISP1
Add debug map test buffers for ISP1.

Jira CT26X-427

Change-Id: If3f12b789263aa3d8dbbb3b88157cce429335ea9
Signed-off-by: Akihiro Mizusawa <amizusawa@nvidia.com>
2025-07-24 10:19:09 +00:00
Viswanath L
a87e58326b nvadsp: Add T264 ADSP and AON support
- Add compatible and chip data for T264 ADSP[1:0] and AON
- Add T264 dev files to build makefile

DNS

Bug 3682950
Bug 4165898

Change-Id: Idbaef1950ff2f736c7844ee0525d55b596b11132
Signed-off-by: Viswanath L <viswanathl@nvidia.com>
2025-07-24 10:19:09 +00:00
fraunak
47917521d4 kernel-oot: update pm register offsets
Added t264 specific pdata struct to
use r5_ctrl and pwr_status registers
values.

Jira CAMERASW-11038

Change-Id: I4ae6b3ffee48eff61a6b7a7309c251c38d68bf30
Signed-off-by: fraunak <fraunak@nvidia.com>
2025-07-24 10:19:09 +00:00
Johnny Liu
214da5fa51 platform: tegra: central actmon support for t264
Add new compatible string for t264.

Bug 4630271

Signed-off-by: Johnny Liu <johnliu@nvidia.com>
Change-Id: I6d175fef4f0f8789aae7520d91566ae7fab2ae90
2025-07-24 10:19:09 +00:00
Mahesh Kumar
99b291c567 platform: dce: remove unused parameter
This patch removes unused parameter w_type from dce_admin_ipc_wait
function.

Jira TDS-15438

Change-Id: Ida2bbca042a32b5aede32821157995b4aaa2db47
Signed-off-by: Mahesh Kumar <mahkumar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3236783
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2025-07-24 10:19:09 +00:00
Mahesh Kumar
9a1b69df09 platform: dce: Add t264 halify function support
This patch moves T264 files to nvidia-oot repo and adds support
to to Halify HSP functions for T239.

Jira TDS-15438

Change-Id: Ie42d15ab27f9a71312063a4067629030be6869c8
Signed-off-by: Mahesh Kumar <mahkumar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3233122
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2025-07-24 10:19:09 +00:00
Mahesh Kumar
2d2fc21cec platform: dce: move hw headers to soc folder
This patch moves HW headers to SOC-specific subfolder to avoid conflict.

Jira TDS-15438

Change-Id: I45796dbe445319dd5d71a304732e11c858135345
Signed-off-by: Mahesh Kumar <mahkumar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3227902
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
2025-07-24 10:19:09 +00:00
Mahesh Kumar
9a401f8077 platform: dce: Halify HSP functions
This patch Halify HSP access functions. SOC-specific HSP functions
are assigned during driver prob based on of_device_is_compatible check.

Jira TDS-15438

Change-Id: Ia8d68cd658eaa06dd5d06e8ba92f32907a31fd4f
Signed-off-by: Mahesh Kumar <mahkumar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3225858
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2025-07-24 10:19:09 +00:00
Mahesh Kumar
46b8dfe796 platform: dce: Pass hsp-id to the hsp smb functions
This patch modifies HSP SMB functions to use hsp-id as an input.
This is a prework to support multiple instances of DCE HSP.

Jira TDS-15438

Change-Id: I046e456979b58c74bd39b91889b9cf12065646cb
Signed-off-by: Mahesh Kumar <mahkumar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3225857
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
2025-07-24 10:19:09 +00:00
Mahesh Kumar
96b5772e6d platform: dce: Pass hsp-id to the hsp ss functions
This patch modifies HSP SS functions to use hsp-id a s input.
This is a prework to support multiple instances of DCE HSP.

Jira TDS-15438

Change-Id: Ie359032100fac593dc789fa2f3aefda6123dce7b
Signed-off-by: Mahesh Kumar <mahkumar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3225856
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
2025-07-24 10:19:09 +00:00
Evgeny Kornev
83a23200ef rtcpu: adjust header len
Len for camrtc_event_header is reduced
to uint16_t so ajust casting to uint16_t

Jira CAMERASW-27782

Change-Id: I5da60c9eb4e1d82d1c9251942d5c51dae06fc374
Signed-off-by: Evgeny Kornev <ekornev@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3218684
(cherry picked from commit 003f7f7e7a32341162c5b07b6fb1725b15859b75)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3228154
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2025-07-24 10:19:09 +00:00
Jon Hunter
f01227d4ea drivers: Drop inline from driver remove wrapper
The driver remove function is a function pointer and therefore, it does
not make sense to define the function as an 'inline'. Update the
coccinelle script and drivers to remove the inline statement.

Bug 4749580

Change-Id: Ia03691b75c4edffe609f27468b911a92a5ddbd68
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3233980
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2025-07-24 10:19:08 +00:00
Ketan Patil
c549b0894f platform: tegra: mc-utils: Update compatible string
Update compatible string in mc-utils driver to use
nvidia,tegra264-mc-utils instead of nvidia,tegra-t26x-mc, as we want a
separate DT node for mc-utils and dram_channels property would be added
in that DT node, which is required for HV+L case.

Bug 4090660

Change-Id: I9f988da4b264738d66b329d478b231bf36e71a18
Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/3138031
Tested-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-by: Ashish Mhetre <amhetre@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
2025-07-24 10:19:08 +00:00
Ketan Patil
1cfbb80f3c platform: tegra: mc-utils: Enable debugfs node
Enable debugfs node of mc-utils number of mc channels for t264.
Due to this change, we don't have to enable debug logs while verifying
mc-utils. This will save our time during bringup.

Bug 4090660

Change-Id: I1cf15d182ddeed7f2c93dc5bc65cebdc16590d2b
Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/3104229
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2025-07-24 10:19:08 +00:00
Ketan Patil
3bc182a772 platform: tegra: mc-utils: Correct register offset
The offset of MC_EMEM_ADR_CFG_CHANNEL_ENABLE_0 register is incorrect in
the driver, correct it as per the latest spec.

Bug 4090660

Change-Id: I0eec6fd8a82bdc5152af7a0742bbd00541507818
Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/3101731
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2025-07-24 10:19:08 +00:00
Ketan Patil
deaa196fd0 platform: tegra: mc-utils: Cleanup unnecessary functions
No client need the dram_clk_to_mc_clk, tegra_dram_types functions from
mc-utils. Hence remove these functions.
get_dram_num_channels is needed by resman team, hence update it to
return number of channels for t264.

Bug 4090660

Change-Id: I3e7571be73cfd94b3e2feebb6320a57b46b5fd48
Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/3047611
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2025-07-24 10:19:08 +00:00
Ketan Patil
2710f2b3bd platform: tegra: Update compatible string check
On T264 simulation platform, the top level compatible strings is updated
to nvidia,t264sim. Because of which, the mc-utils driver is not able to
probe. Update the mc-utils driver to check for this new compatible
string as well.

Bug 4090660

Change-Id: I4c29cc9cf0cf87c72cd6f9dceb66473ce4cf4feb
Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/2933473
Reviewed-by: Ashish Mhetre <amhetre@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2025-07-24 10:19:08 +00:00
Ketan Patil
446ff87f28 platform: tegra: Update DRAM clk to MC clk formula
As per info received from HW team, we should not hardcode 1600 in DRAM
clock to MC clock conversion function. DRAM clk to EMC clk ratio is
always 4:1 while EMC clk to MC clk ratio can be found in CAR register
CLK_RST_CONTROLLER_CLK_SOURCE_EMC_0.MC_EMC_SAME_FREQ bit.
If it's 0 then MC frequency is half of EMC frequency, otherwise MC freq
is same as EMC freq. Hence update DRAM clock to MC clock function as per
above logic.

Bug 4090660

Change-Id: I5a7586aeee29fe1c98437cf0dd5b820d8f540072
Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/2915138
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2025-07-24 10:19:08 +00:00
Ketan Patil
13412069a0 platform: tegra: Add mc-utils support for T264
mc-utils driver should support the following functionality on T264.
Update mc-utils driver for these functionalities for T264:
- EMC freq to BW conversion
- BW to freq conversion
- DRAM clock to MC clock coversion

Bug 4090660

Change-Id: If5ee54d49024d03620dad01049fe35bbcaf3f812
Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/2900181
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2025-07-24 10:19:08 +00:00
Ketan Patil
86efe596c5 platform: tegra: Copy mc-utils driver
mc-utils driver support is needed on T264, and it should be present in
nvidia-t264 repo, so as to avoid leaking any information. Also, we need
to make sure once T264 is public the existing mc-utils driver can be
updated easily for T264 support.
Hence first copy the existing mc-utils driver from nvidia-oot into
nvidia-t264, then make changes for T264 and finally when T264 is public,
just cherry-pick the addional changes in nvidia-oot and clean up driver
from nvidia-t264. This change is doing the first step i.e. copying
existing mc-utils driver code from nvidia-oot into nvidia-t264.

Bug 4090660

Change-Id: I95eff8d3f7fef267a5c0f0e2137c4343a615d4aa
Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/2911970
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2025-07-24 10:19:08 +00:00
Laxman Dewangan
217b544137 mc-utils: Prepare tree for collapsing T264 OOT drivers
Remove some of the files which were added as optional for
non-existing of T264 patches. As T264 OOT drivers are
collapsing into the core tree, remove such optional files.

Change-Id: I83116585369f4893d14b527356752fbf2a9a80c8
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
2025-07-24 10:19:08 +00:00
Viswanath L
051d5cb932 nvadsp: t264: Toggle AON_CPU clk at suspend/resume
Enable/disable AON_CPU clock at runtime resume/suspend
so that the clock is enabled only upon need and we do not
depend on MB2 to enable the clock unconditionally.

Also disable runtime suspend/resume if AON CPU is already in
running state at driver probe, indicating always ON operation.

Bug 4777122

Change-Id: I0b6037bd47b54d012af7ccfcea2c3a6102ced781
Signed-off-by: Viswanath L <viswanathl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/3223014
Reviewed-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3233301
Reviewed-by: svcacv <svcacv@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
2025-07-24 10:19:08 +00:00
Dara Ramesh
056b1ab0eb nvadsp: t264: Set HWMBOX to pass OS config
Set the TYPE1_DATA3 register (offset 0x08054) of
HWMBOX1 to pass the OS config to the firmware

In the OS config info set Bit 1 (VIRT CONFIG) if
the OS configuration is virtualized

Bug 4635899

Change-Id: I294e710fc7beb9e21401fb73a5eb1b53f735ef41
Signed-off-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/3207575
Reviewed-by: Viswanath L <viswanathl@nvidia.com>
Reviewed-by: Aditya Bavanari <abavanari@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
2025-07-24 10:19:07 +00:00
Viswanath L
4714f80198 nvadsp: t264: Implement AON_CPU assert/deassert
Implement CAR assert/deassert of AON_CPU so that
it is pulled into reset at os_suspend() call.

Bug 3916054

Change-Id: I6069c2f12b5809e6ec8db8f304f9e5bf65a0b636
Signed-off-by: Viswanath L <viswanathl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/3181031
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Asha T <atalambedu@nvidia.com>
Reviewed-by: Dara Ramesh <dramesh@nvidia.com>
2025-07-24 10:19:07 +00:00
Viswanath L
a9663f6164 nvadsp: t264: Set HWMBOX to pass CPU freq
Set TYPE1_DATA2 register (offset 0x08050) of
HWMBOX1 to pass CPU freq to firmware.

Bug 4678940

Change-Id: I54a882cf329b3e0bb24b8cff5f6196d58b60f072
Signed-off-by: Viswanath L <viswanathl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/3180576
Reviewed-by: Asha T <atalambedu@nvidia.com>
Reviewed-by: Dara Ramesh <dramesh@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
2025-07-24 10:19:07 +00:00
Asha Talambedu
bd3f20d097 nvadsp: aon: t264: Map hwmbx interrupts
Maps mbox 0's full and mbox 1's empty interrupt to
shared interrupt lines 3 and 2 respectively.

Note that this is WAR and actual fix will use single interrupt
line i.e SI_1 to map both full and empty interrupts

Bug 4165898

Change-Id: Iaf26d38dc460160d68d7b58c59500599f5afd3a2
Signed-off-by: Asha Talambedu <atalambedu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/3139919
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2025-07-24 10:19:07 +00:00
Viswanath L
5442215da4 nvadsp: t264: Set no interrupt for WFI on AON
AON F1 does not generate interrupt on entering WAITI, so
set no_wfi_irq flag to true. WFI status can be queried by
reading AO_MISC register.

Bug 3916054

Change-Id: I3e9e3e66fdb4d9dab25b74484fee07df211ceab6
Signed-off-by: Viswanath L <viswanathl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/3139592
Reviewed-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-by: Asha T <atalambedu@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
2025-07-24 10:19:07 +00:00
Viswanath L
f2c62be7fb nvadsp: t264: Add WAITI status query for ADSP
Implement WFI (WAITI) status check for ADSP by reading AMISC register.

Bug 3916054

Change-Id: If62bcf18ac56bba1cc9afb5a0c5e27f01e3807bc
Signed-off-by: Viswanath L <viswanathl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/3139380
Reviewed-by: Dara Ramesh <dramesh@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Asha T <atalambedu@nvidia.com>
2025-07-24 10:19:07 +00:00
Viswanath L
d75315355c nvadsp: t264: Reorg and update chip data
- Move chip data from patch files to dev-*.c files for
    ease of maintenance
 - Add patch file to patch compatible and chip data into
    dev.c file, also add dev-*.c files to build makefile
 - Add stub for dump_core_state function pointer
 - ADSP updates
    - Use AMISC base directly from reg DT prop as it will
       be offset as per the DSP instance (drop adsp_prid)
    - Set amc_not_avlbl to true for ADSP[1], so only ADSP[0]
       will access AMC
    - Change compatible of ADSP[0] to "nvidia,tegra264-adsp"
       in order to keep continuity with previous chip
       generations (unique identifier string is "adsp")

Also remove T264 adsp support from kprev.

Bug 3682950
Bug 4165898

Change-Id: I22abf3fda01f4e0e259759ba1816a9580a474d40
Signed-off-by: Viswanath L <viswanathl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/3107870
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-by: Asha T <atalambedu@nvidia.com>
2025-07-24 10:19:07 +00:00
Aditya Bavanari
224ba02a19 nvadsp: t264: Invoke reset controls in assert/deassert
In assert and deassert callbacks, invoke the reset control
assert and deassert functions respectively through
"adsp" reset property.

Bug 3682950

Change-Id: I8bed0b3979e879e218af95d3fd1f836b6d2cca9e
Signed-off-by: Viswanath L <viswanathl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/3081997
Reviewed-by: Dara Ramesh <dramesh@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2025-07-24 10:19:07 +00:00
Asha Talambedu
64b01b7616 nvadsp: t264: Extended for AON DSP
- Added function definitions to control AON from
kernel on T264.

- Copy files dev-t264-aon.c and dev-t264-aon.h to
drivers/platform/tegra/nvadsp/

- Patch chip_data,compatible and hdrs to dev.c for T264 AON

Bug 4165898

Change-Id: Iad31d89a7bff722fed47f4c28b0b7193c13ce414
Signed-off-by: Asha Talambedu <atalambedu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/3009638
Reviewed-by: Viswanath L <viswanathl@nvidia.com>
Reviewed-by: Dara Ramesh <dramesh@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2025-07-24 10:19:07 +00:00
Viswanath L
d85d5d657d nvadsp: t264: Fix include of dev.h
Allow dev.h to be included from source directory.

Bug 4164138
Bug 3682950

Change-Id: If6be232a428c843a45a14f155d957850d28847a9
Signed-off-by: Viswanath L <viswanathl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/2979502
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2025-07-24 10:19:07 +00:00
Viswanath L
19387d860f nvadsp: t264: Add chip support
Added chip_data and function definitions to support nvadsp
driver for T264.

 - Clock config and CAR assert/deassert are TBD
 - Booting is from default reset vector

Bug 3682950

Change-Id: If4cad64aa57a865b9d1afa8204c55904661ea5b8
Signed-off-by: Viswanath L <viswanathl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/2894325
Reviewed-by: Asha Talambedu <atalambedu@nvidia.com>
Reviewed-by: Sharad Gupta <sharadg@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2025-07-24 10:19:07 +00:00