Adding more configurability to the dspk driver where,
user can program the thresholds as per the requirement.
If the control is not set, default configuration of
zero threshold is used.
Bug 200283222
Change-Id: I9cbf94c5553e11aeb0b4cc85ceba29fc74ceabc2
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-on: http://git-master/r/1319913
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
GVS: Gerrit_Virtual_Submit
As per HW Bug 200208400 we need to clear asrc
interrupt twice to update interrupt status
register.
Bug 200219757
Change-Id: I741f27cca155e45f0112f505eed415852f13e219
Signed-off-by: Dipesh Gandhi <dipeshg@nvidia.com>
Reviewed-on: http://git-master/r/1233840
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nitin Pai <npai@nvidia.com>
Support dynamic pinmux settings for dspk, this change will help
to runtime configure the pinmux register to use pinmuxed path.
Change-Id: Ie87499a822854d8f077530f49d5516883c987839
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Reviewed-on: http://git-master/r/1181859
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
Driver support for all the APE interfaces. Also cleanup the machine
driver code.
Bug 1782976
Change-Id: Ifdaa3b19de661afd5231d9bface6fc9547f0eb3c
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Reviewed-on: http://git-master/r/1177588
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Viswanath L <viswanathl@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
In lane enable functionality currently
we don't check the existing state of lane.
Change make sure to do nothing if current
state is same as previous state.
Bug 200179285
Change-Id: Ic7492fbc5aabd093d49dba546d0fb17282a30bcf
Signed-off-by: Dipesh Gandhi <dipeshg@nvidia.com>
(cherry-picked from commit ebf11df77e0322e473fc4fa6ae0020135f7c6ea9)
Reviewed-on: http://git-master/r/1160156
Reviewed-on: http://git-master/r/1158151
(cherry picked from commit bd562cf6b19bf605f749617335da151baa9f0a71)
Change-Id: I3f61d79ffd88e479fe320e06cd19f7c6183bf112
Reviewed-on: http://git-master/r/1167575
GVS: Gerrit_Virtual_Submit
Tested-by: Dipesh Gandhi <dipeshg@nvidia.com>
Reviewed-by: Nitin Pai <npai@nvidia.com>
Changes are done as needed for kernel 4.4 transition.
- select SND_SOC_COMPRESS for offload
- register jack at card level
- use snd_soc_dapm_to_codec() to access codec from widget
- use CONFIG_SND_SOC_TEGRA210_ADSP_ALT for adsp code
Bug 200193757
Change-Id: I0adbc9936d9d99f49d05af5def628af4d3c86790
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/1154433
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
The dapm field of the struct snd_soc_codec is removed, to access
dapm field use snd_soc_codec_get_dapm()
Change-Id: I2bf7f89058bd65baf2d89ffa926af9fe1e418927
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/1157272
GVS: Gerrit_Virtual_Submit
Reviewed-by: Viraj Karandikar <vkarandikar@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Added ability to disable h/w compensation
Disabling h/w compensation would work well
with mem-to-io
Added ability to set WORD_CNT for input and
output thresholds
Bug 200194803
Change-Id: Iea8942105e61ce307ad394d75de59836796f3fbb
Signed-off-by: Sidharth <svarier@nvidia.com>
Reviewed-on: http://git-master/r/1135127
(cherry picked from commit 1b25a112a33b249696a87b8527afc1d132a9cbba)
Reviewed-on: http://git-master/r/1142696
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nitin Pai <npai@nvidia.com>
Changing frac max to unsigned int as
mask for asrc frac is 0xffffffff.
Bug 200185841
Change-Id: Ic47896b47fa5e4a5e4eb7320a69d6b94747715a5
Signed-off-by: Dipesh Gandhi <dipeshg@nvidia.com>
Reviewed-on: http://git-master/r/1113391
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nitin Pai <npai@nvidia.com>
To make sure last transaction on stream
was clean we soft reset the lane before
closing it.
Bug 1736992
Bug 200181219
Change-Id: I0df111d8d535a574e021a459b7d0c2c37a2c6345
Signed-off-by: Dipesh Gandhi <dipeshg@nvidia.com>
Reviewed-on: http://git-master/r/1112188
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Nor Cho <ncho@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nitin Pai <npai@nvidia.com>
Fixed the following sparse warnings:
- warning: symbol 'tegra186_asrc_ahc_cb' was not declared.
Should it be static?
- warning: symbol 'tegra186_arad_ahc_cb' was not declared.
Should it be static?
- warning: Using plain integer as NULL pointer
Bug 200088648
Change-Id: I26ca06f95517269840248b703969fb79e2c43c91
Signed-off-by: Amit Sharma <amisharma@nvidia.com>
Reviewed-on: http://git-master/r/1011362
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Dipesh Gandhi <dipeshg@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Move register store/restore from pm API's to
runtime API's for platforms, with CONFIG_PM_SLEEP
not enabled, to work.
Bug 200166409
Change-Id: I0c7cda13ebf7318bb9d27549fc856d20ebd41cdc
Signed-off-by: Uday Gupta <udayg@nvidia.com>
Reviewed-on: http://git-master/r/932646
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Nitin Pai <npai@nvidia.com>
If ARAD lane gets locked before ASRC is enabled
the ASRC misses the ratio packet from ARAD and does
not lock. Requesting ratio packet again from ARAD
enables ASRC to lock in such cases.
Bug 200158741
Change-Id: I63841b46eec832f3f16be9fc78fa51d723d9e825
Signed-off-by: Gaurav Tendolkar <gtendolkar@nvidia.com>
(cherry-picked from commit 88eac6a1ffa5452c170756c1266eae388795689d)
Reviewed-on: http://git-master/r/842381
Tested-by: Dipesh Gandhi <dipeshg@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nitin Pai <npai@nvidia.com>
Enable Werror for all the files under sound/soc/tegra-alt files,
so that all the warnings are treated as errors.
Bug 1454125
Change-Id: I71b761edeb5de94004b5f9868ca3c2f6fd2636f8
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/925848
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
add check for context pointer before accessing it in suspend.
Also move setting of driver data at the end of probe function.
Bug 200160608
Change-Id: I7ebee91b5f825575f1d8d84f3246b2e9f86da3ed
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Reviewed-on: http://git-master/r/923079
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ravindra Lokhande <rlokhande@nvidia.com>
GVS: Gerrit_Virtual_Submit
Marking ASRC_STREAM_LOCK_STATUS as volatile.
When asrc configured in HW mode, we want read
on ASRC_STREAM_LOCK_STATUS from hardware.
In SW mode we use ASRC_STREAM_LOCK_STATUS as
R/W register.
Bug Bug 200163397
Change-Id: I2960e9b7417c5c3017c87b4494b252e9668c4444
Signed-off-by: Dipesh Gandhi <dipeshg@nvidia.com>
Reviewed-on: http://git-master/r/926833
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nitin Pai <npai@nvidia.com>
Fixed the procedure for sw ratio update
Removed the steps of setting of asrc in UNLOCK state
and waiting it to go in UNLOCK state.
In UNLOCK state asrc stops sending samples which was
leading to audio glitches.
Bug 200154554
Change-Id: Idf7fe685709afcf4f72c3aab95dd5ee812871b92
Signed-off-by: Sidharth <svarier@nvidia.com>
(cherry picked from commit adbe2553c993327edd44408544628e8a7864ad51)
Reviewed-on: http://git-master/r/838743
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Shashank Sinha <shsinha@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nitin Pai <npai@nvidia.com>
Fix below build warnings:-
- 'tegra186_arad_get_lane_ratio_change_status' defined but not used
- 'struct tegra210_xbar_cif_conf' declared inside parameter list, its
scope is only this definition or declaration, which is probably not what
you want
Bug 1454125
Change-Id: I14375bad93b3b1f8cf79e5e8efcbe96166b5de37
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/838920
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Added mixer controls to set numerator and denominator
prescalar registes. This allows the corresponding
clocks to be scaled down before ratio calculation
Bug 1684121
Change-Id: I0f8769ed0f61722785ecaa2afec689bdb357e02f
Signed-off-by: Gaurav Tendolkar <gtendolkar@nvidia.com>
Reviewed-on: http://git-master/r/835222
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nitin Pai <npai@nvidia.com>
Making AGIC as interrupt parent to ARAD and hence by making this change,
the driver directly receives the virq, since the task of getting the virq
is handled by the gic drivers.
Also, for GIC PPI interrupts, the irq number that should be mentioned
should be irq - 32.
Bug 200146854
Change-Id: Ic3feb0f4ea46226f53a72c5789c69b5d6d7cdf01
Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com>
Reviewed-on: http://git-master/r/818988
(cherry picked from commit d35e14d26e55723be46d929d046610c05445165c)
Reviewed-on: http://git-master/r/830798
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Fixed the following sparse warning:
- warning: useless storage class specifier in empty declaration
Instance variable may be a static, but the definition doesn't need
the static storage specifier attached to it.
Bug 200088648
Change-Id: Id709a1d205987d19d8c415a18c03b8e24eb9d7b8
Signed-off-by: Amit Sharma (SW-TEGRA) <amisharma@nvidia.com>
Reviewed-on: http://git-master/r/799165
GVS: Gerrit_Virtual_Submit
Reviewed-by: Dipesh Gandhi <dipeshg@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Add the Machine driver support for Quill board which has rt5658 codec
on it.
Bug 200127320
Change-Id: I871d436438dc5830eabe1e0616648bd05886ed6c
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Reviewed-on: http://git-master/r/781091
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Issue is seen with ARAD/ASRC when it goes to
UNLOCK->LOCK.
- ASRC may not check for buffer thresholds once it
restarts processing after an UNLOCK->LOCK.
- ARAD will not get locked after an unlock
Bug 200118889
Change-Id: Ia16187df6955e79f93f3a7cb9061ea64a61c1d36
Signed-off-by: Dipesh Gandhi <dipeshg@nvidia.com>
Reviewed-on: http://git-master/r/764096
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
Tested-by: Sumit Bhattacharya <sumitb@nvidia.com>
ASRC requires 36KB of ARAM for intermediate data.
Updating the start address of ARAM as per
the partion reserved for ASRC and ADSP usage
of ARAM.
Bug 200092561
Change-Id: Ifd4b9b866d518bbe3f6f94cdb974eddc0d1ef1ac
Signed-off-by: Dipesh Gandhi <dipeshg@nvidia.com>
Reviewed-on: http://git-master/r/766620
Reviewed-by: Nitin Pai <npai@nvidia.com>
Reviewed-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>
The path to the main kernel repo is subject to change. Therefore, don't
hardcode the path. Instead use the $(srctree) macro.
Change-Id: Id1b3ffab668142addbc1a3a38e098b0bbf0e4cef
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: http://git-master/r/763205
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Tested-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation this program is
distributed in the hope that it will be useful but without any
warranty without even the implied warranty of merchantability or
fitness for a particular purpose see the gnu general public license
for more details you should have received a copy of the gnu general
public license along with this program if not write to the free
software foundation inc 51 franklin st fifth floor boston ma 02110
1301 usa
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 246 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190530000436.674189849@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Tegra124 introduces some small changes to the layout of some registers.
Modify the affected drivers to program those registers appropriately
based on which SoC they're running on.
Tegra124 also introduced some new modules on the AHUB configlink register
bus. These will require new entries in configlink_clocks[] in the AHUB
driver. However, supporting that change likely relies on switching Tegra
to the common reset framework, so I'll defer that change for now.
Based-on-work-by: Arun Shamanna Lakshmi <aruns@nvidia.com>
Based-on-work-by: Songhee Baek <sbaek@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
