- Add compatible and chip data for T264 ADSP[1:0] and AON
- Add T264 dev files to build makefile
DNS
Bug 3682950
Bug 4165898
Change-Id: Idbaef1950ff2f736c7844ee0525d55b596b11132
Signed-off-by: Viswanath L <viswanathl@nvidia.com>
Added t264 specific pdata struct to
use r5_ctrl and pwr_status registers
values.
Jira CAMERASW-11038
Change-Id: I4ae6b3ffee48eff61a6b7a7309c251c38d68bf30
Signed-off-by: fraunak <fraunak@nvidia.com>
Update compatible string in mc-utils driver to use
nvidia,tegra264-mc-utils instead of nvidia,tegra-t26x-mc, as we want a
separate DT node for mc-utils and dram_channels property would be added
in that DT node, which is required for HV+L case.
Bug 4090660
Change-Id: I9f988da4b264738d66b329d478b231bf36e71a18
Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/3138031
Tested-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-by: Ashish Mhetre <amhetre@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
No client need the dram_clk_to_mc_clk, tegra_dram_types functions from
mc-utils. Hence remove these functions.
get_dram_num_channels is needed by resman team, hence update it to
return number of channels for t264.
Bug 4090660
Change-Id: I3e7571be73cfd94b3e2feebb6320a57b46b5fd48
Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/3047611
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
As per info received from HW team, we should not hardcode 1600 in DRAM
clock to MC clock conversion function. DRAM clk to EMC clk ratio is
always 4:1 while EMC clk to MC clk ratio can be found in CAR register
CLK_RST_CONTROLLER_CLK_SOURCE_EMC_0.MC_EMC_SAME_FREQ bit.
If it's 0 then MC frequency is half of EMC frequency, otherwise MC freq
is same as EMC freq. Hence update DRAM clock to MC clock function as per
above logic.
Bug 4090660
Change-Id: I5a7586aeee29fe1c98437cf0dd5b820d8f540072
Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/2915138
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
mc-utils driver should support the following functionality on T264.
Update mc-utils driver for these functionalities for T264:
- EMC freq to BW conversion
- BW to freq conversion
- DRAM clock to MC clock coversion
Bug 4090660
Change-Id: If5ee54d49024d03620dad01049fe35bbcaf3f812
Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/2900181
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
mc-utils driver support is needed on T264, and it should be present in
nvidia-t264 repo, so as to avoid leaking any information. Also, we need
to make sure once T264 is public the existing mc-utils driver can be
updated easily for T264 support.
Hence first copy the existing mc-utils driver from nvidia-oot into
nvidia-t264, then make changes for T264 and finally when T264 is public,
just cherry-pick the addional changes in nvidia-oot and clean up driver
from nvidia-t264. This change is doing the first step i.e. copying
existing mc-utils driver code from nvidia-oot into nvidia-t264.
Bug 4090660
Change-Id: I95eff8d3f7fef267a5c0f0e2137c4343a615d4aa
Signed-off-by: Ketan Patil <ketanp@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/2911970
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Remove some of the files which were added as optional for
non-existing of T264 patches. As T264 OOT drivers are
collapsing into the core tree, remove such optional files.
Change-Id: I83116585369f4893d14b527356752fbf2a9a80c8
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
- Move chip data from patch files to dev-*.c files for
ease of maintenance
- Add patch file to patch compatible and chip data into
dev.c file, also add dev-*.c files to build makefile
- Add stub for dump_core_state function pointer
- ADSP updates
- Use AMISC base directly from reg DT prop as it will
be offset as per the DSP instance (drop adsp_prid)
- Set amc_not_avlbl to true for ADSP[1], so only ADSP[0]
will access AMC
- Change compatible of ADSP[0] to "nvidia,tegra264-adsp"
in order to keep continuity with previous chip
generations (unique identifier string is "adsp")
Also remove T264 adsp support from kprev.
Bug 3682950
Bug 4165898
Change-Id: I22abf3fda01f4e0e259759ba1816a9580a474d40
Signed-off-by: Viswanath L <viswanathl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-t264/+/3107870
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-by: Asha T <atalambedu@nvidia.com>
In Linux v6.12 the definition 'no_llseek' was finally removed. Since
Linux v6.0 it had been redefined as NULL. Add a test to conftest to
determine if 'no_llseek' is present and if not then it is no longer
necessary to populate this and we can leave as NULL.
Bug 4876974
Change-Id: I051fdb285b32260b5913dad89cabe0be04253f67
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3222106
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Accessing queue and payload fields of MSGQ via array index
causes out-of-bound warnings in new kernel version as they
are initialized as arrays of size 1:
index 53 is out of range for type 'int32_t [1]'
index 2045 is out of range for type 'int32_t [1]'
Addressing this by accessing the fields via pointer
increment instead of array index.
Bug 4420795
Change-Id: I873dbe08a894d1eea8866bb8a16018816d0e4db3
Signed-off-by: Viswanath L <viswanathl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3199294
Reviewed-by: Asha T <atalambedu@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Dara Ramesh <dramesh@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Create and register set and get operating point sysfs functions.
The operating point notification will contain the requested
operating point.
The nvcap resource manager will extract the operating point
from the notfication and send it to rce via the hsp command
interface.
In turn, rce will apply the operating point by adjusting the
functional clock frequencies for the following camera ip:
- rce hardware
- vi hardware
- isp hardware
- nvcsi
Jira CAMERASW-26378
Signed-off-by: Robert Kelly <rkelly@nvidia.com>
Change-Id: Ia814b2716d3738efb3cbc37307a267140b555f42
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3179593
(cherry picked from commit d259727a57ecf4b9463030b3418715891b3b1209)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3189078
Reviewed-by: Semi Malinen <smalinen@nvidia.com>
Reviewed-by: Frank Chen <frankc@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
DCE FW will run the dma test using 512 bytes of transfer
between dram and tcm for 400 iterations and alu test
generating 100 prime numbers for 200 iterations.
DCE running above 600Mhz will take nearly 50msec
for each test.
Jira TDS-16211
Change-Id: I34570acd4db6b8103bd2451833b280dc8e32131a
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3192552
Reviewed-by: Mahesh Kumar <mahkumar@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Platforms that implement suspend-resume as clean firmware
restart need to latch the shared mem address in every
suspend-resume cycle, but mbox value may be lost due to
module reset, so ensure that shared_mem_hwmbox is written
unconditionally in os_start flow.
Bug 3916054
Change-Id: I649d70871401475d66e0e50abeeaf4c347040119
Signed-off-by: Viswanath L <viswanathl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3180285
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
Reviewed-by: Asha T <atalambedu@nvidia.com>
Reviewed-by: Dara Ramesh <dramesh@nvidia.com>
ccplex side sees two interrupts. The first one is handled
properly while the second one does not have bit MBOX_OUT_VAID
being set.
Fixing this by reading psc_ext_ctrl register after writing.
Bug 4741744
Change-Id: I22ac1619b7f88a96658c8d197f09daccf3bb40d8
Signed-off-by: Liang Cheng <licheng@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nv-oot/+/3174350
Reviewed-by: David Pu <dpu@nvidia.com>
GVS: buildbot_gerritrpt <buildbot_gerritrpt@nvidia.com>
