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gpu: nvgpu: update doxygen for common.fifo

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Update function return and return value description for
nvgpu_channel_open_new and nvgpu_engine_setup_sw as per review comments.

Jira NVGPU-6179

Change-Id: Ie9a9c7c3918f22071173ca8b51dee49f3e405df6
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2471070
(cherry picked from commit cb8ac4e09f3a4803e967987afa2c55d78235149d)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2480565
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Vedashree Vidwans
2021-01-15 13:55:27 -08:00
committed by mobile promotions
parent 4ab8c87974
commit 12bbff3f5a
2 changed files with 5 additions and 4 deletions
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2
drivers/gpu/nvgpu/include/nvgpu/channel.h
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@@ -920,7 +920,7 @@ struct nvgpu_channel *nvgpu_channel_from_id__func(
* a gpfifo and userd to submit some work. It will also need to be
* bound to a TSG, since standalone channels are not supported.
*
* @return ch if channel could be opened, NULL otherwise.
* @return channel pointer if channel could be opened, NULL otherwise.
* @retval NULL if there is not enough resources to allocate and
* initialize the channel.
*/

7
drivers/gpu/nvgpu/include/nvgpu/engines.h
View File

@@ -194,9 +194,10 @@ u32 nvgpu_engine_act_interrupt_mask(struct gk20a *g, u32 engine_id);
* #nvgpu_fifo.num_engines that is used to count total number of valid h/w
* engine ids read from device info h/w registers.
*
* @return 0 upon success.
* @retval Valid error codes upon failure to allocate memory or
* failure to get engine info from device info h/w registers.
* @return 0 upon success, < 0 otherwise.
* @retval -ENOMEM upon failure to allocate memory for engine structure.
* @retval -EINVAL upon failure to get engine info from device info h/w
* registers.
*/
int nvgpu_engine_setup_sw(struct gk20a *g);
/**