nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-24 10:34:43 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu:nvgpu: Setup initial values for clk_pos.

Browse Source 
clk_pos should be 0 for master

JIRA NVGPU-1150

Change-Id: I2d17e479bdf4754f85b8db33b2f1e647e582d5ed
Signed-off-by: Vaikundanathan S <vaikuns@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1985169
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Abdul Salam <absalam@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Vaikundanathan S
2019-01-01 11:40:24 +05:30
committed by mobile promotions
parent 89d421fb9c
commit b947c8ea7b
1 changed files with 3 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
drivers/gpu/nvgpu/clk/clk_domain.c
View File

@@ -316,6 +316,8 @@ int clk_domain_sw_setup(struct gk20a *g)
(CLK_CLK_DOMAIN_GET((g->clk_pmu),
pdomain_slave_35->slave.master_idx));
pdomain_master_35->master.slave_idxs_mask |= BIT(i);
pdomain_slave_35->super.clk_pos = boardobjgrpmask_bitsetcount(
&pdomain_master_35->master_slave_domains_grp_mask.super);
status = boardobjgrpmask_bitset(
&pdomain_master_35->master_slave_domains_grp_mask.super, i);
if (status != 0) {
@@ -1562,6 +1564,7 @@ static int clk_domain_construct_35_master(struct gk20a *g,
clkdomainclkproglink_3x_master;
pdomain->master.slave_idxs_mask = 0;
pdomain->super.clk_pos = 0;
boardobjgrpmask_e32_init(&pdomain->master_slave_domains_grp_mask, NULL);