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gpu: nvgpu: update MINION falcon base addr init

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Prepare new hal api g->ops.nvlink.falcon_base_addr to get the MINION
falcon base address.

JIRA NVGPU-1587

Change-Id: I83a38bf78fd582ea715248900587c1e8e209da3c
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1969433
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Sagar Kamble
2018-12-10 14:37:38 +05:30
committed by mobile promotions
parent ccb035c587
commit cb1c2b7845
6 changed files with 10 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/nvgpu/common/falcon/falcon_gv100.c
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@@ -59,7 +59,7 @@ int gv100_falcon_hal_sw_init(struct nvgpu_falcon *flcn)
switch (flcn->flcn_id) {
case FALCON_ID_MINION:
flcn->flcn_base = g->nvlink.minion_base;
flcn->flcn_base = g->ops.nvlink.falcon_base_addr(g);
flcn->is_falcon_supported = true;
flcn->is_interrupt_enabled = true;
break;

1
drivers/gpu/nvgpu/gv100/hal_gv100.c
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@@ -1048,6 +1048,7 @@ static const struct gpu_ops gv100_ops = {
},
#if defined(CONFIG_TEGRA_NVLINK)
.nvlink = {
.falcon_base_addr = gv100_nvlink_falcon_base_addr,
.discover_ioctrl = gv100_nvlink_discover_ioctrl,
.discover_link = gv100_nvlink_discover_link,
.init = gv100_nvlink_init,

5
drivers/gpu/nvgpu/gv100/nvlink_gv100.c
View File

@@ -2773,4 +2773,9 @@ int gv100_nvlink_speed_config(struct gk20a *g)
g->nvlink.initpll_cmd = minion_nvlink_dl_cmd_command_initpll_1_v();
return 0;
}
u32 gv100_nvlink_falcon_base_addr(struct gk20a *g)
{
return g->nvlink.minion_base;
}
#endif /* CONFIG_TEGRA_NVLINK */

1
drivers/gpu/nvgpu/gv100/nvlink_gv100.h
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@@ -55,4 +55,5 @@ int gv100_nvlink_reg_init(struct gk20a *g);
int gv100_nvlink_shutdown(struct gk20a *g);
int gv100_nvlink_early_init(struct gk20a *g);
int gv100_nvlink_speed_config(struct gk20a *g);
u32 gv100_nvlink_falcon_base_addr(struct gk20a *g);
#endif

1
drivers/gpu/nvgpu/include/nvgpu/gk20a.h
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@@ -1438,6 +1438,7 @@ struct gpu_ops {
int (*read_gcplex_config_fuse)(struct gk20a *g, u32 *val);
} fuse;
struct {
u32 (*falcon_base_addr)(struct gk20a *g);
int (*init)(struct gk20a *g);
int (*discover_ioctrl)(struct gk20a *g);
int (*discover_link)(struct gk20a *g);

1
drivers/gpu/nvgpu/tu104/hal_tu104.c
View File

@@ -1080,6 +1080,7 @@ static const struct gpu_ops tu104_ops = {
},
#if defined(CONFIG_TEGRA_NVLINK)
.nvlink = {
.falcon_base_addr = gv100_nvlink_falcon_base_addr,
.discover_ioctrl = gv100_nvlink_discover_ioctrl,
.discover_link = gv100_nvlink_discover_link,
.init = gv100_nvlink_init,