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gpu: nvgpu: fix global register access list

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For legacy chips (gm20b, gp10b and gv11b), incorrect register
offset is used for global access register list:

incorrect: 0x418300, /* gr_pri_gpcs_rasterarb_line_class  */
correct:   0x418380, /* gr_pri_gpcs_rasterarb_line_class  */

Fix this issue by updating global access register list by using
correct register offset value.

NVGPU-5108

Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Change-Id: Id6722039f8d874dbcb79732dffd727d2ff2a1a72
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2306642
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This commit is contained in:
Seshendra Gadagottu
2020-03-03 09:10:09 -08:00
committed by Alex Waterman
parent e424e4791a
commit feebc746ca
3 changed files with 3 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/nvgpu/hal/gr/init/gr_init_gm20b.c
View File

@@ -84,7 +84,7 @@ void gm20b_gr_init_get_access_map(struct gk20a *g,
static u32 wl_addr_gm20b[] = {
/* this list must be sorted (low to high) */
0x404468, /* gr_pri_mme_max_instructions */
0x418300, /* gr_pri_gpcs_rasterarb_line_class */
0x418380, /* gr_pri_gpcs_rasterarb_line_class */
0x418800, /* gr_pri_gpcs_setup_debug */
0x418830, /* gr_pri_gpcs_setup_debug_z_gamut_offset */
0x4188fc, /* gr_pri_gpcs_zcull_ctx_debug */

2
drivers/gpu/nvgpu/hal/gr/init/gr_init_gp10b.c
View File

@@ -44,7 +44,7 @@ void gp10b_gr_init_get_access_map(struct gk20a *g,
static u32 wl_addr_gp10b[] = {
/* this list must be sorted (low to high) */
0x404468, /* gr_pri_mme_max_instructions */
0x418300, /* gr_pri_gpcs_rasterarb_line_class */
0x418380, /* gr_pri_gpcs_rasterarb_line_class */
0x418800, /* gr_pri_gpcs_setup_debug */
0x418830, /* gr_pri_gpcs_setup_debug_z_gamut_offset */
0x4188fc, /* gr_pri_gpcs_zcull_ctx_debug */

2
drivers/gpu/nvgpu/hal/gr/init/gr_init_gv11b.c
View File

@@ -213,7 +213,7 @@ void gv11b_gr_init_get_access_map(struct gk20a *g,
static u32 wl_addr_gv11b[] = {
/* this list must be sorted (low to high) */
0x404468, /* gr_pri_mme_max_instructions */
0x418300, /* gr_pri_gpcs_rasterarb_line_class */
0x418380, /* gr_pri_gpcs_rasterarb_line_class */
0x418800, /* gr_pri_gpcs_setup_debug */
0x418830, /* gr_pri_gpcs_setup_debug_z_gamut_offset */
0x4188fc, /* gr_pri_gpcs_zcull_ctx_debug */