Remove use of linux specifix header files
<linux/nvhost.h> and <linux/nvhost_t194.h>
and use nvgpu specific header file
<nvgpu/nvhost_t19x.h> instead
This is needed to remove all Linux dependencies
from nvgpu driver
Replace all nvhost_*() calls by
nvgpu_nvhost_*() calls from new nvgpu library
Jira NVGPU-29
Change-Id: I32d59628ca5ab3ece80a10eb5aefa150b1da448b
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1494648
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Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
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Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Add new abstraction file common/linux/nvhost_t19x.c
for all nvhost APIs exported from linux/nvhost_t194.h
This file will be compiled only if config
CONFIG_TEGRA_GK20A_NVHOST is set
Export the new headers from file <nvgpu/nvhost_t19x.h>
Also add dummy private header file nvhost_priv_t19x.h
to store definition of private structure nvgpu_nvhost_dev
This file should be deleted when nvgpu-t19x repo
is merged into common nvhost repo
Jira NVGPU-29
Change-Id: I8c08c9242b08cc45f7c99cc400b3e1a720f9439c
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1493792
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
We pass (struct device_attribute *) to gp10b_ecc_stat_create()
and gr_gp10b_ecc_stat_create() and then assign a memory
allocation to this pointer
But since this pointer is local copy to function, static
pointer variables are never set in gr_gp10b_create_sysfs()
This also results in a resource leak since we never free
the storage assigned to local variable
Fix this by adding and passing correct parameter
(struct device_attribute **) so that the address of the
allocation is returned to the caller correctly
Bug 200291879
Coverity id : 2567934
Change-Id: I1b1d329265f4d32739abbbe3a4e419a2af62b874
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1495907
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Only for following instances, mssnvlink <-> hshub will
be interacting in gv11b:
NV_ADDRESS_MAP_MSS_NVLINK_1_BASE
NV_ADDRESS_MAP_MSS_NVLINK_2_BASE
NV_ADDRESS_MAP_MSS_NVLINK_3_BASE
NV_ADDRESS_MAP_MSS_NVLINK_4_BASE
NV_ADDRESS_MAP_MSS_NVLINK_0_BASE doesnt interact with gv11b hshub,
so don't set those credits.
GPUT19X-116
Change-Id: I8c6737293699444ddb1e27936f1c4a2e61871c29
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1493641
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Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
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Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
fb_timeout and pbdma_timeout values are already set by h/w to init
values. No need to reinitialize.
JIRA GPUT19X-22
Change-Id: If6f1111f58940d51e53f028b046c42fa852221ee
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1493458
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
In pri-silicon environment netlist names keep on changing.
So to keep software backward compatible. do not set
net name. So driver will check available firmwares and
will pick-up the firmware that matches with current hw netlist
major revision.
Change-Id: I6083879fb67481be03bad1eaf6a10d0cb6eb7c09
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1485135
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
In t19x, host1x supports sync point through memory mapped
shim layer. So sync-point operations implemented through
semphore methods signaling to this sync-point shim layer.
Added relevant hal functions for this in fifo hal.
JIRA GPUT19X-2
Change-Id: Ia514637d046ba093f4e5afa6cbd06673672fd189
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1258235
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Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
nvgpu_log/info/warn/err() internally add a \n to the end of the message.
Hence, callers should not include a \n at the end of the message. Doing
so results in duplicate \n being printed, which ends up creating empty
log messages. Remove the duplicate \n from all messages.
Bug 1928311
Change-Id: I21c141934a125e0cc0cead9fb19fa6502235cf06
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-on: http://git-master/r/1487233
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
(1) Re-arrange the structure for ecc counters reporting so multiple
units can be managed
(2) Add counters and handling for additional GPC counters
JIRA: GPUT19X-84
Change-Id: I74fd474d7daf7590fc7f7ddc9837bb692512d208
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1485277
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Adding support for ISR handling of GPCCS exceptions
and GCC ECC support
JIRA: GPUT19X-83
Change-Id: Ica749dc678f152d536052cf47f2ea2b205a231d6
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1480997
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
This CL covers the following parity support (uncorrected error),
1) SM's L1 DATA
2) SM's L0 && L1 icache
Volta Resiliency Id - Volta-634
JIRA GPUT19X-113
JIRA GPUT19X-99
Bug 1807553
Change-Id: Iacbf492028983529dadc5753007e43510b8cb786
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1483681
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Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This CL covers the following parity support (uncorrected error),
1) SM's LRF
2) SM's CBU
Volta Resiliency Id - Volta-637
JIRA GPUT19X-85
JIRA GPUT19X-110
Bug 1775457
Change-Id: I3befb1fe22719d06aa819ef27654aaf97f911a9b
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1481791
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Adding support for ISR handling of ecc uncorrectable errors
for volta resiliency (Volta-686)
TODO: move interrupt init out of MC
bug 1881052
JIRA: GPUT19X-82
Change-Id: I45db01a6062445dd1f64a8297744cd15105e3344
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1476603
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Added function pointers to check chip specific valid
gfx class and compute class. Also added function pointer
to update ctx header with preemption buffer pointers.
Also fall back to gp10b functions, where nothing
is changed from gp10b to gv11b.
Bug 200292090
Change-Id: I69900e32bbcce4576c4c0f7a7119c7dd8e984928
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1293503
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Use the new clk HAL to request clock rate instead of direct calls
to Clock Framework. This cuts one direct dependency to Linux APIs.
Also change the HAL to not clear clk ops after they've been
initialized.
JIRA NVGPU-16
Change-Id: I1ab3eac8268f1f3f3305d49782c6a0eb57c6d617
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1463536
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
