Commit Graph

17 Commits

Author SHA1 Message Date
Sagar Kamble
4eca7b806c gpu: nvgpu: cg: load therm unit SLCG gating registers
Therm unit SLCG hal was not called earlier. Call it from
nvgpu_init_therm_support and add unit tests.

JIRA NVGPU-2175

Change-Id: I158878f4a49e580c7addeff619e0a838020c7987
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2263271
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2020-12-15 14:10:29 -06:00
Seshendra Gadagottu
db339fd52f gpu: nvgpu: therm: move chip specific files to hal
Move thermal chip specific files to hal from common.

JIRA NVGPU-2018

Change-Id: I5022ddb4a2ab7f723936e027ffaa1222272095c0
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2070185
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2019-03-14 14:44:45 -07:00
Abdul Salam
c7702ab5ff gpu: nvgpu: Restructure common.pmu.therm unit
This patch does the following.
1. Remove include of HW header files in common.
2. Append public functions with nvgpu.

Jira NVGPU-1959

Change-Id: Ibd60620e9db14b52d49577b899b2d2077b5a544a
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2019236
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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2019-02-21 21:56:23 -08:00
Seshendra Gadagottu
18558fc9be gpu: nvgpu: move thermal related code to thermal unit
gm20b clocks is accessing thermal registers directly in several places.
Moved all this code to thermal unit and clock code is accessing these
through provided thermal hal functions.

Following new hal are defined in thermal unit for enabling/disabling
throttling and enabling/disabling idle slowdown:
void (*throttle_enable)(struct gk20a *g, u32 val);
int (*throttle_disable)(struct gk20a *g);
void (*idle_slowdown_enable)(struct gk20a *g, u32 val);
int (*idle_slowdown_disable)(struct gk20a *g);

At this moment, these hals are getting used only by gm20b code.

JIRA NVGPU-2001

Change-Id: I937a7c76dfae9aa7e86f23c53f84fae9a9dda13e
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2023289
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2019-02-21 13:45:22 -08:00
Terje Bergstrom
b29f4b9003 gpu: nvgpu: Split thrm.h into private and public
therm/thrm.h is used both by therm itself, and other units calling therm.
Move all public dependencies to include/nvgpu/pmu/therm.h

JIRA NVGPU-961

Change-Id: I66bad6b12d09b34f8f0f94486f2ec2955a65711c
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1986072
GVS: Gerrit_Virtual_Submit
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2019-01-10 20:09:42 -08:00
Abdul Salam
46c78422a7 gpu: nvgpu: clk:fix misc MISRA 16.3,16.1 violation
MISRA rule 16.3 states all switch clause to have break statement.
Fixing the missing break statement for default case.
Two consecutive labels without statement need not have break.
So no break is added for case without any statement.
This also makes the switch statement well-formed covering 16.1.

JIRA NVGPU-1510
JIRA NVGPU-1536

Change-Id: I2c16888cbcb429f49f1f260e18b7c6eba55aa83c
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1964328
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2018-12-13 09:43:10 -08:00
Abdul Salam
f7febd1c7a gpu: nvgpu: Fix Misra 15.7 Violations.
Misra rule 15.7 requires if..else if statement to end with else.
The else should have either one side effect or a comment.
Added nvgpu_log_info to print debug info.

JIRA NVGPU-1484

Change-Id: I7432ee03337e71d59d37dcffb0fb0ce9718163e0
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1965207
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
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2018-12-06 11:25:38 -08:00
Amurthyreddy
23f35e1b2f gpu: nvgpu: MISRA 14.4 bitwise operation as boolean
MISRA rule 14.4 doesn't allow the usage of integer types as booleans
in the controlling expression of an if statement or an iteration
statement.

Fix violations where the result of a bitwise operation is used as a
boolean in the controlling expression of if and loop statements.

JIRA NVGPU-1020

Change-Id: I6a756ee1bbb45d43f424d2251eebbc26278db417
Signed-off-by: Amurthyreddy <amurthyreddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1936334
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2018-11-13 09:45:25 -08:00
Srirangan Madhavan
ef5fdac7a6 gpu: nvgpu: Fix MISRA rule 15.6 violations
MISRA Rule-15.6 requires that all if-else blocks and loop blocks
be enclosed in braces, including single statement blocks. Fix errors
due to single statement if-else and loop blocks without braces
by introducing the braces.

JIRA NVGPU-775

Change-Id: Ib70621d39735abae3fd2eb7ccf77f36125e2d7b7
Signed-off-by: Srirangan Madhavan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1928745
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
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2018-11-05 22:13:16 -08:00
Amurthyreddy
a39c48e3e2 gpu: nvgpu: MISRA 14.4 err/ret/status as boolean
MISRA rule 14.4 doesn't allow the usage of integer types as booleans
in the controlling expression of an if statement or an iteration
statement.

Fix violations where the integer variables err, ret, status are used
as booleans in the controlling expression of if and loop statements.

JIRA NVGPU-1019

Change-Id: I9e18ffc961d485225732c34d3ca561e84d182d07
Signed-off-by: Amurthyreddy <amurthyreddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1921370
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2018-10-31 19:35:07 -07:00
Amurthyreddy
f8ce19f879 gpu: nvgpu: MISRA 14.4 Function pointer as boolean
MISRA rule-14.4 doesn't allow the usage of function pointers & integer
types as booleans in the controlling expression of an if statement or
an iteration statement.

Fix violations where a function pointer or a function whose return
value is an integer, is used as a boolean in the controlling expression
of if and loop statements.

JIRA NVGPU-1021

Change-Id: Ic5336268394ba4396ce80744c25930d2fb44dc42
Signed-off-by: Amurthyreddy <amurthyreddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1932147
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2018-10-24 17:01:39 -07:00
Amurthyreddy
88d21daedb gpu: nvgpu: MISRA 14.4 err/ret/status as boolean
MISRA rule 14.4 doesn't allow the usage of integer types as booleans
in the controlling expression of an if statement or an iteration
statement.

Fix violations where the integer variables err, ret, status are used
as booleans in the controlling expression of if and loop statements.

JIRA NVGPU-1019

Change-Id: Ia2ec5f1db3c7a1884efe5ba7b8b4d9ebbd021734
Signed-off-by: Amurthyreddy <amurthyreddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1921373
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2018-10-24 17:00:11 -07:00
Debarshi Dutta
421e64aad7 gpu: nvgpu: move header location of gk20a.h
Update header path of gk20a.h in files present in common/
to <nvgpu/gk20a.h>

Jira NVGPU-597

Change-Id: I3431dae93ada9bd561454c89a0b99c5292ab4a8d
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1832024
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2018-09-25 00:20:25 -07:00
Amulya
cf7850ee33 nvgpu: common: MISRA 10.1 boolean fixes
Fix violations where a variable of type non-boolean is used as a
boolean in gpu/nvgpu/common.

JIRA NVGPU-646

Change-Id: I91baa5cf1d38081161336bde5fbc06661b741273
Signed-off-by: Amulya <Amurthyreddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1807133
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2018-09-05 20:40:03 -07:00
Nitin Kumbhar
bcdac829f4 gpu: nvgpu: move therm debugfs to linux
Move debugfs related code of therm from common driver to linux
specific part of the driver. gp106_therm_debugfs_init()
is updated to use nvgpu_os_linux_ops.

This also affects gv100 as gp106_therm_debugfs_init is used
for gv100 as well.

JIRA NVGPU-603

Change-Id: Ia293d14599bc0c91fd1e917b5a430bd8f3d96e56
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1797906
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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2018-09-05 04:51:43 -07:00
Srirangan
3fbaee7099 gpu: nvgpu: common: Fix MISRA 15.6 violations
MISRA Rule-15.6 requires that all if-else blocks be enclosed in braces,
including single statement blocks. Fix errors due to single statement
if blocks without braces, introducing the braces.

JIRA NVGPU-671

Change-Id: I4d9933c51a297a725f48cbb15520a70494d74aeb
Signed-off-by: Srirangan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1800833
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2018-08-22 21:55:49 -07:00
Terje Bergstrom
91390d857f gpu: nvgpu: Move therm HAL to common
Move implementation of therm HAL to common/therm. ELCG and BLCG
code was embedded in gr HAL, so moved that code to therm.

Bump gk20a code to gm20b.

JIRA NVGPU-955

Change-Id: I9b03e52f2832d3a1d89071a577e8ce106aaf603b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1795989
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2018-08-14 15:33:20 -07:00