Commit Graph

4357 Commits

Author SHA1 Message Date
Peter Daifuku
4b8dc71de5 gpu: nvgpu: vgpu: flatten out t19x vgpu hal
Instead of calling the native HAL init function then adding
multiple layers of modification for VGPU, flatten out the sequence
so that all entry points are set statically and visible in a
single file.

JIRA ESRM-30

Change-Id: I8d277aaccb0e63b2d504e7aba32eb31ef82f4ec0
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1574619
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-10-13 15:20:19 -07:00
Peter Daifuku
57fb527a7e gpu: nvgpu: vgpu: flatten out vgpu hal
Instead of calling the native HAL init function then adding
multiple layers of modification for VGPU, flatten out the sequence
so that all entry points are set statically and visible in a
single file.

JIRA ESRM-30

Change-Id: Ie424abb48bce5038874851d399baac5e4bb7d27c
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1574616
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-13 15:20:18 -07:00
seshendra Gadagottu
7612e41215 gpu: nvgpu: gvxx: add hw defines for pbdma info
Generated following hw definitions to dump relevant data:
    pbdma_gp_shadow_0_r
    pbdma_gp_shadow_1_r

Bug 2003671

Change-Id: If2d0557b3c2896747793ff2afad875206e25c6d8
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1572183
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-13 15:20:12 -07:00
seshendra Gadagottu
3d343c9eea gpu: nvgpu: enhance pbdma debug info
Enhanced pbdma error output to print pbdma interrupt
error.

Generated following hw definitions to dump relevant data:
pbdma_gp_shadow_0_r
pbdma_gp_shadow_1_r

Updated gk20a_dump_pbdma_status to dump this additional
info:
pbdma_gp_put_r
pbdma_gp_get_r
pbdma_gp_shadow_0_r
pbdma_gp_shadow_1_r

Bug 2003671

Change-Id: Iaa75d936e00470a2b8d1151f60dbeb741b3f9bce
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1572182
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-13 15:20:07 -07:00
Terje Bergstrom
b0092ea95c gpu: nvgpu: gv11b: Abstract IO aperture accessors
Implement T19x specific usermode aperture initialization functions.
Move usermode_regs field to nvgpu_os_linux_t19x, because it is
Linux specific.

JIRA NVGPU-259

Change-Id: I9d6ce243a692ab48209d468288ed85f89fb26770
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1569699
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-13 15:20:01 -07:00
Terje Bergstrom
be3750bc9e gpu: nvgpu: Abstract IO aperture accessors
Add abstraction of IO aperture accessors. Add new functions
gk20a_io_exists() and gk20a_io_valid_reg() to remove dependencies to
aperture fields from common code.

Implement Linux version of the abstraction by moving gk20a_readl()
and gk20a_writel() to new Linux specific io.c. Move the fields
defining IO aperture to nvgpu_os_linux.

Add t19x specific IO aperture initialization functions and add t19x
specific section to nvgpu_os_linux.

JIRA NVGPU-259

Change-Id: I09e79cda60d11a20d1099a9aaa6d2375236e94ce
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1569698
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-13 15:19:55 -07:00
Alex Waterman
ff9c3fc20a gpu: nvgpu: Reduce usage of nvgpu_vidmem_get_page_alloc
Reduce the usage of nvgpu_vidmem_get_page_alloc() and friends as much
as possible. This reduces the dependency of nvgpu on Linux SGLs. SGLs
still need to be used, however, since sharing buffers in userspace is
done by dma_buf FD. The best way to pass the vidmem buf through the
dma_buf is by SGL pointer.

JIRA NVGPU-30
JIRA NVGPU-138

Change-Id: Ide0e9e5a557f00aa63b063be085042101a5b34ee
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1540709
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-13 15:19:34 -07:00
Alex Waterman
59e4089278 gpu: nvgpu: Separate vidmem alloc from Linux code
Split the core vidmem allocation from the Linux component of vidmem
allocation. The core vidmem allocation allocates the nvgpu_mem struct
that defines the vidmem buffer in the core MM code. The Linux code
now allocates some Linux specific stuff (dma_buf, etc) and also
allocates the core vidmem buf.

JIRA NVGPU-30
JIRA NVGPU-138

Change-Id: I88e87e0abd5ec714610eacc6eac17e148bcee3ce
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1540708
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-13 15:19:28 -07:00
Alex Waterman
88d5f6b415 gpu: nvgpu: Rename vidmem APIs
Rename the VIDMEM APIs to be prefixed by nvgpu_ to ensure
consistency and that all the non-static vidmem functions are
properly namespaced.

JIRA NVGPU-30
JIRA NVGPU-138

Change-Id: I9986ee8f2c8f95a4b7c5e2b9607bc1e77933ccfc
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1540707
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-13 15:19:23 -07:00
seshendra Gadagottu
506f891f76 gpu: nvgpu: gv11b: add syncpt shim ro map
For sync-point read map, create read only map per vm
and share with all channels that are using same vm.

Now restrict rw map to single syncpoint shim memory range.

JIRA GPUT19X-2

Change-Id: Ibd0b82d1cdb8861e1dbb073b27da1f9c9ab1d2ab
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1514339
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-10-13 15:19:17 -07:00
seshendra Gadagottu
a9ce91f910 gpu: nvgpu: add syncpoint read map
For sync-point read map:
 1. Added nvgpu_mem memory allocator in gk20a struct and
    allocated memory for this in gk20a_finalize_poweron()
    and freed this memory in gk20a_remove().
 2. Added "u64 syncpt_ro_map_gpu_va" in vm_gk20a struct
    for read map in vm.

Added nvgpu_quiesce() in nvgpu_remove() before freeing
syncpoint read map to ensure that nvgpu is idle.

JIRA GPUT19X-2

Change-Id: I7cbfec57f0992682dd833a1b0d92d694bcaf1eb3
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1514338
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-13 15:19:16 -07:00
seshendra Gadagottu
017a9f5775 gpu: nvgpu: add API to create nvgpu_mem from phys
Added new memory API _nvgpu_mem_create_from_phys for
creating nvgpu_mem from physical memory aperture.
With this new API, avoided usage of linux specific
"struct page" in general code and moved this code to
common linux code. This API internally uses
__nvgpu_mem_create_from_pages for creating nvgpu_mem
from physical pages.

JIRA GPUT19X-2

Change-Id: Iaf0193a7c33e71422e4ddabde01edf46f5a81794
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1571073
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-10-13 15:19:11 -07:00
Seema Khowala
ceaab0595c gpu: nvgpu: ctxsw_trace_tsg/channel_reset call order
For non fake mmu fault, both tsg and ch pointers
could be valid. If tsg pointer is non null, issue
ctxsw_trace for tsg instead of channel only.

Change-Id: I161c40e8d43c7ae4d953ef4768ad75d4e993c87e
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1577915
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-13 13:43:22 -07:00
Seema Khowala
a8643b3a99 gpu: nvgpu: WAR: unbind_channel_verify_status ret val
Do not return error if channel to be removed has
NEXT set. This is a WAR until proper fix is
identified and implemented.

Bug 200327095

Change-Id: Ia77f3b834e8e577ac2dad8281f1dd562079adcef
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1577133
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-13 13:43:10 -07:00
Deepak Nibade
6de92de60b gpu: nvgpu: fix channel status verify sequence
While unbindin a channel from TSG, we first disable all the channels,
then examine the status of channel being removed in
gk20a_fifo_tsg_unbind_channel_verify_status(),  and if this API fails we
re-enable all the channel and kill whole TSG

And in gk20a_fifo_tsg_unbind_channel_verify_status() we first check ctx_reload
and fault status and then check NEXT status
If channel has NEXT set we bail out

But since we have already changed the TSG ctx_reload status re-enabling all
channels in TSG might cause issues

Hence fix this by correcting sequence so that we first ensure that NEXT is
not set on channel and then only alter the status

Bug 200327095

Change-Id: I4f0786bc507fad5462d4cdd8d0ca91ea611ee3b5
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1575905
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-13 13:42:58 -07:00
David Nieto
e02d14e754 gpu: nvgpu: ce: tsg and large vidmem support
Some GPUs require all channels to be on TSG and also have larger than 4GB
vidmem sizes which were not supported on the previous CE2 code.

This change creates a new property to track if the copy engine needs to
encapsulate its kernel context on tsg and also modifies the copy engine code
to support much larger copies without dramatically increasing the PB size.

JIRA: EVLR-1990

Change-Id: Ieb4acba0c787eb96cb9c7cd97f884d2119d445aa
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1573216
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nirav Patel <nipatel@nvidia.com>
2017-10-13 13:42:30 -07:00
Timo Alho
a693acc5b4 Revert "gpu: nvgpu: gv11b: disable cycle stat"
This reverts commit 6647e5c956.

Bug 200352825

Change-Id: Ia44d61eafce78f99be2271e0afaf69cd5c102080
Signed-off-by: Timo Alho <talho@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1577920
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Srikar Srimath Tirumala <srikars@nvidia.com>
2017-10-12 13:46:09 -07:00
Konsta Holtta
036e4ea244 gpu: nvgpu: make channel worker wait interruptible
Change the wait for work pending condition to interruptible in the
channel worker thread, as there's no reason to be noninterruptible.
A noninterruptible wait, even one with a timeout, causes the worker to
be printed in the Linux blocked tasks list which is confusing.

Change the cond signal to interruptible to match this.

Change-Id: I71d848b7f449a5d53fecae90c6a450c98c675c7f
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1570166
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
2017-10-12 02:30:48 -07:00
Richard Zhao
114cfcca58 gpu: nvgpu: vgpu: fix coverity of vgpu_fifo_update_runlist_locked()
coverity defect id : 2630326:
parameter_hidden: declaration hides parameter "chid" (declared at line 532)

Bug 200291879

Change-Id: I7c7189d692500c5e4df07660cdb14f746ed0e69b
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1576517
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-10-11 22:34:46 -07:00
Terje Bergstrom
82f235b529 gpu: nvgpu: gv100: Qualify unsigned HW constants
Re-generate hardware headers so that all unsigned constants are
qualified with postfix U. This removes the need for compiler to do
implicit signed->unsigned conversions.

Change-Id: If3c1e25dcb07ce6857a4798f2c5308e2948fe5e0
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1571163
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
GVS: Gerrit_Virtual_Submit
2017-10-11 21:08:15 -07:00
Peter Daifuku
8bd5b7e3b8 gpu: nvgpu: no hv support for write_sm_error_state
There is no current need for a virtualized version of
nvgpu_dbg_gpu_ioctl_write_single_sm_error_state, so return
-ENOSYS when virtual.

Bug 200331110

Change-Id: I2a8cf07b2962de4c91b752b276678bee4eea6e80
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1568906
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-11 21:02:59 -07:00
Alex Waterman
ade9f5e03f gpu: nvgpu: Remove phys_addr_t from common code
Remove phys_addr_t change for corresponding change in the nvgpu
main repo.

JIRA NVGPU-30
JIRA NVGPU-226

Change-Id: I05a19bc51e949279edef6e9ad7161226cbca51a7
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1576466
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-10-11 14:40:23 -07:00
Alex Waterman
60b655330a gpu: nvgpu: Remove SGL reference from mm_gk20a.c
Remove an SGL reference from the mm_gk20a.c code. This code is
common code and as such all linuxisms need to be fixed. It just
so happens that this particular function is only used by the
CDE code which is only present in Linux. So simply move this
function over to the CDE code.

JIRA NVGPU-30
JIRA NVGPU-225
JIRA NVGPU-226

Change-Id: Ifb0cb427c742c6d9cada382ace4a52f52474c379
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1576436
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-10-11 14:40:22 -07:00
Alex Waterman
c53b94f1dd gpu: nvgpu: Remove phys_addr_t from common code
Remove phys_addr_t from common code and replace it with u64. This
faciliates QNX compiling the common code since phys_addr_t is a
Linux specific type.

JIRA NVGPU-30
JIRA NVGPU-226

Change-Id: I15fe2078f9cd0b07c7e90ad6e359c493afa56714
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1576432
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-11 14:40:22 -07:00
Alex Waterman
50975dcf2a gpu: nvgpu: memset alloced buffers on free
When freeing kmalloc and vmalloc buffers memset them to zero
before freeing them with the kernel APIs. This is only done if
CONFIG_NVGPU_TRACK_MEM_USAGE is set since this adds obvious
overhead to the driver. However, it is an incredibly useful
debug tool, so it's nice to have.

This could be done by enabling Linux kernel configs as well,
but not all OSes may have such a feature so building it into
nvgpu may prove quite useful.

Change-Id: I7a6a9a6ab4f3606a73a90b354c5a4a7b9cd4d947
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1575565
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-10-10 16:26:55 -07:00
Alex Waterman
fc5c787339 gpu: nvgpu: kmem debug bitrot update
Fix bitrot that was incurred when large amounts of the debugfs
stuff was moved the Linux struct. Since the debugfs debugging
is largely hidden under a config for the kmem code the necessary
changes for the kmem debugging were missed until now.

Change-Id: I105549ce39343e503212e302f39ede36c6ea5194
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1575564
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-10-10 16:26:55 -07:00
Konsta Holtta
9b20f2a15e gpu: nvgpu: report GR_SEMAPHORE_TIMEOUT on PBDMA sema timeout
As with GR's semaphore acquires that timeout, report
NVGPU_CHANNEL_GR_SEMAPHORE_TIMEOUT to userspace in the error notifier
also when a semaphore acquire timeout interrupt is received from PBDMA.
This timeout is used when the kernel watchdog timer is enabled.

Bug 1782480

Change-Id: I1ceb8632548c5e89febb2b80a5850116a2d4b670
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1574293
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
2017-10-10 16:26:53 -07:00
Terje Bergstrom
514c80d8d2 gpu: nvgpu: gv11b: Qualify unsigned HW constants
Re-generate hardware headers so that all unsigned constants are
qualified with postfix U. This removes the need for compiler to do
implicit signed->unsigned conversions.

Change-Id: Ic93ef7f7a6beae57be7759c7eb3df9148afed824
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1571162
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
2017-10-10 16:26:52 -07:00
Terje Bergstrom
b41e141778 gpu: nvgpu: Declare gk20a_user_*init() in ioctl.h
The functions are gk20a_user_init() and gk20a_user_deinit() are
defined in ioctl.c. Move declaration of the functions to new
header file ioctl.h.

JIRA NVGPU-259

Change-Id: If348b51e9032083f252a7c7717ed7bc153dbba52
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1569696
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-10 13:40:53 -07:00
Terje Bergstrom
4f56c88feb gpu: nvgpu: Move gk20a->busy_lock to os_linux
gk20a->busy_lock is a Linux specific rw_semaphore used only
by Linux code. Move it to os_linux.

JIRA NVGPU-259

Change-Id: I220a8a080a5050732683b875d3c1d0539ba0f40e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1569695
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-10 13:38:17 -07:00
Deepak Nibade
236573e00a gpu: nvgpu: clean up channel open/release declares
Below APIs are already declared in ioctl_channel.h, and hence remove duplicate
declaration from channel_gk20a.h
gk20a_channel_open()
gk20a_channel_ioctl()
gk20a_channel_release()

And move declaration of gk20a_channel_open_ioctl() from channel_gk20a.h to
ioctl_channel.h

Jira NVGPU-259

Change-Id: I46702ca481e41a19f92f4fe0169f95e31360abe0
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1573106
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-10 12:08:19 -07:00
David Nieto
7c5cf70268 gpu: nvgpu: add support for pre-os FW
Pre-os firmware takes care, among others, of the control of FAN till
the driver takes over its control. On some GPUs not enabling this FW can lead
tp physical board damage, hence it is needed to run this firmware.

JIRA: NVGPUGV100-9

Change-Id: I18d54cfd5eb64ecec79c5dae67ac8d5bb1facf36
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1549035
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-10-10 12:05:42 -07:00
David Nieto
f518304e0d gpu: nvgpu: fix GV100 hal definitions
These changes allow GV100 to init the basic HALs to pass
nvgpu_submit_twod

(1) Allocate fault buffer from vidmem instead of sysmem to prevent coherency
issues
(2) Properly enable FB
(3) Fan control requires the execution of the pre-os FW, without it the SKU201
is extremely noisy

 JIRA: NVGPUGV100-9

Change-Id: I9b2072737e45432f957e7faae6d33bc0ab43b817
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1539926
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-10-10 12:05:41 -07:00
Seema Khowala
bb1c38e2f5 gpu: nvgpu: gv11b: perfbuffer enable and disable dbg ops set to NULL
Will be enabled after feature is verified on volta

Bug 200352825

Change-Id: Idbe318ea82051e53f15caecf2afb15d72b99acea
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1574482
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-10-10 09:24:46 -07:00
Seema Khowala
bf8dca77ae gpu: nvgpu: add null check for perfbuffer enable and disable dbg ops
This is needed to disable/enable features on new chips

Bug 200352825

Change-Id: I02eb58e6fdd554ed20866fe8a8553a667541f512
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1574481
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-10 09:24:45 -07:00
Seema Khowala
6647e5c956 gpu: nvgpu: gv11b: disable cycle stat
Feature will be enabled after it is verified.
To disable cycle stat, do not set
NVGPU_GPU_FLAGS_SUPPORT_CYCLE_STATS and
NVGPU_GPU_FLAGS_SUPPORT_CYCLE_STATS_SNAPSHOT

Bug 200352825

Change-Id: I3f0d58a8095f3a0996964056029c12cff45f0a5b
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1573760
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-10 09:22:08 -07:00
Peter Daifuku
7bbbacee21 gpu: vgpu: set tsg_verify_channel_status to NULL
vgpu inherits the HAL from the native implementation.
But currently, the tsg_veriy_channel_status entry point is
not supported on vgpu, so make sure to NULL it.

Bug 200327095

Change-Id: Ic3604c6ed9bb7a2cddaed8426ce8d291a4adff1a
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1573331
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nirav Patel <nipatel@nvidia.com>
2017-10-10 09:06:27 -07:00
Terje Bergstrom
37ec670601 gpu: nvgpu: Move PRAMIN functions to nvgpu_mem
PRAMIN batch access functions are only used by nvgpu_mem. The way
the functions are written is Linux specific, so move the
implementation from common PRAMIN code.

JIRA NVGPU-259

Change-Id: I6e2aba08c98568c651a86fe8ca7f9f5220d67348
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1569697
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-10 08:49:05 -07:00
Seema Khowala
6fe9bdeb9a gpu: nvgpu: gv11b: track init veid bundle
Add debug prints to track veid bundle init
and also return err for subctx init failure.

Bug 1983643

Change-Id: I9e6a32e76b1c7deba3a47157ba253976d88b2324
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1568070
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-10 08:10:37 -07:00
Alex Waterman
3c37701377 gpu: nvgpu: Split VIDMEM support from mm_gk20a.c
Split VIDMEM support into its own code files organized as such:

  common/mm/vidmem.c     - Base vidmem support
  common/linux/vidmem.c  - Linux specific user-space interaction
  include/nvgpu/vidmem.h - Vidmem API definitions

Also use the config to enable/disable VIDMEM support in the makefile
and remove as many CONFIG_GK20A_VIDMEM preprocessor checks as possible
from the source code.

And lastly update a while-loop that iterated over an SGT to use the
new for_each construct for iterating over SGTs.

Currently this organization is not perfectly adhered to. More patches
will fix that.

JIRA NVGPU-30
JIRA NVGPU-138

Change-Id: Ic0f4d2cf38b65849c7dc350a69b175421477069c
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1540705
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-10 08:01:04 -07:00
Alex Waterman
b61306795b gpu: nvgpu: Add nvgpu/errno.h
Add an <nvgpu/errno.h> header file to explicitly include the -E* error
messages. Useful for header files with static inlines that return error
messages. In actual C code normally enough Linux/QNX headers bleed in
to get the error messages but header files with sparse includes do not
have this luxury.

Change-Id: I4833c7a6003578b9792bbf6b14cce3bd0adfec22
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1573307
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-10-10 07:58:26 -07:00
Konsta Holtta
04350c209d gpu: nvgpu: fix double iteration in gmmu update
__nvgpu_gmmu_do_update_page_table() uses nvgpu_sgt_for_each_sgl to loop
through the entries of a buffer to be mapped, so when continue is used,
the sgl entry must not be reassigned again like it was before with a
pure while-and-update loop. Delete a reassignment to fix a case where
sgl = sgl->next could happen twice.

Bug 2002279
Bug 2001466

Change-Id: I47c8b853d4b35304740cd4e8a840df02fcd23054
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1575279
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Timo Alho <talho@nvidia.com>
2017-10-09 23:20:58 -07:00
Deepak Nibade
19d602da31 gpu: nvgpu: verify channel status while closing per-platform
We right now call gk20a_fifo_tsg_unbind_channel_verify_status() to verify
channel status while unbinding a channel from TSG while closing

Add support to do this verification per-platform and keep this disabled
for vgpu platforms

Bug 200327095

Change-Id: I6e2a6a09c784d24ac49477d5450b7d4b671878e3
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1572369
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-04 03:43:18 -07:00
Mahantesh Kumbar
a616611727 gpu: nvgpu: falcon: Qualify unsigned HW constants
- Falcon HW header re-generate for gv11b.
- Re-generate hardware headers so that all unsigned
  constants are qualified with postfix U. This removes
  the need for compiler to do implicit signed->unsigned
  conversions

Change-Id: I313945edac1112a32c965d9565b30dc95a002752
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1571352
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
2017-10-04 03:40:30 -07:00
Mahantesh Kumbar
3663e9cccc gpu: nvgpu: gv100 hw header for Falcon controller
- Constants are qualified with postfix U.
This removes the need for compiler to do
implicit signed->unsigned conversions

Change-Id: I039e269b18ea8aea48b30d3af84b347ae5509413
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1570998
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
2017-10-04 03:40:20 -07:00
Mahantesh Kumbar
ce12d5e0fe gpu: nvgpu: falcon: Qualify unsigned HW constants
-Falcon HW header re-generate for gk20a, gm20b, gp10b & gp106.
-Re-generate hardware headers so that all unsigned constants are
 qualified with postfix U. This removes the need for compiler to do
 implicit signed->unsigned conversions

Change-Id: Ifdaac2c697ee7ba8be627e059bf18024a67bbd27
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1570775
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
2017-10-04 03:40:16 -07:00
Shashank Singh
14d99f1575 gpu: nvgpu: change logging enum names
Add nvgpu prefix to logging enums.
In debug mode QNX, Integrity have already
a hashdef DEBUG and it is conflicting with
logging enum DEBUG

Change-Id: I882e566302842f8b79daf11d5f0850dec222cfea
Signed-off-by: Shashank Singh <shashsingh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1570193
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
2017-10-04 03:40:10 -07:00
Deepak Nibade
33f475d6d8 gpu: nvgpu: kill TSG if channel has NEXT set while closing
Currently if channel has NEXT bit set while closing the channel we just print
an error and continue channel unbind sequence from TSG

But since channel with NEXT set is active killing it can potentially corrupt
the TSG context and cause unpredictable errors on remaining channels/TSG

Hence fix this by killing whole TSG context if channel being closed has
NEXT bit set

if gk20a_fifo_tsg_unbind_channel() API returns error, kill the TSG
otherwise continue with channel unbind sequence

Bug 200327095

Change-Id: I2abf1a3db8ba6f105b6ca86e78006c7b2a7726cc
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1568566
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
2017-10-04 03:37:17 -07:00
Deepak Nibade
3cd0603c42 gpu: nvgpu: verify channel status while closing per-platform
We right now call gk20a_fifo_tsg_unbind_channel_verify_status() to verify
channel status while unbinding a channel from TSG while closing

Add support to do this verification per-platform and keep this disabled
for vgpu platforms

Bug 200327095

Change-Id: I19fab41c74d10d528d22bd9b3982a4ed73c3b4ca
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1572368
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-04 03:37:14 -07:00
Alex Waterman
dc5edb1417 gpu: nvgpu: rename ops.mm.get_physical_addr_bits
T19x/gv100 version of same patch in kernel/nvgpu.

Change-Id: I7174864cf1e072af61609c0843da16fcafe54c02
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1566750
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-04 02:32:32 -07:00