Commit Graph

9 Commits

Author SHA1 Message Date
Tejal Kudav
b33079d47e gpu: nvgpu: Move intr data members from MC to CIC
Move interrupt specific data-members from common.mc to common.cic
Some of these data members like sw_irq_stall_last_handled_cond need
To be initialized much earlier during the OS specific init/probe stage.
Also, some more members from struct nvgpu_interrupts(like stall_size,
stall_lines[]), which will soon be moved to CIC will also need to be
initialized early during the OS specific probe stage.
However, the chip specific LUT can only be initialized after the
hal_init stage where the HALs are all initialized.
Split the CIC init to accommodate the above initialization requirements.

JIRA NVGPU-6899

Change-Id: I9333db4cde59bb0aa8f6eb9f8472f00369817a5d
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2552535
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2021-07-19 18:06:28 -07:00
tkudav
0526e7eaa9 gpu: nvgpu: Create CIC-mon and CIC-rm subunits
common.cic unit is divided into common.cic.mon and common.cic.rm
based on rm and mon process split.

CIC-mon subunit includes the code which is utilized in critical
interrupt handling path like initialization, error detection and
error reporting path. CIC-rm subunit includes the code corresponding
to rest of interrupt handling(like collecting error debug data from
registers) and ISR status management (status of deferred interrupts).

Split the CIC APIs and data-members into above two subunits.

JIRA NVGPU-6899

Change-Id: I151b59105ff570607c4a62e974785e9c1323ef69
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2551897
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2021-07-02 09:57:56 -07:00
Tejal Kudav
9f43914933 gpu: nvgpu: Move Intr handling common code to CIC
CIC (Central Interrupt controller) will be responsible for the
interrupt handling. common.cic unit is the placeholder for all
interrupt related code. Move interrupt related defines and
Public APIs present in common.mc to common.cic.
Note: The common.mc interrupts related struct definitions are
not moved as part of this patch.

Adapt the code to use interrupt handling related defines and public
APIs migrated from common.mc to common.cic

JIRA NVGPU-6899

Change-Id: I747e2b556c0dd66d58d74ee5bb36768b9370d276
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2535618
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2021-05-31 19:37:31 -07:00
Vedashree Vidwans
26fc64fb0b gpu: nvgpu: update common.mc function and docs
- Update documentation for common.mc and gops_mc functions.
- Rename test_setup_env and test_free_env to test_mc_setup_env and
test_mc_free_env respectively. This will make sure that mc test has
independent setup and free functions.
- Add doxygen comments for mc.enable and mc.disable.
- Modify MC unit test description.

Jira NVGPU-6240

Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Change-Id: I87291ee5f90b8e3c29c475c00a78c7855de5740e
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2457183
(cherry picked from commit c62ff36f87878a8a7513bef06e111117d96c61c8)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2480602
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2021-03-04 11:04:15 -08:00
Sagar Kamble
57f3968cb9 gpu: nvgpu: mc: address code inspection gaps
Address following issues uncovered during inspection:
1. Remove the doxygen comment from nvgpu_wait_for_deferred_interrupts
   definition.
2. Use NVGPU_MC_INTR_STALLING instead of hardcoding the index.
3. Define doxygen groups NVGPU_MC_UNIT_ENUMS,
   NVGPU_MC_INTR_TYPE_DEFINES, NVGPU_MC_INTR_UNIT_DEFINES and
   NVGPU_MC_INTR_ENABLE_DEFINES.
4. Update the doxygen comments.
5. Fix the cleanup, typo in the description of the test
   test_wait_for_deferred_interrupts.

JIRA NVGPU-4795

Change-Id: Ifc6756832aabf9dd42ee174eb1373495e6d38c86
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2287627
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2020-12-15 14:13:28 -06:00
Philip Elcan
2b86f65477 gpu: nvgpu: mc: cleanup SWVR traceability
Cleanup issues with traceability for common.mc:
- Move these declarations under macros or @cond as they are either
  non-fusa or private functions to the unit:
  - gm20b_mc_is_enabled
  - mc_gp10b_log_pending_intrs
  - mc_gp10b_ltc_isr
  - gv11b_mc_is_intr_hub_pending
- Fix typo in SWUTS for gv11b_mc_is_stall_and_eng_intr_pending

JIRA NVGPU-4818

Change-Id: I53a332627772e4d793430159ac1924c8f9ce8c1c
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280640
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2020-12-15 14:10:29 -06:00
Philip Elcan
12df00c943 gpu: nvgpu: unit: update SWUTS for mc
Update targets for mc to use new gops_mc.func syntax.
Update Test Type as appropriate.

JIRA NVGPU-4818

Change-Id: I03d68743aa802a391d6782076607266939a4a133
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279483
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2020-12-15 14:10:29 -06:00
Nicolas Benech
b682091b13 gpu: nvgpu: SWUTS: clean up test types
Apply the following changes to test types:
* "Init" --> "Other (setup)"
* "Coverage" --> Removed since it's implied for all tests
* "Feature based" --> "Feature"
* "Boundary Value analysis" and "Boundary values based" --> "Boundary values"
* "Error guessing based" --> "Error guessing"

JIRA NVGPU-3510

Change-Id: I3a9c0c59e6ad806f3479caa5e9a62f4d89f76923
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2265670
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2020-12-15 14:10:29 -06:00
Philip Elcan
5f0d1f39c2 gpu: nvgpu: unit: create mc unit test
JIRA NVGPU-2224

Change-Id: Ic433e8bc2ac583c1735203d1b5f0fd61942c33d4
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2257128
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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2020-12-15 14:10:29 -06:00