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Philip Elcan
7883d7185e gpu: nvgpu: unit: fuse: update SWUTS 
This adds the Targets keyword for the fuse tests.

JIRA NVGPU-4818

Change-Id: I98b6bdad30f3fc09c41fc7c192cce20e1323b035
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2278498
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Philip Elcan
a8426d6c75 gpu: nvgpu: unit: rbtree: update SWUTS 
Add Targets keyword

JIRA NVGPU-4818

Change-Id: Iee33a2e2f7246b8b58e8f38945f77bb3196fb363
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2278497
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Philip Elcan
087010464c gpu: nvgpu: unit: enabled: update SWUTS 
Add Targets tag
Update Test Type

JIRA NVGPU-4818

Change-Id: If1a8c6beced40b9bc6a79d9134eb1c8080533408
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2278496
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Philip Elcan
a9f63a9cd0 gpu: nvgpu: unit: ptimer: update SWUTS 
Add Targets keyword
Update Test Type

JIRA NVGPU-4818

Change-Id: I6c9bace91725df937e367074e08e4c181c60d1be
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2278495
Reviewed-by: Automatic_Commit_Validation_User
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Reviewed-by: Alex Waterman <alexw@nvidia.com>
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 2020-12-15 14:10:29 -06:00
tkudav
36024a917a gpu: nvgpu:Add Targets in common.priv_ring SWUTS 
Update the "Targets:" field entries to match the names of
gops function pointers in SWUD.

JIRA NVGPU-4679

Change-Id: Ib4fde3f4ebcf709170bb7a7f4f2c953a141e472b
Signed-off-by: tkudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2277117
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 2020-12-15 14:10:29 -06:00
tkudav
78ce6672c9 gpu: nvgpu: Update Targets in common.bus SWUTS 
Update the "Targets:" field entries to match the names of
gops function pointers in SWUD.

JIRA NVGPU-4679

Change-Id: I145f362dee433109e6b98b1620bbc4b740f7934d
Signed-off-by: tkudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2277111
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 2020-12-15 14:10:29 -06:00
tkudav
7525e87d59 gpu: nvgpu: Update Targets in common.top SWUTS 
Update the "Targets:" field entries to match the names of
gops function pointers in SWUD.

JIRA NVGPU-4679

Change-Id: I2723fa51329943e2d8fe6f30cb8954d05344389d
Signed-off-by: tkudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2277095
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 2020-12-15 14:10:29 -06:00
tkudav
9cc80a7234 gpu: nvgpu: Update Targets in common.class SWUTS 
Update the "Targets:" field entries to match the names of
gops function pointers in SWUD.

JIRA NVGPU-4679

Change-Id: I06489c0b0b01143b410f53bfd382f1a50a40a8c9
Signed-off-by: tkudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2277088
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Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Philip Elcan
5152391572 gpu: nvgpu: unit: update missing SWUTS files 
A few unit tests went in without updating the SWUTS file/group info in
SWUTS.h and SWUTS.sources.

JIRA NVGPU-4818

Change-Id: I483e6703a8d4bb5d663795c70ecd8b75a514a97d
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2275468
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 2020-12-15 14:10:29 -06:00
Philip Elcan
f2e2b29194 gpu: nvgpu: unit: add test for common.utils.string 
Add unit test for the common.utils.string unit.

JIRA NVGPU-4826

Change-Id: I4bfca346fb2202f9572199590f33a0461443fbc9
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2275456
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 2020-12-15 14:10:29 -06:00
Philip Elcan
0b0c4e6bd4 gpu: nvgpu: utils: fix typo in strnadd_u32 
Fix typo where the wrong value would be created because 'c' comes before
'd'.

JIRA NVGPU-4826

Change-Id: I7ad0a931187267951a470f5c02bc4c134cc9a498
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2275455
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 2020-12-15 14:10:29 -06:00
vinodg
c0eee06799 gpu: nvgpu: test for negative code coverage in gr init 
Add test_gr_init_error_injections function which help to
cover the negative tests like allocation failure and
condition failures.

Jira NVGPU-4676

Change-Id: Ieec2e234947676e17a1a2f772c00eb116cdcc536
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2275220
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 2020-12-15 14:10:29 -06:00
Thomas Fleury
3ced484d3b gpu: nvgpu: unit: use BUG callbacks for EXPECT_BUG 
Use BUG() callback mechanism to implement EXPECT_BUG.
The longjmp is done in the callback.

Jira NVGPU-4512

Change-Id: I2544329ce5e8becb5bb9cc6df6cf50fe65eaf314
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2266394
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 2020-12-15 14:10:29 -06:00
Thomas Fleury
1a3c1ee984 gpu: nvgpu: unit: add test for BUG() callbacks 
Add unit tests for the following functions:
- nvgpu_bug_register_cb
- nvgpu_bug_unregister_cb

Jira NVGPU-4512

Change-Id: I21a4bd55cfff080373b6234e517c1ee9cb51cb8a
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2266392
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 2020-12-15 14:10:29 -06:00
Thomas Fleury
1f3f34b906 gpu: nvgpu: add BUG() callbacks 
Add support for registering callbacks that will
be called on BUG().

Jira NVGPU-4512

Change-Id: I35c9b6c17db3b9fa5d098918223083f0b4aaace4
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2266391
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 2020-12-15 14:10:29 -06:00
Petlozu Pravareshwar
569f34470e gpu: nvgpu: add Doxygen for posix queue 
Add Doxygen documentation for posix queue.

Jira NVGPU-4296

Change-Id: I21c310d1271c5a0802c64f7fe25223c50b86a7b9
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2275815
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 2020-12-15 14:10:29 -06:00
Scott Long
20114c7c8c gpu: nvgpu: acr: misra 12.1 fixes 
MISRA Advisory Rule states that the precedence of operators within
expressions should be made explicit.

This change removes the Advisory Rule 12.1 violations from acr code.

Jira NVGPU-3178

Change-Id: Ibfcb23dbf9931efd1890c9b548c36462c55ae47d
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2277477
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 2020-12-15 14:10:29 -06:00
Deepak Nibade
c96164ede4 gpu: nvgpu: remove unnecessary asserts in obj_ctx subunit 
Below functions in common.gr.obj_ctx subunit include unnecessary
asserts to ensure value is not truncated when parsing into U32 size.
nvgpu_gr_obj_ctx_gr_ctx_alloc()

Make use of nvgpu_safe_cast_u64_to_u32() and remove unnecessary
asserts

Jira NVGPU-4778

Change-Id: Ic06c2f4131b3bba35222f7de5441f82ecee6d83d
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2277158
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 2020-12-15 14:10:29 -06:00
Deepak Nibade
04285893f7 gpu: nvgpu: unit: add test case for no SM detected 
Set a stub that returns 0 instead of number of SM detected.
Ensure nvgpu_gr_fs_state_init() triggers a BUG and returns error.

Jira NVGPU-4778

Change-Id: I53ce36152a7f4bfe061ed9b5a532aa3b6995825a
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2277157
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 2020-12-15 14:10:29 -06:00
Deepak Nibade
12bc49a078 gpu: nvgpu: unit: update dummy pes_tpc_mask for better coverage 
Update gr_test_config_get_pes_tpc_mask() to return 0x2F when called
for third time.

There are 2 PES in a GPC. So essentially we want to cover below two
cases
1. pes_tpc_count[pes0][gpc0] > pes_tpc_count[pes1][gpc0]
2. pes_tpc_count[pes0][gpc0] < pes_tpc_count[pes1][gpc0]

Also, run gr_test_diff_gpc_skip_mask() before gr_test_diff_pes_tpc_mask()
so that gpc_skip_mask calculation can generate above two cases first.

Jira NVGPU-4778

Change-Id: I1c34bbc36b0e126d34529725b6c45b59b7e66b67
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2277156
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 2020-12-15 14:10:29 -06:00
Scott Long
7444372237 gpu: nvgpu: static analysis misra 12.1 fixes 
MISRA Advisory Rule states that the precedence of operators within
expressions should be made explicit.

This change removes the Advisory Rule 12.1 violations from static_analysis.h.

Jira NVGPU-3178

Change-Id: Iae159038b5a99cbc98bd4de5c90b66b65e7f5b98
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2276790
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 2020-12-15 14:10:29 -06:00
Abdul Salam
1481fe54e9 gpu: nvgpu: Remove dependency in FMON 
This patch removes dependency between pmu.clk and hal.clk.

Below is the implementation.
*Init the clk domains inside pmu.clk unit.
*Set this in a member variable and send it to hal.clk unit
*Use this to determine the valid clock domains and read the
 monitor registers for each valid domains.
*Return the domain with error code.
*With this all the clk domain data is removed from hal.clk and
 only pmu.clk uses it as it owns it.

JIRA NVGPU-4491

Change-Id: Ie57b2472cfaacfd2ce43ac7f95702bd95fb8bbaa
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2272416
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 2020-12-15 14:10:29 -06:00
vinodg
977cc73230 gpu: nvgpu: move wait_initialized to non-fusa section 
nvgpu_gr_wait_initialized function is being called from cg and
pg subunit and only be used as part of non-fusa code.
Add CONFIG_NVGPU_HAL_NON_FUSA checking for that function call.

Jira NVGPU-4676

Change-Id: Ibfdbe336a5e56bc5a2974576cffb9fb5cb5d2cc9
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: http://git-master.nvidia.com/r/c/linux-nvgpu/+/2276907
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 2020-12-15 14:10:29 -06:00
vinodg
a126e00e28 gpu: nvgpu: compile out unused code in gr init unit 
Add CONFIG_NVGPU_GRAPHICS check before calling
g->gops>gr.init.preemption_state function.

Add NULL checking of pointer before deferecing those
pointers in de_init functions

Jira NVGPU-4676

Change-Id: Id9be0aebdcab4a8fb2b03e92e67c1c207b5b8eab
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: http://git-master.nvidia.com/r/c/linux-nvgpu/+/2276898
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 2020-12-15 14:10:29 -06:00
Scott Long
d864904a49 gpu: nvgpu: mm: misra 12.1 fixes 
MISRA Advisory Rule states that the precedence of operators within
expressions should be made explicit.

This change removes the Advisory Rule 12.1 violations from mm code.

Jira NVGPU-3178

Change-Id: I51c53c3200530c8fb2b958d9d7d77b9366d9a202
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: http://git-master.nvidia.com/r/c/linux-nvgpu/+/2276837
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 2020-12-15 14:10:29 -06:00
Scott Long
7378e16778 gpu: nvgpu: gr: misra 12.1 fixes 
MISRA Advisory Rule states that the precedence of operators within
expressions should be made explicit.

This change removes the Advisory Rule 12.1 violations from gr code.

Jira NVGPU-3178

Change-Id: I99a60f60f6edcc2acb7343c66d1c4c79752d4acb
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: http://git-master.nvidia.com/r/c/linux-nvgpu/+/2276774
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 2020-12-15 14:10:29 -06:00
Thomas Fleury
dfc0f3342a gpu: nvgpu: unit: complete tsg coverage 
Previous pruning rules in test_tsg_unbind_channel were
skipping the case where both tsg unbind and update runlist
fail.

Modified pruning rules to cover all cases.

Jira NVGPU-4673

Change-Id: I38a63347483252deb83fa079545cead59c7ec594
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: http://git-master.nvidia.com/r/c/linux-nvgpu/+/2276011
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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Reviewed-by: Philip Elcan <pelcan@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Thomas Fleury
2540a98aa4 gpu: nvgpu: unit: update 'Targets' for fifo units 
This patch adds a number of missing 'Targets' fields in the SWUTS of
various fifo units, fixes some missing ones and adds gops based
targets.

Jira NVGPU-4376

Change-Id: I445196e7092b01853786f40b860b29abc5d68371
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2276680
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 2020-12-15 14:10:29 -06:00
ddutta
b7be2379c0 gpu: nvgpu: move nv-p2p outside nvgpu 
nv-p2p doesn't depend upon nvgpu directly
and hence it can be moved to nvidia repository.

Bug 200551105

Change-Id: Icd855ecdb91ede29f8b4d3631bb140092e7a8f7e
Signed-off-by: ddutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2275813
Reviewed-by: Preetham Chandru <pchandru@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Philip Elcan
cbf5b0c75b gpu: nvgpu: unit: ptimer: add case for uncovered lines 
This adds a test for one case in scale_ptimer() that wasn't previously
covered by the test.

NVGPU-4818

Change-Id: Ifdf92b68a921d288701b2a9ecd45e07f96e229d8
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2274670
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 2020-12-15 14:10:29 -06:00
Lakshmanan M
1c991a58af gpu: nvgpu: Add SM diversity support 
To achieve permanent fault coverage, the CTAs launched by
each kernel in the mission and redundant contexts must execute on
different hardware resources. This feature proposes modifications
in the software to modify the virtual SM id to TPC mapping across
the mission and redundant contexts. The virtual SM identifier to TPC
mapping is done by nvgpu when setting up the patch context.

The recommendation for the redundant setting is to offset the
assignment by one TPC, and not by one GPC. This will ensure that both
GPC and TPC diversity. The SM and Quadrant diversity will happen
naturally. For kernels with few CTAs, the diversity is guaranteed
to be 100%. In case of completely random CTA allocation,
e.g. large number of CTAs in the waiting queue, the diversity is
1 - 1/#SM, or 87.5% for GV11B, 97.9% for TU104.

Added NvGpu CFLAGS to enable/disable the SM diversity support
"CONFIG_NVGPU_SM_DIVERSITY".

This support is only enabled on gv11b and tu104 QNX non safety build.

JIRA NVGPU-4685

Change-Id: I8e3eaa72d8cf7aff97f61e4c2abd10b2afe0fe8b
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2268026
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Shashank Singh <shashsingh@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Philip Elcan
7601d1c620 gpu: nvgpu: unit: add static_analysis unit test 
Add unit test for common.utils static_analysis unit.

JIRA NVGPU-4825

Change-Id: Id103ab101bbca8424dd7f0d136f1101ddf4bc2b5
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2276814
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
ajesh
6afd472abe gpu: nvgpu: add test case target functions 
Add the target function names for posix unit tests.

Jira NVGPU-4478

Change-Id: I393c3d6ba99c96e54812e29dedc8abfe7afcebab
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2276656
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Philip Elcan
796781313e gpu: nvgpu: unit: worker: add more coverage 
This adds a test to cover a missing branch in the worker thread.

JIRA NVGPU-4818

Change-Id: I6e4a1f4615954a666549d063020308b592286347
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2276649
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Thomas Fleury
0836f31c47 gpu: nvgpu: unit: improve gv11b tsg coverage 
test_gv11b_tsg_bind_channel_eng_method_buffers was missing
in the list of tests for the module.

Added the test, and fixed couple issues:
- wrong test on gpu_va in valid case.
- NULL pointer assignment during test setup, when
  tsg->eng_method_buffers is NULL.

Jira NVGPU-4673

Change-Id: I2478425f0380540e8295325ffd3df672dc5d9fd0
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2276068
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Thomas Fleury
a252ab1b0d gpu: nvgpu: unit: improve gm20b pbdma coverage 
Add the following cases:
- timeout == 0 in gm20b_pbdma_acquire_val
- 32-bit overflow in pbdma_method1_r computation.

Note: 32-bit overflow for pbdma_method0_r in
gm20b_pbdma_is_sw_method_subch is hindered by overflow
in pbdma_method1_r which occurs first.

Jira NVGPU-4673

Change-Id: If8202a4397115efb5af490b1ce974b43699e15c6
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2276051
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Philip Elcan
031d2b77a2 gpu: nvgpu: remove log_common from fusa build 
Remove log_common.c from safety build since it is only used in
linux-specific code.

JIRA NVGPU-4818

Change-Id: Ic7f21617231cdc4f6a15a94d83275bcbe5901a30
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2276025
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Thomas Fleury
b3960b2628 gpu: nvgpu: unit: improve gm20b channel coverage 
Add cases to trigger BUG() when passing invalid ch->chid.
This causes BUG() when computing register address for
ccsr_channel_inst_r(i) and ccsr_channel_r(i).

Jira NVGPU-4673

Change-Id: I313c6e6e65b38310af39f9817bb2398edf118d89
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2276022
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
vinodg
97ce51215b gpu: nvgpu: remove NVC0C0_SET_SHADER_EXCEPTIONS from gr intr test 
Remove unused NVC0C0_SET_SHADER_EXCEPTIONS from gr intr unit test.
Update the mock io register with valid class number value.

Jira NVGPU-4454

Change-Id: I1b6772c7c8d2c75f05d57cb5eb2a630aa7b6b6e0
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2275286
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Seshendra Gadagottu
b662fdfaf7 gpu: nvgpu: arch: add yaml support for nvgpu-next 
JIRA NVGPU-4383

Change-Id: Id6748f6e20e0ed831154a1d87639b03512bf049c
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2268327
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
seshendra
4ce4cdcd0f gpu: nvgpu: t23x: init hal for nvgpu-next 
Add hooks for nvgpu-next init hal.

JIRA NVGPU-4383

Change-Id: Ia899878743bca35d911c74444749f254ba94bbe0
Signed-off-by: seshendra <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2243694
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Deepak Nibade
c7fa4109a8 gpu: nvgpu: remove extra semicolon in nvgpu_gr_config_init() 
Extra semicolon showed up as extra statement for which coverage was
missing as per Vectorcast. Remove the extra semicolon.

Jira NVGPU-4778

Change-Id: Id0135511a50d88c9a3ca5447dd6ebfd3dd9fa52d
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2276344
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Deepak Nibade
27d5dcc946 gpu: nvgpu: remove unnecessary asserts in global_ctx subunit 
Below functions in common.gr.global_ctx subunit include unnecessary
asserts to ensure value is not truncated when parsing into U32 size.
nvgpu_gr_global_ctx_init_local_golden_image()
nvgpu_gr_global_ctx_load_local_golden_image()

Make use of nvgpu_safe_cast_u64_to_u32() and remove unnecessary
asserts

Jira NVGPU-4778

Change-Id: Ia1da30f514632bca4a947a1018932a2424031e13
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2275919
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Prateek sethi
5f74899178 gpu: nvgpu: flush the UTF fprintf buffer on each call 
In case of segmentation fault or hang unit test prints are not coming
in GVS logs which has already run. It makes difficult to find exact
faulty test/unit.

Adds fflush which flush the msg buffer after each call.

Bug 200577095

Change-Id: Ib77ec40636d9416414ef1a00dcf8886b7aae0f3b
Signed-off-by: Prateek sethi <prsethi@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2275538
Reviewed-by: Shashank Singh <shashsingh@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Vedashree Vidwans
4649631d38 gpu: nvgpu: unit: fix channel UT failures 
Currently, it seems that channel UT triggers segmentation fault in the
UT framework. Modify test_ch_referenceable_cleanup to confirm test
results using fifo pointer instead of channel pointer. This patch adds
error messages in some tests in case of failures.

Jira NVGPU-4817

Change-Id: I70121e5d082bae5e71cf1dab28a75a888a62ad40
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2275296
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Nicolas Benech <nbenech@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Philip Elcan
50f3a94317 gpu: nvgpu: unit: init: add coverage in quiesce 
This adds an additional test for where the cond init fails which was not
previously covered.

JIRA NVGPU-4818

Change-Id: I61f9808b3b438bacce6e41a7d1f84a3206837a8e
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2275222
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Seshendra Gadagottu
9160bd29c3 gpu: nvgpu: gm20b: update whitelist reg list 
Added gm20b whitelist register access list with following
zcull registers:
gr_pri_gpcs_setup_debug_z_gamut_offset
gr_pri_gpcs_zcull_ctx_debug

Access to these registers is required by 3d API drivers to write
zcull depth values less than 0.25

Bug 2757650

Change-Id: I8eae7b027831b6c61b144898476dcb83cbe09644
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2274559
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Thomas Fleury
6828487f70 gpu: nvgpu: unit: coverage for gm20b pbdma status 
Add coverage for the following function:
- gm20b_read_pbdma_status_info

Jira NVGPU-4673

Change-Id: I30c20932f84aac4a96efcb023ca85c5fbaecac1c
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2270924
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Thomas Fleury
11aeb94d75 gpu: nvgpu: fix next_id in pbdma status 
populate_load_chsw_status_info and populate_switch_chsw_status_info
were using the wrong accessor to read next_id field from
pbdma status.

Use fifo_pbdma_status_next_id_v() to read next_id.
Also clean up code to use engine_status when available.

Jira NVGPU-4673

Change-Id: I9ec916dd6ce2f429ef24ebead47d315033b3f250
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2270923
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Sagar Kamble
1f782b8fa9 gpu: nvgpu: update the falcon and cg unit test types and targets 
Fix the test types and update targets for falcon and cg unit tests.
This will add the SWUD<->SWUTS traceability.

JIRA NVGPU-4429
JIRA NVGPU-4431

Change-Id: Ib1f7f50aedf0711fd5f943fc7552c15dfea30504
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2274787
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00