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vinodg
89518f3740 gpu: nvgpu: compile out unused code in gr unit 
Compile out code not used in safety for gr subunit.
The code is used only with dgpu support.

Jira NVGPU-3968

Change-Id: I7be5b06c6eed5a6d382016f1ccb5dbec63928294
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2247146
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Peter Daifuku
fa8ca3fb19 gpu: nvgpu: re-enable elpg after golden img init 
Typically, the PMU init thread will finish up long
before the golden context image has been initialized,
which means that ELPG hasn't truly been enabled at that
point.

Create a new function, nvgpu_pmu_reenable_pg(), which
checks if elpg had been enabled (non-zero refcnt), and
if so, disables then re-enables it.

Call this function from nvgpu_gr_obj_ctx_alloc() after
the golden context image has been initialized to ensure
that elpg is truly enabled.

Bug 200543218

Change-Id: I0e7c4f64434c5e356829581950edce61cc88882a
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2245768
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
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 2020-12-15 14:10:29 -06:00
Philip Elcan
7de9f2c331 gpu: nvgpu: unit: init: add more testing for hal init 
Expand coverage for the hal init unit test to include negative testing
and line/branch coverage.

Also add Targets tag for SWUTS.

JIRA NVGPU-927

Change-Id: Ied63756b0d5abaaa03cd9aaa7b6a7fd817a1a967
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2245612
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Philip Elcan
b69615ef00 gpu: nvgpu: posix: add flag to make gpu version a01 
Add posix flag to allow unit tests to make device version gv11b a01 for
better branch coverage.

JIRA NVGPU-927

Change-Id: I410c4c6befa7b27bb258d743e7f5f9d718d33d47
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2245611
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Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Philip Elcan
d9230e4087 gpu: nvgpu: unit: init: add testing for get_litter API 
Add unit testing for gv11b_get_litter_value().

JIRA NVGPU-927

Change-Id: I9ddfbe5780ce1a383818672837f8f052c663cac7
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2245610
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Thomas Fleury
a6c4eb4c14 gpu: nvgpu: update test_gk20a_runlist_wait_pending spec 
Update description for test_gk20a_runlist_wait_pending.
Test is now using register IO callbacks instead of a thread to
clear fifo_eng_runlist_r pending bit.

Jira NVGPU-3793

Change-Id: I7ddae3f4574705eb57bd432693da91480c7f09dd
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2243621
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
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 2020-12-15 14:10:29 -06:00
rmylavarapu
db62de9f00 gpu: nvgpu: volt: Remove volt_policy get status 
Removed volt_policy get status implimentation as in
turing we are using volt_rail get status for reading
voltage which are policy independent.

NVGPU-4372

Change-Id: Id3c91c5eb03c13cdb83eb39decd44bf53ae7f473
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2243967
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 2020-12-15 14:10:29 -06:00
rmylavarapu
67e46fb8ee gpu: nvgpu: volt: Remove unsused code in volt_policy 
Removed unused split rail structs and functions which
are no longer valid for turing. Split rail structs are
retained in supersurface boradobj interface structs
as this is needed by PMU. Can be removed once the PMU
code is updated.

NVGPU-4372

Change-Id: Ia22437d250db4b784c99797ee80e534525cc813b
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2243944
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Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
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 2020-12-15 14:10:29 -06:00
rmylavarapu
4ea2594876 gpu: nvgpu: volt: Remove unused code in volt_dev 
- Removed unused operation type checks
- Removed unused operation type macros

NVGPU-4372

Change-Id: Ic767ce7241d7940d0cd89922a8699b7db15393ff
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2243088
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 2020-12-15 14:10:29 -06:00
rmylavarapu
c83c730c30 gpu: nvgpu: volt: Remove usused code in volt_rail 
- Removed conditional checks for split rails
- Removed macro of split rail

Change-Id: Id14eeabdbbfb4e7adc516a5631eedee7a92427da
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2243071
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Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
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 2020-12-15 14:10:29 -06:00
rmylavarapu
4c1618cc52 gpu: nvgpu: volt: Remove unused struct in pmuif/volt.h 
- Removed VF inject structures
- Removed volt msg stuctures
- Removed volt cmd structures

NVGPU-4372

Change-Id: Idd2d59e7ca1adc2edb80b3d5ebdd87f36a956a4c
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2243054
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 2020-12-15 14:10:29 -06:00
rmylavarapu
7b97d3f949 gpu: nvgpu: volt: Remove unused code in volt_pmu.c 
-Removed volt cmdhandler
-Removed volt set/get structures
-Removed volt set/get Macros

NVGPU-4372

Change-Id: I0de7698fd1d86e5ca6a8399481b790738b9cbf4c
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2243026
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Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Divya Singhatwaria
15c9355c69 gpu: nvgpu: Add more test scenarios for ACR unit 
Add more test scenarios for nvgpu_acr_bootstrap_hs_acr()
and nvgpu_acr_construct_execute() to cover more
branches and fail scenarios

JIRA NVGPU-4319

Change-Id: Ifae3fdce87c4a42d0fbdb4dff25dfb10537f31d0
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2238098
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 2020-12-15 14:10:29 -06:00
vinodg
df68da0e66 gpu: nvgpu: unit: add tests for common.gr.setup 
Add tests to cover common.gr.setup subunit. This includes
g->ops.gr.setup.alloc_obj_ctx
g->ops.gr.setup.set_preemption_mode
g->ops.gr.setup.free_gr_ctx and
g->ops.gr.setup.free_subctx.

Update register space to include the registers used by
context creation.
Update SWUT files for doxygen.

Jira NVGPU-3968

Change-Id: I3ab539d18584231142a1945d621d015b7ca772de
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2244825
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Lakshmanan M
d6a20e31b3 gpu: nvgpu: tu10x: Add CE diversity gpu characteristic flag 
Tu104 has multiple async-LCE (3), GRCE (2) and PCE (4).
So it is possible to use a different LCE/PCE during redundant
execution. This will allow us to claim very high coverage for
permanent fault.

JIRA NVGPU-4370

Change-Id: Ib39013d8d4f377eb20820db100af57c57592c39d
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2243984
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Reviewed-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-by: Shashank Singh <shashsingh@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Nicolas Benech
eb4349548d gpu: nvgpu: unit: stage vm.init_error_paths subcase 
One subcases in the init_error_paths test case is causing
intermittent failures (free of non malloc'ed memory) due to the
nature of error injection. This patch removes the subcase until
a better way to test the condition is devised.

JIRA NVGPU-4328

Change-Id: Ic463bb1466b93016b9166e6297745d21d4fb0942
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2245485
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
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GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Petlozu Pravareshwar
1b9e66a284 nvgpu: gpu: Add mssnvlink0 reset control config 
On safety build, MSSNVLINK HV is supporting dynamic update of
Protection table. Hence Guest OS Nvlink driver can't control
mssnvlink0 reset on safety build.

For this purpose, CONFIG_MSSNVLINK0_RST_CONTROL flag is defined and
enabled for the standard build, while it will be disabled for
the safety builds.

Bug 200545652

Change-Id: I4c03250475cc63e5f9ded1bf3ef3c462db46cd44
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2242454
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Tejal Kudav
6dbf8e3d58 gpu: nvgpu: Remove unused code from common.top 
Remove following error paths as they would never get called:
1. In gm20b_device_info_parse_enum:
   - This is a private HAL and is only called by get_device_info HAL.
   - It gets called only for table entry with entry type = enum.
   - So we remove the check if(entry_type != enum)...

2. In gp10b_device_info_parse_data:
   - This is a private HAL and is only called by get_device_info HAL.
   - It gets called only for table entry with entry type = data.
   - So we remove the check if(entry_type != data)...

3. In gp10b_get_device_info
   - entry corresponds to 2 bit extracted from the table_entry.
   - So, entry can have only 4 possible values.
   - We would never reach the else case; hence remove it.

JIRA NVGPU-2204

Change-Id: I6243f4f9ffd78829f7057aad943ecc6980f82c86
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2243264
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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Reviewed-by: Automatic_Commit_Validation_User
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 2020-12-15 14:10:29 -06:00
Thomas Fleury
26746fb478 gpu: nvgpu: unit: fix path for SWUTS 
Fix paths for channel and runlist HAL SWUTS.

Jira NVGPU-3793

Change-Id: I3003da761fba083efdf0204dd5b18a0e2ee894fe
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2243562
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 2020-12-15 14:10:29 -06:00
Peter Daifuku
c58029ad24 gpu: nvgpu: fix race for nvgpu_thread_stop 
The pmu init thread typically returns immediately
without calling nvgpu_thread_should_stop().

pmu_pg_kill_task() checks if the thread is running, and
if it is, calls nvgpu_thread_stop().

However, there's a race condition where the init thread could
have exited between the time that kill_task() checked the
running flag and the time we actually stop the thread, leading
to a kernel crash.

Fix this by making the running flag in the nvgpu_thread struct
atomic. Both the thread proxy function and the thread_stop()
function will set the flag to false.

In the case of nvgpu_thread_proxy(), if the flag is already false,
then nvgpu_thread_stop() has already reset it, at which point we
just wait for nvgpu_thread_should_stop() to return true.

In the case of nvgpu_thread_stop(), if the flag is already false,
then the thread proxy function has already exited, and there is
nothing more to do.

Bug 2591298

Change-Id: I9ba6b63c30a5c3e1df11e790094836b44373122b
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2230358
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Scott Long
44a28012de gpu: nvgpu: fix MISRA 5.9 violation 
MISRA Advisory Rule 5.9 states that identifiers that define
objects or functions with internal linkage should be unique.

While it is permissible for an inline function with internal
linkage to be defined in a single header file the same is not
true for data objects.

This change moves the aperture_name[] string table to within
the nvgpu_aperture_str() function to comply with this advisory
rule.

Because the size of the table is relatively small (< 40 bytes
for the strings) the storage class is changed to automatic.

Jira NVGPU-3178

Change-Id: I9efedc083511a8ecb0ca7e5fbf577030cddfd76b
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2241807
Reviewed-by: Automatic_Commit_Validation_User
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Reviewed-by: Alex Waterman <alexw@nvidia.com>
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 2020-12-15 14:10:29 -06:00
rmylavarapu
0984189be4 gpu: nvgpu: Remove clk_freq_domain unit 
Removed clk_freq_domain unit as it is no longer
support by auto profile.

NVGPU-4392

Change-Id: Iebad4bec8a98447e58fea5735124d25a8664ce5d
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2243990
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
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 2020-12-15 14:10:29 -06:00
Tejal Kudav
59282bdee8 gpu: nvgpu: unit: common.top tests 
Add unit tests for all the HALs exposed by common.top unit.

JIRA NVGPU-2204

Change-Id: Id4866e181ba495c6e7d827ae534b76070677aa0e
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2243164
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 2020-12-15 14:10:29 -06:00
vinodg
4030549a42 gpu: nvgpu: unit: add common gr test functions for sub-units 
Provide test_gr_init_setup_ready function which cover the
test_gr_init_setup, test_gr_init_prepare and test_gr_init_support
calls needed for each gr sub-units.
test_gr_setup_cleanup function which cover the
test_gr_remove_support and test_gr_remove_setup calls.

Update gr.intr and gr.falcon subunit tests to use these functions.

Jira NVGPU-3968

Change-Id: I90c890dc9802b59f60d8f2db436491acba313398
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2242861
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Thomas Fleury
8ca378e1c0 gpu: nvgpu: add unit tests for pbdma_status 
Add unit tests for:
- nvgpu_pbdma_status_is_chsw_switch
- nvgpu_pbdma_status_is_chsw_load
- nvgpu_pbdma_status_is_chsw_save
- nvgpu_pbdma_status_is_chsw_valid
- nvgpu_pbdma_status_is_id_type_tsg
- nvgpu_pbdma_status_is_next_id_type_tsg

Jira NVGPU-3490

Change-Id: Iaf032b7a39483d1378945b269f16be8349dd6d7b
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2241818
GVS: Gerrit_Virtual_Submit
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Thomas Fleury
162b93f435 gpu: nvgpu: add unit tests for common.pbdma 
Add unit tests for:
- nvgpu_pbdma_setup_sw
- nvgpu_pbdma_cleanup_sw
- nvgpu_pbdma_find_for_runlist
- nvgpu_pbdma_init_intr_descs

Jira NVGPU-3490

Change-Id: Ia92a1c2213a03cb0e62ea59f8b29bf3fc606c33d
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2241799
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Thomas Fleury
36da08388b gpu: nvgpu: fix check on channel_fatal_0_intr_descs 
nvgpu_pbdma_init_intr_descs was checking device_fatal_0_intr_descs
instead of channel_fatal_0_intr_descs to assign
f->intr.pbdma.channel_fatal_0.

Jira NVGPU-3490

Change-Id: Ied8fb9db0bd43e7cb76b6b9f41b0ed5639181d72
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2241798
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Thomas Fleury
d7e629de4f gpu: nvgpu: unit: add tests for gk20a runlist HAL 
Added unit tests for the following HALs:
- gk20a_runlist_length_max
- gk20a_runlist_hw_submit
- gk20a_runlist_wait_pending
- gk20a_runlist_write_state

Jira NVGPU-3793

Change-Id: I710b702662693771d11341971137e6f8fa47cf9b
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2239478
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Thomas Fleury
0130ebd349 gpu: nvgpu: unit: add tests for gv11b runlist HAL 
Add unit tests for the following HALs:
- gv11b_runlist_entry_size
- gv11b_runlist_get_tsg_entry
- gv11b_runlist_get_ch_entry

Jira NVGPU-3793

Change-Id: If4c574efacc316e6c410b3f2872fd41b1470011b
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2239477
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Vedashree Vidwans
a717ba1a50 gpu: nvgpu: fix MISRA 14.3 and 15.7 violations 
Rule 14.3 doesn't allow controlling expressions to be invariant;
ensuring that all conditions are possible.
Rule 15.7 needs if-elseif constructs to be terminated with else
statement.
This patch resolves 14.3 and 15.7 violations in mmu_fault_gv11b_fusa.c.

Jira NVGPU-4332

Change-Id: I145004382c83517c54e9115675c5171f83691dc7
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2235236
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
ajesh
d7dcc2b77e gpu: nvgpu: add ut for posix kmem 
Add unit tests for posix kmem unit.

Jira NVGPU-2658

Change-Id: If2b8a3eb44d0f440d10ab0aade36ba334d0de329
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2237255
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Abdul Salam
2879c4f21e gpu: nvgpu: Freq Mon/Clock Mon Common Implementation 
FMON/Clock Mon detects for fault in a particular clock domain.
For this we need to poll a specified master register to know if there
is any fault. If this is set we scan all the available clock domains
to see which domain is faulted and the type of fault.
This CL will have all required common functions to monitor
different clock domains registers.

Bug 2182063
NVGPU-3846

Change-Id: I6a2bdb65335eaeef995eb163d480ee722c230311
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2170887
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
rmylavarapu
86ab9c2ebc gpu: nvgpu: Remove support of unused therm devices 
Current auto profile support only GPU therm device
only. Support for other device is not needed and removed.

NVGPU-4360

Change-Id: I48ce80674b6c60903b60bc4ee571938ec5e332df
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2241539
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
rmylavarapu
d23ad1d829 gpu: nvgpu: Remove unused therm event 
Currently for every +/-5 degC change in
temperature, PMU internally evaluate VF curve on
temp change and will send VFE callback to NVGPU for
initiating change seq to program voltage and frequency.
This is the only callback we receive on temp change
which we handle in perf unit, and we don't have any
other temp events raised by PMU.
So, deleting the therm event handler.

NVGPU-4360

Change-Id: I3c7279dcf691135c178b6a05766403a935bc7e73
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2241488
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
rmylavarapu
d363348a88 gpu: nvgpu: Remove unsused code in therm unit 
- Remove unused functions
- Removed rpc command handlers functions
- Removed therm cmd structs
- Removed unused macros

NVGPU-4360

Change-Id: I7e74d024bbad31634e67005cd6f3ae94c040f3f0
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2241394
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
ajesh
1241cb3014 gpu: nvgpu: add UT for os_sched 
Add unit tests for posix os_sched unit.

Jira NVGPU-2689

Change-Id: Ideaf6ad8a0b2419efbe4e8960afa46a30f9f0e7a
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2215620
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Vinod G
b89827223e gpu: nvgpu: unit: doxygen for gr.config unit 
Add doxygen for the common.gr.config unit test.

Jira NVGPU-4335

Change-Id: Idde57c84d0e861ba0c3bc345f6a8d08b96dcc9af
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2240389
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Thomas Fleury
295125580e gpu: nvgpu: unit: add tests for gv11b channel HAL 
Added tests for the following HALs:
- test_gv11b_channel_unbind
- test_gv11b_channel_count
- test_gv11b_channel_read_state
- test_gv11b_channel_reset_faulted
- test_gv11b_channel_debug_dump

Jira NVGPU-3789

Change-Id: I3cd9160bc7640ec385524ecb927e8a869b8dbdab
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2238576
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Thomas Fleury
70aa2dc65b gpu: nvgpu: unit: add tests for gm20b channel HAL 
Added unit tests for the following HALs:
- gm20b_channel_bind

Jira NVGPU-3789

Change-Id: If25e20e99b17e3c0e3d8280326535dd6fa1e61a4
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2238575
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Thomas Fleury
a6b05d4d84 gpu: nvgpu: unit: add tests for gk20a channel HAL 
Added unit tests for the following HALs:
- gk20a_channel_enable
- gk20a_channel_disable
- gk20a_channel_read_state

Jira NVGPU-3789

Change-Id: I81c08db81bddde5f4b0ccdf61af59f3400746a5b
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2238574
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
rmylavarapu
68b9455f51 gpu: nvgpu: Remove unused code in perf unit 
-Removed GV100 functions
-Removed Header and entry table macros which are not
used
-Removed unused structs in perf.h file

NVGPU-4341

Change-Id: Ia08f117af76edb08d645b60fdf36bf101bf865a1
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2238870
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Thomas Fleury
eab49bf020 gpu: nvgpu: move syncpt documentation to doxygen 
Sync/syncpt documentation was not in doxygen format.
Added doxygen syntax for proper parsing.

Jira NVGPU-4291

Change-Id: I6ad6eae1b02d88d97e241798838fa75da727ade2
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2236898
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
rmylavarapu
c72ed3782e gpu: nvgpu: Remove unused functions in clk unit 
Removed VF inject related functions which are no
longer used in turing. These functions are used
to set particular voltage and frequency, from
pstate3.5 we are using change sequencer for the same.

NVGPU-4330

Change-Id: If0c4fdeec30139819e2dbba893db5db08464633d
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2234106
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Philip Elcan
160e7e0619 gpu: nvgpu: unit: ptimer: update required_tests.json 
Update required_tests.json to require ptimer tests.

JIRA NVGPU-2238

Change-Id: I5605eda07fcd197830be43ac1819fcd6fa2fa4b4
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2238503
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Vinod G
bf70e21535 gpu: nvgpu: unit: Add Doxygen for gr units 
Add doxygen for the gr init and intr unit
tests as part of SWUTS support.

Jira NVGPU-4335

Change-Id: Ib604a2841b44d257d3033fc3074ff266db016a5a
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2238680
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Debarshi Dutta
71bb9aae91 gpu: nvgpu: remove call to tegra_get_chip_id() 
tegra_get_chip_id is going to be deprecated soon and this patch removes
calls to it. Chip-ID is already read via DT and call to
tegra_get_chip_id() can be avoided by adding metadata to store the
Chip-ID information in struct gk20a_platform.

Bug 200524194
Bug 200551105

Change-Id: I5f9f5abf679cf9afe98840e20144d76eb0238426
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2236311
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Sagar Kamble
48d713f569 gpu: nvgpu: use MIT license for nvgpu posix code 
nvgpu posix code should have MIT license.

Bug 2755169

Change-Id: Ie4e66c788a13195a86536f09ebb32d3c759629e5
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2237106
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Sagar Kamble
aa893ff77a gpu: nvgpu: use GPL license for linux code 
Linux specific code should have GPL license.

Bug 2755169

Change-Id: I8cbf96f4be2e77fde01ef976a79ec6c578185c23
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2237105
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Philip Elcan
8dd18e6f5e gpu: nvgpu: init: reduce CCM for nvgpu_finalize_poweron 
Change how nvgpu_finalize_poweron() detects and reports units that do
not need initializing. This reduces the Code Complexity of this
function.

This update reduces the TCC metric from 12 to 9.

JIRA NVGPU-4327

Change-Id: I95a5d60bc90fe09358ed47a54eca700bd51d688f
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2235339
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Philip Elcan
06a8fd2ecb gpu: nvgpu: init: reduce CCM for nvgpu_prepare_poweroff 
Change how nvgpu_prepare_poweroff() handles multiple errors from the
unit poweroff functions. Previously, the last error was returned. It
doesn't really matter much which error is returned, just return an
error.

This update reduces the TCC metric from 11 to 8.

JIRA NVGPU-4327

Change-Id: Ic84f7e25eef2657c3d11881f221c26c9b09bed27
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2235338
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00