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79 Commits

Author SHA1 Message Date
Alex Waterman
5f0fdf085c nvgpu: unit: Add new mock register framework 
Many tests used various incarnations of the mock register framework.
This was based on a dump of gv11b registers. Tests that greatly
benefitted from having generally sane register values all rely
heavily on this framework.

However, every test essentially did their own thing. This was not
efficient and has caused a some issues in cleaning up the device and
host code.

Therefore introduce a much leaner and simplified register framework.
All unit tests now automatically get a good subset of the gv11b
registers auto-populated. As part of this also populate the HAL with
a nvgpu_detect_chip() call. Many tests can now _probably_ have all
their HAL init (except dummy HAL stuff) deleted. But this does
require a few fixups here and there to set HALs to NULL where tests
expect HALs to be NULL by default.

Where necessary HALs are cleared with a memset to prevent unwanted
code from executing.

Overall, this imposes a far smaller burden on tests to initialize
their environments.

Something to consider for the future, though, is how to handle
supporting multiple chips in the unit test world.

JIRA NVGPU-5422

Change-Id: Icf1a63f728e9c5671ee0fdb726c235ffbd2843e2
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2335334
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 2020-12-15 14:13:28 -06:00
Thomas Fleury
76295a5aeb gpu: nvgpu: redundant dependency on driver 
Makefile.units.common.tmk already specifies dependency
on nvgpu driver interface.

Remove redundant dependency in units makefiles.

Jira NVGPU-5217

Change-Id: I94cbe707c25f41f0e61915c243fd55fd4bda9ccf
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2322205
(cherry picked from commit d9bdd8f589c121802c74da53945baa677578f71c)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2325907
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 2020-12-15 14:13:28 -06:00
Terje Bergstrom
7a71aba234 gpu: nvgpu: unit: Fix header guards 
Fix cases where header guard #ifdef and #define had a mismatch.

Change-Id: I74aec2736c467f79e9786880d3e3847ee86a2466
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2318388
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Reviewed-by: Alex Waterman <alexw@nvidia.com>
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 2020-12-15 14:13:28 -06:00
sagar
8c04d2f000 gpu: nvgpu: skip classes in obj_alloc 
Currently, we are performing obj ctx alloction for bellow classes

 1. VOLTA_COMPUTE_A
 2. VOLTA_DMA_COPY_A
 3. VOLTA_CHANNEL_GPFIFO_A

In safety, we use Async CE but not GRCE.
So allocating obj context only for COMPUTE_A and return success(0) for
all other valid classes, after setting class in the channel struct.

Jira NVGPU-4378

Change-Id: Ie99872e062cc66f9ddf699397a13df85c3d8d59e
Signed-off-by: sagar <skadamati@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2287486
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 2020-12-15 14:13:28 -06:00
vinodg
740f26cee5 gpu: nvgpu: fix branch coverage for gr unit 
Fix branch coverage to the change added in
driver code for checking su_coalesce and lg_coalesce
hal pointers as valid.

Jira NVGPU-4868

Change-Id: I88b34226051697c941811c40b3a0f7928f3b1e2a
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2291208
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 2020-12-15 14:13:28 -06:00
vinodg
7852d452ee gpu: nvgpu: Add test to cover FECS watchdog timeout 
Add unit test to cover the FECS watch timeout method
in gm20b.
Correct the file and function name to gm20b from gk20a.

Bug 200586923

Change-Id: I447e26c7d898f3967ad2de7a7e4a7457264941b5
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2290643
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 2020-12-15 14:13:28 -06:00
Seema Khowala
c8050eabec gpu: nvgpu: gr: fix return value of *handle_sw_method* 
Currently chip specific functions for handle_sw_method
does not return -EINVAL if class does not match as
expected. Fix it by setting default return value to
-EINVAL and updating return value to 0 for successful
class/method matches.

JIRA NVGPU-4909

Change-Id: Ifb3aa35215171ddbc64d6f1d23f8944c9fe44b2d
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2285848
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 2020-12-15 14:13:28 -06:00
vinodg
719186cca0 gpu: nvgpu: fix error in gr.falcon header documentation 
Remove # from function name in target section.
Fix missing comma to separate function names.
Add missing gops_gr_falcon hal function to target section.

Jira NVGPU-4888

Change-Id: I8ef8a035767c06c41c1daf60c295249c5a50c7fc
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2283719
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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 2020-12-15 14:10:29 -06:00
vinodg
7f73c5fc20 gpu: nvgpu: add missing gops_gr hal to target section. 
Add missing gops_gr_setup, gops_gr_init, obj_ctx, global_ctx,
fs_state, gops_gr_falcon hal function  to the the target section.
Remove # from the target function name to keep consistency.

Jira NVGPU-4888

Change-Id: Ife9f2435d0e52cec490cfdf1809cc86809832cf2
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280202
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
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 2020-12-15 14:10:29 -06:00
vinodg
2ea4dfb5c7 gpu: nvgpu: add gr.falcon hal function to target section 
Add gr.falcon hal functions being used from gr.falcon
unit test to the target section.

Jira NVGPU-4888

Change-Id: Id90ac8babfae95805421e4b9aded6a055e10e85b
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280795
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 2020-12-15 14:10:29 -06:00
vinodg
0003c7d13e gpu: nvgpu: add gr.config hal functions to target section 
Add gr.config hal functions to target section
Remove # from function names in target section

Jira NVGPU-4888

Change-Id: Ia8d8e91e731ad477ec330d79af69f60c0990fa70
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280794
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
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 2020-12-15 14:10:29 -06:00
vinodg
d0a029eadf gpu: nvgpu: add missing gr.falcon hal header to SWUTS 
add nvgpu-gr-falcon-gk20a.h to the SWUTS sources.

Jira NVGPU-4888

Change-Id: I4b407a5321ea67b3edcec7df7f3c07eb1e81c395
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280793
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 2020-12-15 14:10:29 -06:00
vinodg
df7631efc8 gpu: nvgpu: correct the gr.config unit test for invalid pes 
Remove changing the gpc_count to 2. This could result in memory
access error for struct whose allocation happens during init call.
For igpu, no need to check for higher gpc_count.

Jira NVGPU-4531

Change-Id: I48ad60b083d91fd2f8a673fb8fabbe48e171912e
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280706
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Deepak Nibade
e4c9ab22f5 gpu: nvgpu: unit: mark boundary value tests for common.gr 
Add "Boundary value" to test type for below tests:
test_gr_setup_alloc_obj_ctx_error_injections
test_gr_setup_preemption_mode_errors

Also add a test to verify passing graphics class to alloc_obj_ctx
HAL fails.

Jira NVGPU-4843

Change-Id: I0c256c2fcff98e81bfdcf80c6e0edb66d3831c31
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279973
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Deepak Nibade
6acd7924c5 gpu: nvgpu: unit: add UT for gops.gr.init.commit_global_bundle_cb 
Add a code coverage test for HAL function exposed by common.gr.init
subunit :
g->ops.gr.init.commit_global_bundle_cb

Jira NVGPU-4778

Change-Id: Ibd8bd8513c63e6d5a6734a4ccc6744861de9e5e2
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279900
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 2020-12-15 14:10:29 -06:00
Deepak Nibade
a0dede3a85 gpu: nvgpu: unit: add negative coverage with tpc_count set to 0 
Add negative testing coverage for below functions by setting tpc_count
to 0.

g->ops.gr.init.get_attrib_cb_size
g->ops.gr.init.get_alpha_cb_size

Jira NVGPU-4778

Change-Id: I105888b20bee2a991d35dc17f17854d22085a67a
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279899
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 2020-12-15 14:10:29 -06:00
Deepak Nibade
4e2c1c3ca4 gpu: nvgpu: unit: initialize variables in gr_init_error_injections 
Some boolean variables in gr_init_error_injections are not initialized
and assigned random value. That causes code coverage miss with
Vectorcast. Initialize all the boolean flags appropriately.

Also initialize falcon and intr local variables in the beginning of
function to avoid compile time warnings

Jira NVGPU-4778

Change-Id: I2d5a965a8715b590b29e2c153e825cb4ddb5ece0
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280503
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Reviewed-by: Philip Elcan <pelcan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Deepak Nibade
755f0c7e96 gpu: nvgpu: unit: add UT to trigger patch write with NULL ctx pointer 
Add new unit test to trigger context patch write with NULL context
pointer

Jira NVGPU-4778

Change-Id: Iea0366e9b12dbf3abbd8c9b4a1ebd29be5961516
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280502
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Reviewed-by: Philip Elcan <pelcan@nvidia.com>
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 2020-12-15 14:10:29 -06:00
vinodg
1843a10f39 gpu: nvgpu: add missing gops_gr_init hal to target section 
Add few missing gr.init hal functions being used from
the gr.init unit test to the target section.

Jira NVGPU-4888

Change-Id: I5f5604d3530f805cc605c33448371de176f9927a
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279668
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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 2020-12-15 14:10:29 -06:00
vinodg
89f87c12fa gpu: nvgpu: add missing gops_gr_intr hal in targets section 
Add the gops_gr_intr hal functions used in gr.intr unit test
in targets section.

Jira NVGPU-4888

Change-Id: I347408c46b71dc0c0e7cee3d21f2fd849aef4628
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279667
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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 2020-12-15 14:10:29 -06:00
vinodg
08e52125e3 gpu: nvgpu: update the gr subunit test document 
Update the gr.falcon and gr.config unit test document to
include the subunit function being called from the test.

Jira NVGPU-4359

Change-Id: Id1469277273e78c16353767a29d3ea06bcd5c8ef
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279230
GVS: Gerrit_Virtual_Submit
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 2020-12-15 14:10:29 -06:00
vinodg
d1e6b80a6f gpu: nvgpu: update common.gr intr unit test document. 
Update common.gr intr unit test document for missing api
functions being called from interrupt unit tests.

Jira NVGPU-4359

Change-Id: Ia5ea7f59c91c6d11616458708631d525dd9e91cb
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2278627
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 2020-12-15 14:10:29 -06:00
vinodg
c0eee06799 gpu: nvgpu: test for negative code coverage in gr init 
Add test_gr_init_error_injections function which help to
cover the negative tests like allocation failure and
condition failures.

Jira NVGPU-4676

Change-Id: Ieec2e234947676e17a1a2f772c00eb116cdcc536
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2275220
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 2020-12-15 14:10:29 -06:00
Deepak Nibade
04285893f7 gpu: nvgpu: unit: add test case for no SM detected 
Set a stub that returns 0 instead of number of SM detected.
Ensure nvgpu_gr_fs_state_init() triggers a BUG and returns error.

Jira NVGPU-4778

Change-Id: I53ce36152a7f4bfe061ed9b5a532aa3b6995825a
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2277157
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Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Deepak Nibade
12bc49a078 gpu: nvgpu: unit: update dummy pes_tpc_mask for better coverage 
Update gr_test_config_get_pes_tpc_mask() to return 0x2F when called
for third time.

There are 2 PES in a GPC. So essentially we want to cover below two
cases
1. pes_tpc_count[pes0][gpc0] > pes_tpc_count[pes1][gpc0]
2. pes_tpc_count[pes0][gpc0] < pes_tpc_count[pes1][gpc0]

Also, run gr_test_diff_gpc_skip_mask() before gr_test_diff_pes_tpc_mask()
so that gpc_skip_mask calculation can generate above two cases first.

Jira NVGPU-4778

Change-Id: I1c34bbc36b0e126d34529725b6c45b59b7e66b67
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2277156
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 2020-12-15 14:10:29 -06:00
Lakshmanan M
1c991a58af gpu: nvgpu: Add SM diversity support 
To achieve permanent fault coverage, the CTAs launched by
each kernel in the mission and redundant contexts must execute on
different hardware resources. This feature proposes modifications
in the software to modify the virtual SM id to TPC mapping across
the mission and redundant contexts. The virtual SM identifier to TPC
mapping is done by nvgpu when setting up the patch context.

The recommendation for the redundant setting is to offset the
assignment by one TPC, and not by one GPC. This will ensure that both
GPC and TPC diversity. The SM and Quadrant diversity will happen
naturally. For kernels with few CTAs, the diversity is guaranteed
to be 100%. In case of completely random CTA allocation,
e.g. large number of CTAs in the waiting queue, the diversity is
1 - 1/#SM, or 87.5% for GV11B, 97.9% for TU104.

Added NvGpu CFLAGS to enable/disable the SM diversity support
"CONFIG_NVGPU_SM_DIVERSITY".

This support is only enabled on gv11b and tu104 QNX non safety build.

JIRA NVGPU-4685

Change-Id: I8e3eaa72d8cf7aff97f61e4c2abd10b2afe0fe8b
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2268026
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Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Shashank Singh <shashsingh@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
vinodg
97ce51215b gpu: nvgpu: remove NVC0C0_SET_SHADER_EXCEPTIONS from gr intr test 
Remove unused NVC0C0_SET_SHADER_EXCEPTIONS from gr intr unit test.
Update the mock io register with valid class number value.

Jira NVGPU-4454

Change-Id: I1b6772c7c8d2c75f05d57cb5eb2a630aa7b6b6e0
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2275286
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Deepak Nibade
3c6d4ede34 gpu: nvgpu: unit: update test type for test_gr_setup_set_preemption_mode 
Test case test_gr_setup_set_preemption_mode emulates user mode sequence
to set the preemption mode once after creating the context. This test is
used to show that there is no race or deadlock involved while setting
the preemption mode from user space.

This test is used to prove one of the action coming from FMEA of
common.gr unit. Hence update the test type to include "Safety".

Jira NVGPU-4125

Change-Id: I3153772dfe790e6e4dba99dd94fbfd40c9d6f129
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2274968
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Deepak Nibade
fa90056392 gpu: nvgpu: unit: add unit test for gr idle hal 
Add unit test coverage for HAL function g->ops.gr.init.wait_idle
exposed by common.gr.init subunit.

Jira NVGPU-4458

Change-Id: I66b24b335961dfaf9315b9fcd3a3df421b80a30a
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2274184
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
dnibade
27122d10d7 gpu: nvgpu: unit: add unit tests for fe idle and pwr_mode HALs 
Add unit test coverage for below HALs in common.gr.init subunit:

- g->ops.gr.init.wait_fe_idle
- g->ops.gr.init.fe_pwr_mode_force_on

Jira NVGPU-4458

Change-Id: I924f9e49abcb5846f24c620bba7fd1c704c36932
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2270652
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
dnibade
f2cc27f3d1 gpu: nvgpu: unit: add more coverage to gr.init config unit test 
Add error checking coverage for below gr.init HAL functions in
unit test test_gr_init_hal_config_error_injection()

- g->ops.gr.init.pd_skip_table_gpc
- g->ops.gr.init.load_sw_veid_bundle
- g->ops.gr.init.load_sw_bundle_init
- g->ops.gr.init.load_method_init

Jira NVGPU-4458

Change-Id: I9f28fbbdc4f0160d852ebc2cbb56255ac6a74289
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2270651
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Tejal Kudav <tkudav@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
dnibade
55ea8a089d gpu: nvgpu: unit: add coverage tests for gr.init config APIs 
Add code coverage tests for functions in gr.init subunit that need
tweaks to GR engine configuration for code/branch coverage.

Jira NVGPU-4458

Change-Id: Ic3d1c371768e74bde725bb44361280820ef1a774
Signed-off-by: dnibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2265457
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
dnibade
ab76dc1ad5 gpu: nvgpu: unit: add coverage tests for gops.gr.init.ecc_scrub_reg 
Add new unit test to cover gops.gr.init.ecc_scrub_reg HAL function

gops.gr.init.ecc_scrub_reg HAL can generate TIMEOUT errors which are
not returned to caller currently. Update this HAL to return int value
for error propagation.

Jira NVGPU-4458

Change-Id: I98f4d5af2ef17cc4301951fec4d660638c8ef72c
Signed-off-by: dnibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2265456
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
dnibade
5f030d6c52 gpu: nvgpu: unit: add coverage tests for wait_empty and global_pagepool hals 
Add new subtests to cover gops.gr.init.wait_empty() and
gops.gr.init.commit_global_pagepool() hals of common.gr.init subunit

Jira NVGPU-4458

Change-Id: Iffc2e95456518234ba6466fe1a9767c0eb53f2e6
Signed-off-by: dnibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2265455
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Nicolas Benech
b682091b13 gpu: nvgpu: SWUTS: clean up test types 
Apply the following changes to test types:
* "Init" --> "Other (setup)"
* "Coverage" --> Removed since it's implied for all tests
* "Feature based" --> "Feature"
* "Boundary Value analysis" and "Boundary values based" --> "Boundary values"
* "Error guessing based" --> "Error guessing"

JIRA NVGPU-3510

Change-Id: I3a9c0c59e6ad806f3479caa5e9a62f4d89f76923
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2265670
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
vinodg
d10a39e143 gpu: nvgpu: add test for branch coverage in gr.falcon hal 
Use nvgpu_readl_fault_injection() with gr.falcon hal code,
where the register values are hardcoded in the function.

Fault injection added to gr_fecs_arb_ctx_cmd_r() register
read in gm20b_gr_falcon_wait_for_fecs_arb_idle function.

Jira NVGPU-4453

Change-Id: I2c8d8cf9e059758bc0ba2a16f93259d347a14d84
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2265046
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2020-12-15 14:10:29 -06:00
vinodg
3400d1b6be gpu: nvgpu: branch coverage for gr.falcon hal 
Update gr.falcon hal test for branch coverage.
Generate expected bug by passing 64bit value for falcon.bind_instblk.

Jira NVGPU-4453

Change-Id: I735f96f21e54fce199a47c37043acc81006ee806
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2264321
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
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 2020-12-15 14:10:29 -06:00
Antony Clince Alex
81720e81fa nvgpu: userspace: update tests to use mock-iospace library 
Remove mocked IO space definitions from units like fifo and gr, instead
get these from mock-iospace library.

Jira: NVGPU-4520

Change-Id: I397e0bccdb4f744d9dd7fb57d2a2a504abcc618b
Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2261826
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Deepak Nibade
fdb8046812 gpu: nvgpu: unit: add negative tests for common.gr.obj_ctx 
Add negative tests that inject memory allocation failures and
HAL function call errors to verify error handling path in
common.gr.obj_ctx unit.

Update common.gr.setup test to cover invalid class input while
setting preemption mode.

Jira NVGPU-4457

Change-Id: I74d1ba63ba8aace6087b51fd50e2c136822d3a00
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2260939
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Sagar Kamble
a73ca0b70e gpu: nvgpu: split GR ECC initialization 
Split GR ECC initialization into GPC/TPC and FECS ECC init as FECS ECC
errors during acr_construct_execute need to be reported and handled
hence FECS ECC counters are required to be initialized before
acr_construct_execute.

GPC/TPC ECC counters are dependent on the GR config that will be
initialized only after acr_construct_execute.

nvgpu_gr_intr_init_support is moved to nvgpu_gr_prepare_sw.

FECS ECC interrupt is enabled by default hence interrupt is not
enabled through gr_fecs_host_int_enable_r in nvgpu_gr_prepare_sw.

JIRA NVGPU-4439

Change-Id: Ifc9912f0578015a6ba1e9d38765c42633632b15f
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2261987
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2020-12-15 14:10:29 -06:00
vinodg
c25ccbb130 gpu: nvgpu: Add negative test for gr.config unit 
Add test to coverage the error injections in gr.config unit.
required_tests is updated with new test for gr.config and
missing test for gr.setup unit.

Jira NVGPU-4531

Change-Id: Idf089af5fec1e653793a620b4e7f7bd5d96210ba
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2262230
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
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 2020-12-15 14:10:29 -06:00
vinodg
0ede89f859 gpu: nvgpu: Tests for gr.intr unit branch coverage. 
More test added for gr.intr units common and hal codes.
Update doxygen for gr.unit test.

Jira NVGPU-4454

Change-Id: Ifcebb437bff22fb6b6522763d2bb8e5c58bdfdd7
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2260887
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Thomas Fleury
1fc9a427e0 gpu: nvgpu: tear down TSG on unbind HAL failure 
Currently nvgpu_tsg_unbind ignores return code from
g->ops.tsg.unbind_channel. For consistency, tear down
TSG in case an error occurs in the unbind HAL.

Also make sure to restore valid ops for fifo.preempt_tsg
in test_gr_setup_free_obj_ctx, to avoid unbind failure.

Jira NVGPU-4387

Change-Id: I27a9c0daa365d05684149fc4bb17874d60ae1fde
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2248159
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Deepak Nibade
80f408632a gpu: nvgpu: unit: add negative tests for common.gr.ctx 
Add negative tests that inject memory allocation failures and verify
error handling path in common.gr.ctx unit.

Update common.gr.global_ctx unit test to check if global context
buffers are ready after allocation call.

Jira NVGPU-4373

Change-Id: Ia373441819257890f9f10667e6e2e363081a6757
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2259074
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
vinodg
f0f6c77c01 gpu: nvgpu: Add tests for code coverage in gr.falcon 
Add more tests for branch and line coverages in gr.falcon
common and hal code.

Jira NVGPU-4453

Change-Id: Ie01bac73ad18773bba1c27bf4bcb2b2776970f29
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2258557
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Deepak Nibade
83ef099d19 gpu: nvgpu: unit: add negative tests for common.gr.global_ctx 
Add negative tests that inject memory allocation failures and verify
error handling path in common.gr.global_ctx unit.

Jira NVGPU-4373

Change-Id: Ic180f5eda0d25d5a713bdd513a617dc7c3a29d53
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2255770
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
vinodg
5a17ccb83f gpu: nvgpu: unit: test coverage for gr.ecc unit 
Add more test for line/branch coverages in gr.ecc
common and fusa code.
Max gpc_count is one for gv11b, add a checking under
CONFIG_NVGPU_NON_FUSA to avoid unwanted error handling.

Jira NVGPU-4460

Change-Id: Ifac53394ebe58698b81e1e108731ccc36d624ff3
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2256451
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
vinodg
055fe1c9fe gpu: nvgpu: unit: branch coverage for fecs interrupts 
Add more test to handle various branches of fecs ecc errors
based on interrupts.

Jira NVGPU-4453

Change-Id: Icb74b347eb86d8f683fc332698fc1b8d75fc059b
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2255621
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2020-12-15 14:10:29 -06:00
vinodg
9cd4357f4e gpu: nvgpu: gr.falcon unit test update 
Remove the code used to verify the nonsecure gpccs path
on initialize ctxsw ucode. For Safety secure path is enabled
by default.

Jira NVGPU-4453

Change-Id: I55aae29f56a9909d6c9966582a5d56f85b684a12
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2255491
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
vinodg
c56fd287e9 gpu: nvgpu: unit: fix group name for gr subunits 
Fix the SWUTS group name for gr-config and gr-intr units.

Jira NVGPU-4454

Change-Id: I3ebc46e252d90d585dacfaa18e4cbafca3cb46b5
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2255457
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2020-12-15 14:10:29 -06:00