Following changes are done to common.top code and UT:
1.Change return type for device_info_parse_enum to void as it can never
return non-zero value.
- This is a private HAL and is only called by get_device_info HAL.
- It gets called only for table entry with entry type = enum.
- So there is no error path left.
This helps remove unnecessary branches and get better branch coverage
2. Check if the data parsing function pointers are not NULL before
parsing the device tree. Return error if there are no functions
to interpret the device_info table registers. Add checks for same in
unit test test_get_device_info().
JIRA NVGPU-2204
Change-Id: I8833da7aa58b070d19b50ee17f64362f301bd792
Signed-off-by: tkudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2269603
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Device info data format has changed from gp10b to
gv11b, and MMU fault id was incorrectly decoded for GR engine.
Add gv11b_device_info_parse_data HAL to decode device info
data with correct field definitions.
Move gp10b device_info parse data to non-fusa, since
it is not used anymore in safety build.
Jira NVGPU-4511
Change-Id: I2b3f3b5fec977d63a9ad6cfd99c04f375cf997e8
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2262217
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MISRA Advisory Rule 4.4 states that sections of code should
not be commented out.
This change removes the following comment from gp10b_get_device_info():
} else { /* (entry == top_device_info_entry_engine_type_v()) */
JIRA NVGPU-3178
Change-Id: I0d5f0e9370a24b20c6e7487c92b956eb9e8a3048
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2256362
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* Updated types and added error checks
* Modified GR condition for ctxsw disable count
CERT-C error check was added to detect error on integer overflow
But below logic couldn't detect first overflow, so updated condition
INT_MAX < gr->ctxsw_disable_count --> it became true after overflow
So, we didn't detected in first overflow and lead to assert on enable
JIRA NVGPU-3400
Change-Id: I6b0265a464f8f19efa7b0761612c6e9ffb3bd2bd
Signed-off-by: Sagar Kadamati <skadamati@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2206282
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Remove following error paths as they would never get called:
1. In gm20b_device_info_parse_enum:
- This is a private HAL and is only called by get_device_info HAL.
- It gets called only for table entry with entry type = enum.
- So we remove the check if(entry_type != enum)...
2. In gp10b_device_info_parse_data:
- This is a private HAL and is only called by get_device_info HAL.
- It gets called only for table entry with entry type = data.
- So we remove the check if(entry_type != data)...
3. In gp10b_get_device_info
- entry corresponds to 2 bit extracted from the table_entry.
- So, entry can have only 4 possible values.
- We would never reach the else case; hence remove it.
JIRA NVGPU-2204
Change-Id: I6243f4f9ffd78829f7057aad943ecc6980f82c86
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2243264
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
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ifdef function prototypes with CONFIG_* defines. This fixes MISRA rule
8.6 violations which complain about undefined functions.
Also moved nvgpu_channel_get_from_file prototype to ioctl_channel.h &
nvgpu_probe to driver_common.h as those are linux specific. Define
nvgpu_init_soc_vars in posix/soc.c as it is implemented in QNX.
JIRA NVGPU-3873
Change-Id: I5d2b238e1b5d1318867cd2416ac5f03cc6ab7c6a
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2196794
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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This patch moves all the safe static and non-static functions as well
as its dependencies such as static declared structs into files with
_fusa.c extension. If the original file is left with no functions
remaining then the file is deleted.
Added changes in Makefile, Makefile.sources, nvgpu-hal-new.yaml for
compilation.
Jira NVGPU-3690
Change-Id: I81af67c308705faf8a681df63a6778e7de2076cf
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2146761
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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- Create nvlink_bios.c/.h files to separate out nvlink
related bios code.
- Create bios_sw_<chip speciific>.c/.h files to separate
out chips specific bios code.
- Create hal files for bios under hal/bios/ and move
hardware specific code there.
- Move hardware accessing hal files from common/top
to hal/top
JIRA NVGPU-2071
Change-Id: Ia466f1cd8947540b07b237e891312123df2c6b46
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2107371
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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