Commit Graph

4 Commits

Author SHA1 Message Date
Terje Bergstrom
b2b1c6d2be gpu: nvgpu: Add HWPM registers to regops whitelist
Bug 1763653

Change-Id: Ief7ed56c29dba5836fc8435359a7c615ce53bb84
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1150717
Reviewed-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
2016-12-27 15:26:16 +05:30
Terje Bergstrom
f2bb4f10ce gpu: nvgpu: gp10b: Update regops whitelist
Update regops whitelist with two new registers.

Bug 1734151

Change-Id: Id09bdfb1733620bb75d4558299c5e9c7f66bb00b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1029772
GVS: Gerrit_Virtual_Submit
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
2016-12-27 15:22:11 +05:30
Terje Bergstrom
03afa9b060 gpu: nvgpu: gp10b: Refresh regops whitelist
Context & global whitelists are same, so delete second copy. Update
the list.

Bug 200164983

Change-Id: I440ce04316120b8128baeabc002c55436cf41d5b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/931178
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sandarbh Jain <sanjain@nvidia.com>
Tested-by: Sandarbh Jain <sanjain@nvidia.com>
2016-12-27 15:22:10 +05:30
Terje Bergstrom
4b806879d5 gpu: nvgpu: gp10b: Add regops whitelists
Add regops whitelists for gp10b. The whitelist is generated, and is the
same for context switched and global registers.

Bug 1633363

Change-Id: I6d4d43d036d684c9f0d836a1a032f2c452604902
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/760935
2016-12-27 15:22:06 +05:30