Commit Graph

2292 Commits

Author SHA1 Message Date
David Nieto
a84f601fba gpu: nvgpu: remove duplicated busy in debugger
On the past, we had separate calls for platform and channel busy, but
those got removed. The result is that in the debugger code we have
essentially a double busy call int the powergating enable/disable.

This change removes it

bug 200277762
JIRA: EVLR-1023

Change-Id: Iba70b81700f27b847e1d0222fb69ed1a7a883342
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1323220
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
2017-03-23 21:05:34 -07:00
David Nieto
ab401c7068 gpu: nvgpu: fix running condition on fifo isr
The fifo interrupt path was reading the PBDMA interrupt status
after clearing interrupts and this could lead to a situation in
which the host may have advanced to another channel, leading to
the recovery code resetting the wrong channel.

Bug 200278729
JIRA: EVLR-1036

Change-Id: I392423d1eaa8d23acf88454bf113c015e649e13d
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1326461
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-23 20:34:50 -07:00
Seema Khowala
fb71b88275 gpu: nvgpu: *ERROR_MMU_ERR_FLT* not set for fake mmu faults
For fake faults, errror notifiers are expected to be set
before triggering fake mmu fault.

JIRA GPUT19X-7

Change-Id: I458af8d95c5960f20693b6923e1990fe3aa59857
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1323413
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-23 17:18:58 -07:00
Seema Khowala
a8efce77f5 gpu: nvgpu: null check for fault_ch
gk20a_gr_get_channel_from_ctx() could return NULL as a result
fault_ch could be null

JIRA GPUT19X-7

Change-Id: I2c8f099f63f30e576ecd221e3bec25070b026ced
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1323252
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-23 17:18:52 -07:00
Seema Khowala
e1e059454a gpu: nvgpu: add function to enable/disable runlists sched
-gk20a_fifo_set_runlist_state() can be used to enable/disable runlists  
 scheduler. This change would be needed for t19x fifo recovery too
-Also delete gk20a_fifo_disable_all_engine_activity function as it is not
 used anywhere.

JIRA GPUT19X-7

Change-Id: I6bb9a7574a473327f0e47060f32d52cd90551c6d
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1315180
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-23 17:18:34 -07:00
Seema Khowala
17df192180 gpu: nvgpu: gr faults: do not depend on fake mmu fault notifier
Currently NVGPU_CHANNEL_FIFO_ERROR_MMU_ERR_FLT is being set in
error notifier for non mmu fault too. For fake mmu faults i.e.
trigger mmu fault cases, make sure proper notifiers are set and
driver is not depending on sending mmu error fault notifier.
This change is needed for t19x fifo recovery too.

NVGPU_CHANNEL_GR_ERROR_SW_METHOD (12), NVGPU_CHANNEL_GR_EXCEPTION(13)
and NVGPU_CHANNEL_FECS_ERR_UNIMP_FIRMWARE_METHOD (37) are new error
notifiers.

JIRA GPUT19X-7

Change-Id: Idee83e842c835bdba9eb18578aad0c372ea74c5d
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1310563
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-23 17:18:28 -07:00
Seema Khowala
df94d474a8 gpu: nvgpu: add init_pbdma_intr_desc fifo ops
Init device_fatal, channel_fatal and restartable fifo intr pbdma s/w
variables for pbdma_intr_0 interrupt masks for each GPU version separately

pbdma_intr_0 field differences for each GPU version:-
-gk20a  : bit 28 does not exists in hw
-gm20b  : bit 8(lbreq), 20(xbarconnect) and 28 do not exist in hw
-gp10b  : bit 8(lbreq), 20(xbarconnect) do not exist in hw. bit 28,
          (syncpoint_illegal) added in hw but is not being handled.
-gk20a/gm20b/gp10b
bit 24 eng_reset and bit 25 semaphore always existed in hw but never
handled

JIRA GPUT19X-47

Change-Id: I209191f57c5ea5b15081b7dc2411801d3537017c
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1325402
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-23 09:34:18 -07:00
Terje Bergstrom
4492c62ffe gpu: nvgpu: Add bus HAL
Add bus HAL and move all bus related hardware sequencing to that file:
BAR1 binding, timer access, and interrupt handling.

Change-Id: Ibc5f5797dc338de10749b446a7bdbcae600fecb4
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1323353
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-23 08:44:07 -07:00
Konsta Holtta
33f637585e gpu: nvgpu: split nvhost dependency on plat interface
Add CONFIG_TEGRA_GK20A_NVHOST and remove the TEGRA_GRHOST ||
TEGRA_HOST1X dependency in CONFIG_TEGRA_GK20A to allow using the iGPU
without the nvhost driver. Use the new config to guard syncpt-related
code.

Also make TEGRA_ACR depend on GK20A too so that it aligns properly under
gk20a in menuconfig.

Bug 1853519

Change-Id: I9e9b0a7915d000aae7930821627b7a01d08d3f5c
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1321303
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-23 08:04:23 -07:00
Deepak Nibade
7505a75954 gpu: nvgpu: take power refcount in gk20a_cde_convert()
We have a gk20a_busy() call in gk20a_buffer_convert_gpu_to_cde()
and we again call gk20a_busy() in gk20a_submit_channel_gpfifo()

If gk20a_do_idle() is triggered in between these two calls,
then this leads to a deadlock and results in idle failure

Hence to avoid this take power refcount in a more fine-grained
way i.e. in gk20a_cde_convert() instead of taking in
gk20a_buffer_convert_gpu_to_cde()

Keep gk20a_cde_execute_buffer() out of the gk20a_busy()/
gk20a_idle() pair since we take power refcount in submit path
anyways

Add correct error handling path in gk20a_cde_convert()

Bug 200287073

Change-Id: Iffea2d4c03f42b47dbf05e7fe8fe2994f9c6b37c
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1324329
(cherry picked from commit ce057d784d)
Reviewed-on: http://git-master/r/1320408
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-23 07:13:55 -07:00
Deepak Nibade
978d13efe5 gpu: nvgpu: hold mutex to get cde context only
In gk20a_cde_convert(), we hold cde_app.mutex almost
for everything which is unnecessary

Also, this causes a deadlock scenario when gk20a_do_idle()
is called
In some cases it is possible that Thread 1
holds the lock and is trying to power on GPU, and
Thread 2 is trying to power off GPU and then grab
cde_app.mutex to cleanup GPU state

To fix this, grab the mutex only for gk20a_cde_get_context()
and then release it

Bug 200287073

Change-Id: Ic4856604652d0d4024abdeb5c2f8f03910c601a5
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1324328
(cherry picked from commit 3c8eef0d0e)
Reviewed-on: http://git-master/r/1322030
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2017-03-23 07:13:50 -07:00
Alex Waterman
ebe71ea9a2 gpu: nvgpu: Remove 0x from function name print
Remove an 0x that prepended a function name print (not a
function address so the 0x is pretty silly).

Bug 1799159

Change-Id: I208192e3cc22699dca13158ab3a33451cee843b0
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1320840
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-03-22 19:46:40 -07:00
Peter Daifuku
23e92bee4a gpu: nvgpu: profiler create/free, hwpm reserve
Add support for creating/freeing profiler objects, hwpm reservations

Bug 1775465
JIRA EVLR-680
JIRA EVLR-682

Change-Id: I4db83d00e4b0b552b05b9aae96dc553dd1257d88
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1294401
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-22 19:46:40 -07:00
Alex Waterman
7719eb94f7 gpu: nvgpu: Use new kmem API functions (pmgr/*)
Use the new kmem API functions in pmgr/*.

Bug 1799159
Bug 1823380

Change-Id: Idc410bc02f6b35d673a4ccdaaa6ab43348418263
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1318314
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-03-22 18:37:10 -07:00
Alex Waterman
093384887f gpu: nvgpu: Use new kmem API functions (volt/*)
Use the new kmem API functions in volt/*.

Bug 1799159
Bug 1823380

Change-Id: Ib7bb5b3b3b364ff6acf93f39a72aa5b0a704a3f8
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1318313
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-03-22 18:37:10 -07:00
Alex Waterman
4a94c135f0 gpu: nvgpu: Use new kmem API functions (channel)
Use the new kmem API functions in the channel and channel
related code.

Also delete the usage of kasprintf() since that must be paired
with a kfree(). Since the kasprintf() doesn't use the nvgpu kmem
machinery (and is Linux specific) instead use a small buffer
statically allocated on the stack.

Bug 1799159
Bug 1823380

Change-Id: Ied0183f57372632264e55608f56539861cc0f24f
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1318312
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-22 18:37:10 -07:00
Alex Waterman
14188ba419 gpu: nvgpu: Use new kmem API functions (pci.c)
Really just delete the usage of kasprintf() since that must be
paired with a kfree(). Since the kasprintf() doesn't use the
nvgpu kmem machinery (and is Linux specific) instead use a small
buffer statically allocated on the stack.

Bug 1799159
Bug 1823380

Change-Id: Ic26f39da401df926024c67e8ff5d979f683a6d3e
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1318311
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-03-22 18:37:05 -07:00
Alex Waterman
a0a081d065 gpu: nvgpu: Use new kmem API functions (gm206/*)
Use the new kmem API functions in gm206/*.

Bug 1799159
Bug 1823380

Change-Id: I7117c3153d266f0ac72978e2b54f6d4921d919e5
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1318310
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-03-22 18:37:05 -07:00
Alex Waterman
3ab4a992e1 gpu: nvgpu: Use new kmem API functions (gp10b/*)
Use the new kmem API functions in gp10b/*.

Bug 1799159
Bug 1823380

Change-Id: Ia643c704aca2e23e3762c9b7dbdf1aa1f2363811
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1318309
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-03-22 18:37:04 -07:00
Alex Waterman
dd947aeec4 gpu: nvgpu: Fix kmem function definition
Use the correct type for the size argument in __nvgpu_kmalloc() and
make sure the size_t type is available for usage.

Bug 1799159
Bug 1823380

Change-Id: I7d6aea964e065e576c8bc3383a9b2326639c018f
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1318308
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-03-22 18:37:04 -07:00
Vijayakumar
29d2147744 gpu: nvgpu: adapt pwrpolicy code to vbios changes
VBIOS might change size of the power policy table and add new fields.
So driver should validate a minimum size,  not absolute size.
Also driver should use header size from data read from vbios
to parse the table further.

bug 200287822

Change-Id: Ica60de444c3f81cbf61af8684ce4e32ae288188d
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1322242
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-03-22 17:56:33 -07:00
Seema Khowala
971a3c8050 gpu: nvgpu: add mm ops for mmu_fault_pending
This change is needed for t19x mmu fault handling.

Change-Id: I7f9190ab305f699401f6b0033b6a93dd8b4fc3cd
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1315201
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-22 10:11:21 -07:00
Konsta Holtta
fcd7fce9bc gpu: nvgpu: use dma-attr wrappers for K4.9 compatibility
On kernel 4.9, the DMA API has changed, so use the NVIDIA compatibility
wrappers from dma-attrs.h to allow the code to build for both 4.4 and
4.9.

Bug 1853519

Change-Id: I0196936e81c7f72b41b38a67f42af0dc0b5518df
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1321102
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-03-21 15:01:48 -07:00
Konsta Holtta
8f3875393e gpu: nvgpu: abstract away dma alloc attrs
Don't use enum dma_attr in the gk20a_gmmu_alloc_attr* functions, but
define nvgpu-internal flags for no kernel mapping, force contiguous, and
read only modes. Store the flags in the allocated struct mem_desc and
only use gk20a_gmmu_free, remove gk20a_gmmu_free_attr. This helps in OS
abstraction. Rename the notion of attr to flags.

Add implicit NVGPU_DMA_NO_KERNEL_MAPPING to all vidmem buffers
allocated via gk20a_gmmu_alloc_vid for consistency.

Fix a bug in gk20a_gmmu_alloc_map_attr that dropped the attr
parameter accidentally.

Bug 1853519

Change-Id: I1ff67dff9fc425457ae445ce4976a780eb4dcc9f
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1321101
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-03-21 15:01:47 -07:00
Konsta Holtta
79658ac5cb gpu: nvgpu: only report SUPPORT_SYNC_FENCE_FDS if enabled
Don't always report in gpu characteristics that
NVGPU_GPU_FLAGS_SUPPORT_SYNC_FENCE_FDS is supported, but only if
CONFIG_SYNC is enabled.

Bug 1853519

Change-Id: Ie7d021aefe97b7a2b04a25957ae678272ad446f7
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1323130
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-21 12:08:18 -07:00
Terje Bergstrom
467d0b1a19 gpu: nvgpu: Don't query engine id for inval engine
When we get a PBDMA MMU fault, we won't be able to map the MMU id
into an engine id for reset. We still pass FIFO_INVAL_ENGINE_ID to
gk20a_fifo_should_defer_engine_reset() which causes an unnecessary
debug spew.

Check for FIFO_INVAL_ENGINE before calling
gk20a_fifo_should_defer_engine_reset().

Change-Id: I6f4a49be194cbc6070c1a1c667059de2ea79790f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1321492
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-21 12:08:13 -07:00
Seema Khowala
51f3f542fa gpu: nvgpu: add is_preempt_pending fifo ops
is_preempt_pending fifo ops is added as t19x
preempt done sequence is differnt than legacy
chips.

Change-Id: I6b46be1f5b911ae11bbe806968cb8fabb21848e0
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1309678
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-03-21 12:08:06 -07:00
Deepak Nibade
65e2c56797 gpu: nvgpu: check return value of mutex_init in CE2 code
- check return value of nvgpu_mutex_init in ce2_gk20a.c
- add corresponding nvgpu_mutex_destroy calls

Jira NVGPU-13

Change-Id: Iedaa4e182f23ecacf7c2c4e073317d48416ebc8f
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1321288
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-03-21 02:03:04 -07:00
Deepak Nibade
f6f21a27b3 gpu: nvgpu: check return value of mutex_init in CDE code
- check return value of nvgpu_mutex_init in cde_gk20a.c
- add corresponding nvgpu_mutex_destroy calls

Jira NVGPU-13

Change-Id: I99f59d191cc81eff4a330557b864925d36fc4b3d
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1321287
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-03-21 02:03:04 -07:00
Terje Bergstrom
526cb04998 gpu: nvgpu: Move sim support to its own file
Simulator support is intermixed with the rest of code in gk20a.c.
Move that code away from gk20a.c to an own file.

Change-Id: Idd3c8795cec5eadc6e49811b5b8ff0592c49a7d2
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1323230
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
2017-03-20 21:49:28 -07:00
Terje Bergstrom
66cd2f7a18 gpu: nvgpu: gp10b: Remove checks for privsec on vgpu
In virtualized platform we don't have access to fuses. Skip reading
fuse and set priv security unconditionally.

Change-Id: Idcb2670ed48a5edb760e49a6d136d53e05bc34ef
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1323283
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
Tested-by: Richard Zhao <rizhao@nvidia.com>
2017-03-20 16:40:02 -07:00
Terje Bergstrom
866fee0247 gpu: nvgpu: Remove ELPG_FLUSH
ELPG_FLUSH is not accessible in later GPUs, so we stopped using it
and instead do explicit CBC and L2 flushes. Delete the unused
function op and backing code.

Change-Id: Ic3eb97f2d32ea8fdbe5ec57bd9254268caaf9935
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1323236
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-20 16:40:02 -07:00
David Nieto
74fe1caa2b gpu: nvgpu: Add refcounting to driver fds
The main driver structure is not refcounted properly,
so when the driver unload, file desciptors associated to the
driver are kept open with dangling references to the main object.

This change adds referencing to the gk20a structure.

bug 200277762
JIRA: EVLR-1023

Change-Id: Id892e9e1677a344789e99bf649088c076f0bf8de
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1317420
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-20 16:39:55 -07:00
David Nieto
469308beca gpu: nvgpu: fix arbiter teardown on PCI
The driver is not properly tearing down the arbiter on the PCI driver
unload. This change makes sure that the workqueues are drained before
tearing down the driver

bug 200277762
JIRA: EVLR-1023

Change-Id: If98fd00e27949ba1569dd26e2af02b75897231a7
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1320147
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-03-20 16:39:50 -07:00
Seema Khowala
50f371f891 gpu: nvgpu: add fifo ops for intr_0_error_mask
This change is required to support t19x mmu fault

Change-Id: I3953dcf02c71ace606ba81896e56ea98683eb2ca
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1313482
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Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-20 16:39:49 -07:00
Peter Daifuku
38d90b6092 gpu: nvgpu: del channel job before fence is closed
In gk20a_channel_clean_up_jobs, move removal of job from channel's job list
to before fences are cleaned up; this will prevent gk20a_channel_abort from
asynchronously trying to dereference an already freed job.

Bug 1844305
JIRA EVLR-849

Change-Id: I1ba05237aa74be1350007630bfa5eba9988f859a
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
(cherry picked from commit 2a9ce58b1b318b95ecfcdf78462f918d090eab99)
Reviewed-on: http://git-master/r/1319026
(cherry picked from commit 990f070b0a363159ce1b21f936b7512f469018ca)
Reviewed-on: http://git-master/r/1321624
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-03-17 10:56:34 -07:00
Terje Bergstrom
ca762e4220 gpu: nvgpu: Move all FB programming to FB HAL
Move all programming of FB to fb_*.c files, and remove the inclusion
of FB hardware headers from other files.

TLB invalidate function took previously a pointer to VM, but the new
API takes only a PDB mem_desc, because FB does not need to know about
higher level VM.

GPC MMU is programmed from the same function as FB MMU, so added
dependency to GR hardware header to FB.

GP106 ACR was also triggering a VPR fetch, but that's not applicable
to dGPU, so removed that call.

Change-Id: I4eb69377ac3745da205907626cf60948b7c5392a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1321516
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-17 08:44:03 -07:00
Konsta Holtta
0742f4e703 gpu: nvgpu: use $(srctree) properly in makefile
Fix include paths for kernel 4.9 and clean up some unnecessary ones.

Bug 1853519

Change-Id: Ic9dc865654e593f4ed92e88863bca87d850aab3c
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1321226
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2017-03-17 08:43:56 -07:00
Konsta Holtta
946f1e6359 gpu: nvgpu: don't read missing gpc_tpc_count in dump
The gp10b gr status dump can get printed so early that this array is
null, so don't access it in that case.

Bug 1853519

Change-Id: I7474a7f7c50f89aea4ef8e9b16cb1644355e415b
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1321119
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-17 08:43:42 -07:00
Terje Bergstrom
7fac794e99 gpu: nvgpu: Remove use of PM runtime in VPR fetch
VPR fetch is called only from code which already has GPU powered on.
Skip calling PM runtime.

Change-Id: I8f90f1afab150e81ad16a157cfe063848a3e4fc1
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1320732
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
2017-03-17 08:43:36 -07:00
Terje Bergstrom
589d6385b1 gpu: nvgpu: Implement get_rate/set_rate as GPU op
Move clock APIs from gk20a_platform to gpu_ops. At the same time
allow use of internal get_rate/set_rate for querying both GPCCLK
and PWRCLK on iGPU.

At the same time we can replace calls to clk framework with the
new HAL and drop direct dependency to clk framework.

gp10b ops were replaced as a whole at HAL initialization. That
replaces anything set in platform probe stage, so reduce that to
touch only clock gating regs.

Change-Id: Iaf219b1f000d362dbf397d45832f52d25463b31c
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1300113
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2017-03-16 11:48:29 -07:00
Terje Bergstrom
686c3b701f gpu: nvgpu: Move platform files to Tegra Linux
Platform files are used for adding code to probe for Tegra Linux
platform. Move the files to Tegra Linux directory to make this
clear.

Change-Id: Ida66af835688325f095260c618dad90395851267
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1300112
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
2017-03-16 11:48:24 -07:00
Terje Bergstrom
2821eb31e2 gpu: nvgpu: Rename clk->get_rate to measure_freq
get_rate is already used for call-back that queries the last set
clock rate. This instance of get_rate actually measures the frequency
so renaming it to measure_freq.

At the same time modify to use hertz instead of megahertz. We use
fractional megahertz already in GPU.

Change-Id: I387473d6a6cbf3bb9b9e5a909677a1a725403c32
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1300111
Reviewed-by: Alex Waterman <alexw@nvidia.com>
2017-03-16 11:48:24 -07:00
Alex Waterman
886016190c gpu: nvgpu: Fix timers failure address
In the timers code a macro was using __builtin_return_address(0)
when it should have been using _THIS_IP_.

__builtin_return_address(0) will cause the timers code to print
the return address of the function that calls the timers code. This
isn't actually useful, of course. A user actually cares about where
the timers code call comes from which is easily obtained with
_THIS_IP_.

Bug 1799159

Change-Id: Iac16bc79e89e4cd18133db3d20f5a50d4d5e8f31
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1320839
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-03-16 11:03:59 -07:00
Konsta Holtta
7fd72e3135 gpu: nvgpu: cancel vidmem worker only if supported
Cancel the vidmem.clear_mem_worker during suspend only if vidmem is
enabled via kernel config. Otherwise it's not initialized.

Bug 1853519

Change-Id: If88c756ae14f348eddda01218fa218480217388c
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1321118
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: David Martinez Nieto <dmartineznie@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-03-16 09:17:22 -07:00
Konsta Holtta
dd0f3a061b gpu: nvgpu: avoid double-free of incr cmd
The call site (gk20a_submit_prepare_syncs) owns the incr_cmd buffer
passed to __gk20a_channel_semaphore_incr. Delete the free in the error
path of the latter case to avoid freeing the same buffer twice.

Bug 1853519

Change-Id: I9b90ce7ebb17ac63992938c7f9fe90bbd139f85f
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1321117
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: David Martinez Nieto <dmartineznie@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-03-16 09:17:22 -07:00
Terje Bergstrom
95ef0315b9 gpu: nvgpu: Use GPU's own fuse registers
Read fuse values from GPU's own fuse registers instead of Tegra fuse
registers whenever possible. This reduces the number of dependencies
to Linux fuse code.

Some fuses do not have a corresponding register in GPU, so they're
left as is.

Change-Id: Id9f2f4da897f3e20b20c300a67f705e3fa5ba35a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1318278
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
2017-03-16 09:17:22 -07:00
Aparna Das
16ee09bb59 gpu: nvgpu: vgpu: force gpu preepmtion policy
Query the RM server to retrieve gpu preemption policy
of guest based on pct configuration. If guest is not
allowed to request wfi preemption mode then set context
with either gfxp or cta preemption mode only.

Jira VFND-3079
Jira VFND-3081

Change-Id: I60cbf121d6f0e2373568cf40b3dfdb4df76fe02d
Signed-off-by: Aparna Das <aparnad@nvidia.com>
Reviewed-on: http://git-master/r/1280903
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Sachit Kadle <skadle@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
2017-03-14 19:58:19 -07:00
Seema Khowala
a4deb1079e gpu: nvgpu: gp10b: fix stall interrupt enablement
Currently priv, pbus and ltc interrupts are enabled as non-stall but
being handled in stall isr. Fix is to configure them as stall interrupt.

Change-Id: I78a0ad3eb4207dcd70da63098234ed6139f0664a
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1320031
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-14 19:50:10 -07:00
Seema Khowala
93ba29c5b5 gpu: nvgpu: channel_from_inst_ptr renamed and made non static
required to support t19x mmu fault

Change-Id: Ibe621d924717696a359d7e2065beb6501a9f9b5e
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1315928
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2017-03-14 15:26:56 -07:00