Currently a fifo_runlist_info_gk20a structure is allocated and
initialized for each possible runlist. But only a few runlists
are actually used.
Use an array of pointers to runlists in fifo_gk20a. The array
keeps existing indexing by runlist_id. In this patch a context
is still allocated for each possible runlist, but follow up
patch will allow to skip context allocation for inactive
runlists.
Bug 2470115
Change-Id: I1615043cea84db35a270ade64695d51f85c1193a
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2025203
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Move bus related HAL code to new top level HAL directory: hal/.
This directory should mirror the common directory as much as
possible.
There's some nice pros here:
1. Isolate HAL and common code.
2. Since the common directory should not be including HAL
related headers directly this structure will make it
easier to catch these sorts of bugs with a script.
Change-Id: Ib9eb03a97d05db17b637b115c650adcbe9553d54
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2011627
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units/Makefile.units.common.tmk unconditionally sets flags as __NVGPU_POSIX__
and also INTERFACE_DIRS to nvgpu/userspace, drivers/gpu/nvgpu. QNX unit
tests are using this Makefile and don't need these already set flags and
INTERFACE_DIRS so this change is making that unconditional set to
conditional so that QNX unit tests can define their own
JIRA NVGPU-1352
Change-Id: Ib958cb63c0159b1bea48a00fdcac43151a68cc3f
Signed-off-by: asah <asah@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2011270
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
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currently libnvgpu-drv.so is opened with RTLD_GLOBAL flag which is
required for nvgpu common tests but for qnx tests we dont need any
symbol from libnvgpu-drv.so (except nvgpu_posix_probe and
nvgpu_posix_cleanup which we will eventually remove for qnx) so
RTLD_GLOBAL should not be used in case of qnx tests. If RTLD_GLOBAL is
used for qnx tests then the symbols from libnvgpu-drv.so will be used
instead of from libqnx_mock.so which is wrong.
This change uses -Q command line option to make the decision about
RTLD_GLOBAL flag
After this change qnx unit tests should be run with -Q option and nvgpu
common unit tests should be run without it
JIRA NVGPU-1352
Change-Id: I759db679f5b95696835c8125c21f95bf35df590c
Signed-off-by: asah <asah@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2011271
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
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Drop the "runlist_" part in the runlist section of the HAL ops. For
example:
- old: g->ops.runlist.runlist_wait_pending
- new: g->ops.runlist.wait_pending
At the same time, drop the "fifo_" part from the function names. For
example:
- old: gk20a_fifo_runlist_wait_pending
- new: gk20a_runlist_wait_pending
Also rename eng_runlist_base_size to count_max. The size of the
eng_runlist_base register array depicts the maximum possible number of
runlists in the chip for which count_max is more descriptive.
Jira NVGPU-1309
Change-Id: Ie9e94b9f65cd10d3e682d19954f240adb6e311be
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2017403
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The color itself was not being printed when `--no-color' was set
but the reset color escape sequence was still being printed. This
fixes that bug so that now, when `--no-color' is specified neither
the color or the reset sequence is printed.
This cleans up the log mess in GVS runs.
JIRA NVGPU-1737
Change-Id: I8f612d3f920b78e25ba606add703b310da36d7a7
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2007626
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Nicolas Benech <nbenech@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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1. The nvlink code in common/ is clean from any external API usage.
There should not be any compilation issues with POSIX build if we
include nvlink.c to it.
2. Rename the nvlink file in POSIX build to avoid the tmake
duplicate filename issue.
3. Set CONFIG_TEGRA_NVLINK for POSIX to enable reporting of MISRA
violations in nvlink code by the MISRA scanner.
4. To fix the build issues:
a. Add stubs in POSIX
b. Return the 'err' variable set during dev_shutdown() as 'err'
is set but not used.
JIRA NVGPU-1921
JIRA NVGPU-1319
Change-Id: Ifdd6574d772167856782bafa74994507b3cedf4c
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2005622
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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Add new script nvgpu_submit_unit.sh for starting the unit test framework
in GVS. The new script will live in the same path as nvgpu_submit and
can be started without a relative path. This allows for cases where
nvgpu_submit is started from a different path.
Change-Id: Iebc8e86bff943d4741c2fcaa5ec11e9f2c00bee7
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1997984
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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A previous change added more common files to the POSIX
build and added flags to the on-target POSIX build. Those
definitions were missing from the host POSIX build resulting
in build failures.
JIRA NVGPU-1734
Change-Id: I3edbe681a475df45c83eae828900c2612f9357b1
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1996565
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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Add common files to POSIX build, and enable most of the common feature
flags nvgpu has enabled in other builds.
As consequence common code now uses more APIs that need to be stubbed
in POSIX build, so add stubs posix-dt.c, posix-nvhost.c, posix-vgpu.c,
and posix-vidmem.c.
JIRA NVGPU-1734
Change-Id: I936c5886229cb4d47cab4f42b013ff77f9e45482
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1993127
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Rename __nvgpu_set_enabled() to nvgpu_set_enabled(). The original
double underscore was present to indicate that this function is a
function with potentially unintended side effects (enabling a feature
has wide ranging impact).
To not lose this documentation a comment was added to convey that this
function must be used with care.
JIRA NVGPU-1029
Change-Id: I8bfc6fa4c17743f9f8056cb6a7a0f66229ca2583
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1989434
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Added NV_COMPONENT_INCLUDES and
NV_COMPONENT_NEEDED_INTERFACE_DIRS support as we need
them for building QNX nvgpu_rmos/ files with the test
library
JIRA NVGPU-1352
Change-Id: If1944396dac2ac84fadd5cbb487fa700c829523a
Signed-off-by: asah <asah@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1994355
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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When running unit tests, a log of all executed tests is
generated. A script along with the "required_tests.json"
will check that all required tests were effectively run, thus
ensuring that no tests are silently missing. The "testlist.py"
support script is also used to generate the list of required
tests, and can also generate an HTML-formatted output with links
to JAMA requirements wherever possible.
JIRA NVGPU-1717
Change-Id: Ic361b1d0a5f003f8b24952d63e20fb496dd1e787
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1983631
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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Extract non-chip-specific code that manages the runlists (init, update,
reschedule etc.) to a new file in the common directory. Move the
declarations to a new matching runlist.h header.
Jira NVGPU-1309
Change-Id: I3c7e0032899516487037f47ddc9a7e7aa4b0b33a
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1978058
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A last minute fix in the runlist construction code rework reorganized
the order such that the ringbuf list starts with the highest level, not
lowest. Some tests were not updated though. Adjust comments and naming
to indicate what the tests really do, and add one more test to cover all
branches in the interleaved construction logic.
Jira NVGPU-1174
Change-Id: If608a35be2c5cf8f400df6673cd10c983ab91845
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1975379
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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Remove gp106 and add gv100 unit test
This is as a part of removing gp106 support
This adds testing for gv100 to the fuse unit test
Removes check_sec/non_sec as they are not used
Removes delta SRAM fuse as they are not present in GV100
Bug 200457373
Change-Id: I9bb4b714500eae01d0df00bb9f6842d4d4fbfd12
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1960034
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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This unit test verifies that the PD cache is capable of packing
multiple PD allocations into a single page. The verification works
by using the DMA fault injection method to prevent more than one
DMA alloc from happening in the pd_cache code.
If an OOM error is detected by the pd_cache code before the max
number of PDs per page is allocated by the pd_cache then there's
a failure in the packing code.
The correct number of PDs per page is easy to calculate: it's
just PAGE_SIZE / pd_size.
JIRA NVGPU-1323
Change-Id: I2c5b58ecf32da48d503c576012d9e564a270144c
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1970876
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
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There were several places were nvgpu_mem structs were declared on the
stack and not initialized. Some fields could be used erroneously by
underlying APIs.
To allow the initialization of an array of nvgpu_mem in
test_dma_alloc_fi_delayed_enable(), the array length had to be changed
from a const to a macro.
JIRA NVGPU-1563
Change-Id: I6c23445af7d932710898df2e23a8fd892bee77b3
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1967966
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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Add a flag that let's userspace enable the unified VM functionality
on a selective bassis. This feature is working for all cases except
a single MODS trace. This will allow test coverage to be selectively
added in certain userspace tests as well to help prevent this feature
from bit rotting (as it has historically done).
Also update the unit test for the page table management in the GMMU
to reflect this new flag. It's been set to false since the target
platform for safety is currently not using unified address spaces.
Bug 200438879
Change-Id: Ibe005472910d1668e8372754be8dd792773f9d8c
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1951864
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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The pd_cache header declarations were oriignally part of the
gmmu.h header. This is not good from a unit isolation perspective
so this patch moves all the pd_cache specifics over to a new
header file: <nvgpu/pd_cache.h>.
Also a couple of static inlines that were possible when the code
was part of gmmu.h were turned into real, first class functions.
This allowed the pd_cache.h header to not include the gmmu.h
header file.
Also fix an issue in the nvgpu_pd_write() function where the data
was being passed as a size_t for some reason. This has now been
changed to a u32.
JIRA NVGPU-1444
Change-Id: Ib9e9e5a54544de403bfcd8e11c30de05721ddbcc
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1966352
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This reverts commit 15603b9fd5.
Causes a build break in the PD cache unit test. Not sure how this
passed GVS - must have been a race or something? Unclear.
Change-Id: Ia484a801d098d69441326fa1dd40a1c86e2e23ce
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1966335
The pd_cache header declarations were originally part of the
gmmu.h header. This is not good from a unit isolation perspective
so this patch moves all the pd_cache specifics over to a new
header file: <nvgpu/pd_cache.h>.
Also a couple of static inlines that were possible when the code
was part of gmmu.h were turned into real, first class functions.
This allows the pd_cache.h header to not include the gmmu.h
header file.
Also fix an issue in the nvgpu_pd_write() function where the data
was being passed as a size_t for some reason. This has now been
changed to a u32.
JIRA NVGPU-1444
Change-Id: Iead9a0d998396d2289ffcb3b48765d770400397b
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1965271
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