nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-22 17:36:20 +03:00
Code Issues Packages Projects Releases Wiki Activity
9,923 Commits 57 Branches 84 Tags
d28dda714992021d2cc38acfa5923f72b7ee434f
Commit Graph

8 Commits

Author SHA1 Message Date
Richard Zhao
e81a36e56a gpu: nvgpu: hal: fix compile error of new compile flags 
It's preparing to add bellow CFLAGS:
    -Werror -Wall -Wextra \
    -Wmissing-braces -Wpointer-arith -Wundef \
    -Wconversion -Wsign-conversion \
    -Wformat-security \
    -Wmissing-declarations -Wredundant-decls -Wimplicit-fallthrough

Jira GVSCI-11640

Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Change-Id: Ia16ef186da1e97badff9dd0bf8cbd6700dd77b15
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2555057
Reviewed-by: Shashank Singh <shashsingh@nvidia.com>
Reviewed-by: Aparna Das <aparnad@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2022-01-13 12:36:19 -08:00
Vedashree Vidwans
2386ddd038 gpu: nvgpu: modify pbdma.get_fc_target 
Modify pbdma.get_fc_target() to accept nvgpu_device pointer. This is
required for nvgpu-next.

JIRA NVGPU-6135

Change-Id: I8baa58c704ee32ee68e87915029ac2be2132d4a4
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2440180
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:48 -06:00
Debarshi Dutta
17486ec1f6 gpu: nvgpu: rename tsg_gk20a and channel_gk20a structs 
rename struct tsg_gk20a to struct nvgpu_tsg and rename struct
channel_gk20a to struct nvgpu_channel

Jira NVGPU-3248

Change-Id: I2a227347d249f9eea59223d82f09eae23dfc1306
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2112424
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-05-06 02:56:53 -07:00
Thomas Fleury
157b43ed16 gpu: nvgpu: clean ramfc dependencies 
Remove ramfc dependencies on fifo hw header.

Added the following HALs:
- fifo.get_runlist_timeslice
- fifo.get_pb_timeslice

Jira NVGPU-3199

Change-Id: I1bdd4ee5e4008676df514b9d8563e862d1d68e33
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2104539
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-04-25 16:26:57 -07:00
Debarshi Dutta
8e96d56cee gpu: nvgpu: add ramfc specific pbdma hal functions 
Only one h/w header is allowed per hal file. ramfc_*.c uses both
hw_ramfc_*.h and hw_pbdma_*.h. The pbdma dependencies are removed from
the HAL unit of ramfc by constructing new HAL functions for pbdma unit.
The HAL ops functions added are listed below.

get_gp_base
get_gp_base_hi
get_fc_formats
get_fc_pb_header
get_fc_subdevice
get_fc_target
get_ctrl_hce_priv_mode_yes
get_userd_aperture_mask
get_userd_addr
get_userd_hi_addr
get_fc_runlist_timeslice
get_config_auth_level_privileged
set_channel_info_veid
config_userd_writeback_enable
allowed_syncpoints_0_index_f
allowed_syncpoints_0_valid_f
allowed_syncpoints_0_index_v

These HAL ops uses the following new implementations.

gm20b_pbdma_get_gp_base
gm20b_pbdma_get_gp_base_hi
gm20b_pbdma_get_fc_formats
gm20b_pbdma_get_fc_pb_header
gm20b_pbdma_get_fc_subdevice
gm20b_pbdma_get_fc_target
gm20b_pbdma_get_ctrl_hce_priv_mode_yes
gm20b_pbdma_get_userd_aperture_mask
gm20b_pbdma_get_userd_addr
gm20b_pbdma_get_userd_hi_addr

gp10b_pbdma_get_fc_runlist_timeslice
gp10b_pbdma_get_config_auth_level_privileged
gp10b_pbdma_allowed_syncpoints_0_index_f
gp10b_pbdma_allowed_syncpoints_0_valid_f
gp10b_pbdma_allowed_syncpoints_0_index_v

gv11b_pbdma_get_fc_pb_header
gv11b_pbdma_get_fc_target
gv11b_pbdma_set_channel_info_veid
gv11b_pbdma_config_userd_writeback_enable

Jira NVGPU-3195

Change-Id: I849f16650046eca38c67b0d6e0e43cd2ab1ac224
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2102576
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-04-24 03:43:44 -07:00
Debarshi Dutta
993fbd085e gpu: nvgpu: update pbdma HAL Ops method names 
HAL ops specific to pbdma are now updated to remove the word "pbdma"
from the function names in order to follow the convention
g->ops.pbdma.{function_name}()

Jira NVGPU-2950

Change-Id: I43ddb5c842b31c97da8fe35f4762de0478916702
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2075438
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-04-01 10:14:25 -07:00
Thomas Fleury
2e68f784b0 gpu: nvgpu: move ramfc capture to ramfc 
Replaced the following hal
- fifo.capture_channel_ram_dump

With
- ramfc.capture_ram_dump

This HAL captures all fields in ramfc. It no longer
reads hw_state (this has to be done from common code).

Jira NVGPU-1750

Change-Id: I92ee58a7a90fbd0b155acf66b1b6ff22a8e3259e
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2075939
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-03-27 20:35:32 -07:00
Thomas Fleury
1701a267bc gpu: nvgpu: move setup ramfc code to common 
Create ramfc under common/fifo

Created the following HAL:
- ramfc.setup
- ramfc.commit_userd

Moved setup code to ramfc HAL:
- vgpu_channel_setup_ramfc
- gk20a_fifo_setup_ramfc
- channel_gp10b_setup_ramfc
- channel_gv11b_setup_ramfc
- channel_tu104_setup_ramfc

Renamed as:
- <chip>_ramfc_setup

Moved commit userd code to ramfc HAL:
- gk20a_fifo_commit_userd
- channel_gp10b_commit_userd

Renamed as:
- <chip>_ramfc_commit_userd

Jira NVGPU-1750

Change-Id: Ieb1bd2866fd77601edd218f879ababf4f90db54a
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2069947
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-03-27 20:35:04 -07:00