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15 Commits

Author SHA1 Message Date
Antony Clince Alex
d7a1e0d4c9 gpu: nvgpu: update fmodel ctx_var init to add missing pm lists 
Update netlist parsing logic for fmodel to include the following lists:
- LIST_compressed_pm_ctx_reg_ROP
- LIST_compressed_pm_ctx_reg_unicast_GPC
- LIST_compressed_pm_fbpa_ctx_regs
- LIST_compressed_pm_ctx_reg_CAU
- LIST_nv_perf_fbp_control_ctx_regs
- LIST_nv_perf_gpc_control_ctx_regs
- LIST_nv_perf_pma_control_ctx_regs

Jira NVGPU-4711

Change-Id: Ie62784941c86ad42e06228875dea3254d8714be9
Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2391709
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
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Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:28 -06:00
Antony Clince Alex
ee3b8235c6 gpu: nvgpu: update sim netlist parsing to include pm, perf registers 
On simulation platforms the netlist data is fetched from fmodel chiplib.
The chiplib has been updated to include certain pm, perf registers which
were already present in the netimage.

Update sim netlist parsing to fetch the following list of registers:
- LIST_pm_ctx_reg_PPC
- LIST_nv_perf_ctx_reg_SYS
- LIST_nv_perf_sysrouter_ctx_regs
- LIST_nv_perf_pma_ctx_regs
- LIST_nv_perf_fbp_ctx_regs
- LIST_nv_perf_fbprouter_ctx_regs
- LIST_nv_perf_ctx_reg_GPC
- LIST_nv_perf_gpcrouter_ctx_regs
- LIST_pm_ltc_ctx_regs

Bug 2916121

Change-Id: Ida8e02f97f9ae3fc3d89ee6c9e890fe5e441aaa0
Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2369866
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:28 -06:00
Seshendra Gadagottu
62c06723dd gpu: nvgpu: sim: defer sim buffers allocation 
Allocate sim buffers only after chip specific
memory properties are enabled.

JIRA NVGPU-5281

Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Change-Id: I7b64b3a51b8cd66dbefd22a09216b2caaeccacbf
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2324083
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:28 -06:00
Seshendra Gadagottu
ec54b8b2ad gpu: nvgpu: sim: set remove_support hal to NULL 
Found issues with removing sim support for igpu.
Set sim->remove_support to NULL  until JIRA NVGPU-5281
is fixed.

JIRA NVGPU-5257

Change-Id: I2c8af7a0d05f963233378bdb3aa2afcfc4f32b6e
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2322987
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:28 -06:00
Seshendra Gadagottu
bf353cea6c gpu: nvgpu: sim_pci: reconcile sim escape paths between RM and nvgpu 
SIM models are getting updated to have same escape read path
for RM and nvgpu. Updated nvgpu driver code to have same escape
read mechanism as RM for dgpu.

Required for dgpu to work on NET23.

Bug 2539889
Bug 200582707

Change-Id: Ied05dae00928d44249df695429fb5029331f1286
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2256665
Reviewed-by: Lakshmanan M <lm@nvidia.com>
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:28 -06:00
Vedashree Vidwans
a182be7b8d gpu: nvgpu: add ctxsw_reg bundles for nvgpu-next 
Add ctxsw_reg bundle programming for nvgpu-next.

Jira NVGPU-5047

Change-Id: I3df9d89a6615825d224ec5d46b550cd68623e7d7
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2309817
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Lakshmanan M <lm@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:28 -06:00
Vedashree Vidwans
5fa0d7f994 gpu: nvgpu: add bundle programming for nvgpu_next 
Update bundle programming for nvgpu_next.

JIRA NVGPU-5004

Change-Id: I1c452a9e78cd018de86fb57de10291c4411e7d89
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2299128
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:28 -06:00
Seshendra Gadagottu
43324f7b1b gpu: nvgpu: Reconcile sim escape paths between RM and nvgpu 
SIM models are getting updated to have same escape read path
for RM and nvgpu. Updated nvgpu driver code to have same escape
read mechanism as RM.

This is required for igpu to pass on NET21.

Bug 2539889

Change-Id: I5d37ceb799cafb7fc7dec611fda5f5caac7d7f17
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2130414
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Lakshmanan M <lm@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: Lakshmanan M <lm@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:28 -06:00
Scott Long
ae44d384f3 gpu: nvgpu: MISRA 4.5 fixes to round_up() 
MISRA Advisory Directive 4.5 states that identifiers in the same
name space with overlapping visibility should be typographically
unambiguous.

The presence of both the roundup(x,y) and round_up(x,y) macros in
the posix utils.h header incurs a violation of this rule.

These macros were added to keep in sync with the linux kernel variants.

However, there is a key distinction between how these two macros
work in the linux kernel; roundup(x,y) can handle any y alignment while
round_up(x,y) is intended to work only when y is a power-of-two.

Passing a non-power-of-two alignment to round_up(x,y) results in an
incorrect value being returned (silently).

Because all current uses of roundup(x,y) and round_up(x,y) in
nvgpu specify a y value that is a power-of-two and the underlying
posix macro implementations assume as much, it is best to remove
roundup(x,y) from nvgpu altogether to avoid any confusion.

So this change converts all uses of roundup(x,y) to round_up(x,y).

Jira NVGPU-3178

Change-Id: I0ee974d3e088fa704e251a38f6b7ada5a7600aec
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2271385
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
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Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Deepak Nibade
064f7a2f13 gpu: nvgpu: add debugger flag for netlist units 
Add CONFIG_NVGPU_DEBUGGER flag for debugger specific code in
common.netlist and common.sim.netlist units

Jira NVGPU-3506

Change-Id: I616eaea58e72ff104fef11140a0daa59afe7b5fb
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2137252
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-18 01:38:39 -07:00
Sagar Kamble
3f08cf8a48 gpu: nvgpu: rename feature Make and C flags 
Name the Make and C flag variables consistently wih syntax:
CONFIG_NVGPU_<feature name>

s/NVGPU_DEBUGGER/CONFIG_NVGPU_DEBUGGER
s/NVGPU_CYCLESTATS/CONFIG_NVGPU_CYCLESTATS
s/NVGPU_USERD/CONFIG_NVGPU_USERD
s/NVGPU_CHANNEL_WDT/CONFIG_NVGPU_CHANNEL_WDT
s/NVGPU_FEATURE_CE/CONFIG_NVGPU_CE
s/NVGPU_GRAPHICS/CONFIG_NVGPU_GRAPHICS
s/NVGPU_ENGINE/CONFIG_NVGPU_FIFO_ENGINE_ACTIVITY
s/NVGPU_FEATURE_CHANNEL_TSG_SCHED/CONFIG_NVGPU_CHANNEL_TSG_SCHED
s/NVGPU_FEATURE_CHANNEL_TSG_CONTROL/CONFIG_NVGPU_CHANNEL_TSG_CONTROL
s/NVGPU_FEATURE_ENGINE_QUEUE/CONFIG_NVGPU_ENGINE_QUEUE
s/GK20A_CTXSW_TRACE/CONFIG_NVGPU_FECS_TRACE
s/IGPU_VIRT_SUPPORT/CONFIG_NVGPU_IGPU_VIRT
s/CONFIG_TEGRA_NVLINK/CONFIG_NVGPU_NVLINK
s/NVGPU_DGPU_SUPPORT/CONFIG_NVGPU_DGPU
s/NVGPU_VPR/CONFIG_NVGPU_VPR
s/NVGPU_REPLAYABLE_FAULT/CONFIG_NVGPU_REPLAYABLE_FAULT
s/NVGPU_FEATURE_LS_PMU/CONFIG_NVGPU_LS_PMU
s/NVGPU_FEATURE_POWER_PG/CONFIG_NVGPU_POWER_PG

JIRA NVGPU-3624

Change-Id: I8b2492b085095fc6ee95926d8f8c3929702a1773
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130290
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2019-06-11 09:46:24 -07:00
Nitin Kumbhar
e0061b8daa gpu: nvgpu: fix sim STR30 CERT C violations 
Make path a pointer to const char to avoid attempt to
modify string literal.

Error: CERT STR30-C:
drivers/gpu/nvgpu/common/sim/sim_netlist.c:363:
cert_violation: Assigning or casting string literal
 ""GRCTX_GEN_CTX_REGS_BASE_INDEX"" to a pointer to non-const.

Jira NVGPU-3560

Change-Id: I22dacbbd210a43c41aef2532c5ddb1429d5c9153
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2122101
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-06 16:26:48 -07:00
Vinod G
26cb7ee099 gpu: nvgpu: Add flag checking for ZCULL in netlist files 
Add NVGPU_GRAPHICS flag checking for ZCULL specific codes in
netlist files.
This flag is disabled for safety build now.

Jira NVGPU-3550

Change-Id: I41be271d012c05a3fc3677a58f055849a35b092a
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2128644
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-03 16:46:34 -07:00
Seshendra Gadagottu
7a1bd816e1 gpu: nvgpu: use netlist APIs in sim unit 
Avoided direct reference of netlist_vars in sim unit by using
netlist APIs.

JIRA NVGPU-2078

Change-Id: I647d967ffa0c3133c282f209ebce6d9e7894ec8e
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2100856
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-04-19 15:35:21 -07:00
Seshendra Gadagottu
b716286e0f gpu: nvgpu: create common sim unit 
Move all simulation related code to common sim unit.
Moved common/sim.c -> common/sim/sim.c
      common/sim_pci.c -> common/sim/sim_pci.c

Also moved sim netlist related functionality also here. Because, sim
related code is not part of safety build and it will work as single
place-holder for all sim related code.
common/netlist/netlist_sim.c -> common/sim/sim_netlist.c

Changed function name for initializing sim netlist context vars and
moved it to sim.h from netlist.h
nvgpu_netlist_init_ctx_vars_sim -> nvgpu_init_sim_netlist_ctx_vars

JIRA NVGPU-2078

Change-Id: Ibe3452d1595ebd8cc08ce7bd186fdf4291e40ca6
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2100605
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-04-19 15:35:12 -07:00