Terje Bergstrom 72ae2dedf5 gpu: nvgpu: Add HAL op for PMU reset ...

Sequence to reset PMU is different for iGPU and dGPU. Specialize
and implement iGPU version.

Change-Id: I5b9ff2c018a736bc9e27b90d0942c52706b12a12
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1150540

2016-05-20 13:58:00 -07:00

..

acr_gm20b.c

gpu: nvgpu: refactor gk20a_mem_{wr,rd} for vidmem

2016-05-13 07:11:33 -07:00

acr_gm20b.h

gpu: nvgpu: LRF, TEX, LTC, DRAM override

2016-02-26 12:29:55 -08:00

cde_gm20b.c

gpu: nvgpu: Prepare for per-GPU CDE program numbers

2015-08-19 08:03:24 -07:00

cde_gm20b.h

gpu: nvgpu: Prepare for per-GPU CDE program numbers

2015-08-19 08:03:24 -07:00

ce2_gm20b.c

gpu: nvgpu: disable ce2 interrupts when unhandled

2015-04-04 18:08:17 -07:00

ce2_gm20b.h

gpu: nvgpu: disable ce2 interrupts when unhandled

2015-04-04 18:08:17 -07:00

clk_gm20b.c

gpu: nvgpu: Use device instead of platform_device

2016-04-08 09:42:41 -07:00

clk_gm20b.h

gpu: nvgpu: Fix build without Tegra clk framework

2015-03-18 12:11:50 -07:00

debug_gm20b.c

gpu: nvgpu: move debug dump to HAL

2015-04-04 15:06:07 -07:00

debug_gm20b.h

gpu: nvgpu: move debug dump to HAL

2015-04-04 15:06:07 -07:00

fb_gm20b.c

gpu: nvgpu: Control comptagline assignment from kernel

2016-01-05 07:50:02 -08:00

fb_gm20b.h

gpu: nvgpu: Export gm20b kind functions

2015-03-18 12:12:22 -07:00

fifo_gm20b.c

gpu: nvgpu: Read all fields of device_info

2016-05-18 08:15:11 -07:00

fifo_gm20b.h

video: tegra: host: add gm20b channel op

2015-03-18 12:09:39 -07:00

gm20b_gating_reglist.c

gpu: nvgpu: gm20b: update slcg prod values

2015-09-01 07:58:05 -07:00

gm20b_gating_reglist.h

gpu: nvgpu: gm20b: update clock gating defines

2015-04-04 18:04:32 -07:00

gr_ctx_gm20b.c

gpu: nvgpu: load secure gpccs using dma

2015-06-26 13:14:53 -07:00

gr_ctx_gm20b.h

gpu: nvgpu: gm20b: select NETB for final NETLIST

2015-03-18 12:10:39 -07:00

gr_gm20b.c

gpu: nvgpu: hwpm broadcast register support

2016-05-19 15:58:24 -07:00

gr_gm20b.h

gpu: nvgpu: Fix CWD floorsweep programming

2016-05-16 10:57:48 -07:00

hal_gm20b.c

gpu: nvgpu: Add litter values HAL

2016-04-15 08:48:20 -07:00

hal_gm20b.h

gpu: nvgpu: Add class numbers to characteristics

2015-03-18 12:12:06 -07:00

hw_bus_gm20b.h

gpu: nvgpu: Wait for BAR1 bind

2016-04-15 12:38:33 -07:00

hw_ccsr_gm20b.h

gpu: nvgpu: Use sysmem aperture for SoC memory

2016-04-15 08:50:34 -07:00

hw_ce2_gm20b.h

gpu: nvgpu: enable ce2 interrupts

2015-04-04 18:02:35 -07:00

hw_ctxsw_prog_gm20b.h

gpu: nvgpu: add accessors for global_esr values and sm_dbgr_control

2016-04-19 08:08:07 -07:00

hw_fb_gm20b.h

gpu: nvgpu: Use sysmem aperture for SoC memory

2016-04-15 08:50:34 -07:00

hw_fifo_gm20b.h

gpu: nvgpu: Add support for multiple PBDMAs

2016-05-13 10:01:56 -07:00

hw_flush_gm20b.h

gpu: nvgpu: Do not use G_ELPG_FLUSH

2015-11-10 10:33:39 -08:00

hw_fuse_gm20b.h

gpu: nvgpu: Add Fuse prints on PMU Halt

2016-04-06 19:38:19 -07:00

hw_gmmu_gm20b.h

gpu: nvgpu: Use sysmem aperture for SoC memory

2016-04-15 08:50:34 -07:00

hw_gr_gm20b.h

gpu: nvgpu: Fix CWD floorsweep programming

2016-05-16 10:57:48 -07:00

hw_ltc_gm20b.h

gpu: nvgpu: hwpm broadcast register support

2016-05-19 15:58:24 -07:00

hw_mc_gm20b.h

gpu: nvgpu: Ensure memory subsystem is enabled

2015-04-04 18:08:03 -07:00

hw_pbdma_gm20b.h

gpu: nvgpu: Use sysmem aperture for SoC memory

2016-04-15 08:50:34 -07:00

hw_perf_gm20b.h

gpu: nvgpu: cyclestats mode E snapshots support

2015-06-06 07:23:24 -07:00

hw_pri_ringmaster_gm20b.h

gpu: nvgpu: Add GPU driver for GM20B

2015-03-18 12:09:38 -07:00

hw_pri_ringstation_sys_gm20b.h

gpu: nvgpu: Add GPU driver for GM20B

2015-03-18 12:09:38 -07:00

hw_proj_gm20b.h

gpu: nvgpu: support for hwpm context switching

2016-04-07 11:05:49 -07:00

hw_pwr_gm20b.h

gpu: nvgpu: Use sysmem aperture for SoC memory

2016-04-15 08:50:34 -07:00

hw_ram_gm20b.h

gpu: nvgpu: Use sysmem aperture for SoC memory

2016-04-15 08:50:34 -07:00

hw_therm_gm20b.h

gpu: nvgpu: add support for therm gate ctrl

2016-01-27 09:53:31 -08:00

hw_timer_gm20b.h

gpu: nvgpu: Provide cpu gpu time correlation via ioctl

2016-03-22 10:39:45 -07:00

hw_top_gm20b.h

gpu: nvgpu: Read all fields of device_info

2016-05-18 08:15:11 -07:00

hw_trim_gm20b.h

gpu: nvgpu: Add GM20B GPCPLL h/w definitions

2015-03-18 12:11:18 -07:00

ltc_gm20b.c

gpu: nvgpu: Do not program max ways evict

2016-05-13 16:07:00 -07:00

ltc_gm20b.h

gpu: nvgpu: Set compression page per SoC

2015-04-04 18:04:45 -07:00

mc_gm20b.c

gpu: nvgpu: Allow enabling/disabling MC interrupt

2015-03-18 12:12:31 -07:00

mc_gm20b.h

gpu: nvgpu: Per-chip interrupt processing

2015-03-18 12:11:56 -07:00

mm_gm20b.c

gpu: nvgpu: refactor gk20a_mem_{wr,rd} for vidmem

2016-05-13 07:11:33 -07:00

mm_gm20b.h

nvgpu: Host side changes to support HS mode

2015-03-18 12:10:14 -07:00

pmu_gm20b.c

gpu: nvgpu: Add HAL op for PMU reset

2016-05-20 13:58:00 -07:00

pmu_gm20b.h

gpu: nvgpu: load secure gpccs using dma

2015-06-26 13:14:53 -07:00

regops_gm20b.c

gpu: nvgpu: update regops whitelist

2015-03-18 12:12:33 -07:00

regops_gm20b.h

gpu: nvgpu: gm20b: correct hdr #define

2015-05-18 11:19:31 +05:30

therm_gm20b.c

gpu: nvgpu: tegra: fix sparse errors

2016-03-13 22:19:00 -07:00

therm_gm20b.h

gpu: nvgpu: update thermal programming

2015-10-27 15:42:08 -07:00