Terje Bergstrom a83e5281af gpu: nvgpu: gp10b: Define pagepool size ...

Bug 1567274

Change-Id: I4369458d3af0c4da32af8a5881c8fe60b11f7632
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/606932
Reviewed-by: Automatic_Commit_Validation_User

2016-12-27 15:22:02 +05:30

..

gr_gp10b.c

gpu: nvgpu: gp10b: Define pagepool size

2016-12-27 15:22:02 +05:30

gr_gp10b.h

gpu: nvgpu: t18x, gp10b framework

2016-12-27 15:22:02 +05:30

gr_ops_gp10b.h

gpu: nvgpu: t18x, gp10b framework

2016-12-27 15:22:02 +05:30

hal_gp10b.c

gpu: nvgpu: gp10b: Define physical address width

2016-12-27 15:22:02 +05:30

hal_gp10b.h

gpu: nvgpu: gp10b: Fill class numbers

2016-12-27 15:22:02 +05:30

hw_bus_gp10b.h

gpu: nvgpu: gp10b headers

2016-12-27 15:22:01 +05:30

hw_ccsr_gp10b.h

gpu: nvgpu: gp10b headers

2016-12-27 15:22:01 +05:30

hw_chiplet_pwr_gp10b.h

gpu: nvgpu: gp10b headers

2016-12-27 15:22:01 +05:30

hw_ctxsw_prog_gp10b.h

gpu: nvgpu: Synchronize gp10b headers with gm20b

2016-12-27 15:22:02 +05:30

hw_fb_gp10b.h

gpu: nvgpu: Synchronize gp10b headers with gm20b

2016-12-27 15:22:02 +05:30

hw_fifo_gp10b.h

gpu: nvgpu: Synchronize gp10b headers with gm20b

2016-12-27 15:22:02 +05:30

hw_flush_gp10b.h

gpu: nvgpu: gp10b headers

2016-12-27 15:22:01 +05:30

hw_fuse_gp10b.h

gpu: nvgpu: Synchronize gp10b headers with gm20b

2016-12-27 15:22:02 +05:30

hw_gmmu_gp10b.h

gpu: nvgpu: gp10b: Add SM debug registers

2016-12-27 15:22:02 +05:30

hw_gr_gp10b.h

gpu: nvgpu: Write ZBC registers to DSS

2016-12-27 15:22:02 +05:30

hw_ltc_gp10b.h

gpu: nvgpu: gp10b: Implement L2 query

2016-12-27 15:22:02 +05:30

hw_mc_gp10b.h

gpu: nvgpu: Implement gp10b intr processing

2016-12-27 15:22:02 +05:30

hw_pbdma_gp10b.h

gpu: nvgpu: Synchronize gp10b headers with gm20b

2016-12-27 15:22:02 +05:30

hw_pri_ringmaster_gp10b.h

gpu: nvgpu: gp10b headers

2016-12-27 15:22:01 +05:30

hw_pri_ringstation_sys_gp10b.h

gpu: nvgpu: gp10b headers

2016-12-27 15:22:01 +05:30

hw_proj_gp10b.h

gpu: nvgpu: gp10b headers

2016-12-27 15:22:01 +05:30

hw_pwr_gp10b.h

gpu: nvgpu: Synchronize gp10b headers with gm20b

2016-12-27 15:22:02 +05:30

hw_ram_gp10b.h

gpu: nvgpu: Synchronize gp10b headers with gm20b

2016-12-27 15:22:02 +05:30

hw_therm_gp10b.h

gpu: nvgpu: Synchronize gp10b headers with gm20b

2016-12-27 15:22:02 +05:30

hw_timer_gp10b.h

gpu: nvgpu: gp10b headers

2016-12-27 15:22:01 +05:30

hw_top_gp10b.h

gpu: nvgpu: Use queried interrupt ids

2016-12-27 15:22:02 +05:30

ltc_gp10b.c

gpu: nvgpu: gp10b: Implement L2 query

2016-12-27 15:22:02 +05:30

ltc_gp10b.h

gpu: nvgpu: gp10b: Implement L2 query

2016-12-27 15:22:02 +05:30

Makefile

gpu: nvgpu: gp10b: Define physical address width

2016-12-27 15:22:02 +05:30

mc_gp10b.c

gpu: nvgpu: Use queried interrupt ids

2016-12-27 15:22:02 +05:30

mc_gp10b.h

gpu: nvgpu: Implement gp10b intr processing

2016-12-27 15:22:02 +05:30

mm_gp10b.c

gpu: nvgpu: gp10b: Define physical address width

2016-12-27 15:22:02 +05:30

mm_gp10b.h

gpu: nvgpu: gp10b: Define physical address width

2016-12-27 15:22:02 +05:30

platform_gp10b_tegra.c

gpu: nvgpu: Define gp10b big page size

2016-12-27 15:22:02 +05:30