Terje Bergstrom d20afe7bd4 gpu: nvgpu: Dynamic betacb size ...

Allow querying and setting default betacb size via debugfs. For global buffers
the value takes effect upon first boot of GPU, and has no effect after that.

Bug 1628352

Change-Id: Ib63f4299249c41eab1b36cc501b525cc54211195
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/733328

2015-05-18 11:32:40 +05:30

..

acr_gm20b.c

gpu: nvgpu: Do not leak ACR header

2015-05-18 11:31:31 +05:30

acr_gm20b.h

gpu: nvgpu: updated gpmu interface data struct.

2015-05-18 11:31:38 +05:30

ce2_gm20b.c

gpu: nvgpu: disable ce2 interrupts when unhandled

2015-04-04 18:08:17 -07:00

ce2_gm20b.h

gpu: nvgpu: disable ce2 interrupts when unhandled

2015-04-04 18:08:17 -07:00

clk_gm20b.c

gpu: nvgpu: Combine delays with GM20B parameters

2015-05-18 11:19:49 +05:30

clk_gm20b.h

gpu: nvgpu: Fix build without Tegra clk framework

2015-03-18 12:11:50 -07:00

debug_gm20b.c

gpu: nvgpu: move debug dump to HAL

2015-04-04 15:06:07 -07:00

debug_gm20b.h

gpu: nvgpu: move debug dump to HAL

2015-04-04 15:06:07 -07:00

fb_gm20b.c

gpu: nvgpu: Per-SoC compressible page size

2015-04-04 19:17:37 -07:00

fb_gm20b.h

gpu: nvgpu: Export gm20b kind functions

2015-03-18 12:12:22 -07:00

fifo_gm20b.c

gpu: nvgpu: Use gk20a_mem_phys instead of sg_phys

2015-04-04 19:00:43 -07:00

fifo_gm20b.h

video: tegra: host: add gm20b channel op

2015-03-18 12:09:39 -07:00

gm20b_gating_reglist.c

gpu: nvgpu: gm20b: enable slcg fb

2015-05-18 11:18:55 +05:30

gm20b_gating_reglist.h

gpu: nvgpu: gm20b: update clock gating defines

2015-04-04 18:04:32 -07:00

gr_ctx_gm20b.c

gpu: nvgpu: fix sparse warnings

2015-03-18 12:12:01 -07:00

gr_ctx_gm20b.h

gpu: nvgpu: gm20b: select NETB for final NETLIST

2015-03-18 12:10:39 -07:00

gr_gm20b.c

gpu: nvgpu: Dynamic betacb size

2015-05-18 11:32:40 +05:30

gr_gm20b.h

gpu: nvgpu: support config of TPC FUSE dynamically

2015-03-18 12:12:10 -07:00

hal_gm20b.c

gpu: nvgpu: disable ce2 interrupts when unhandled

2015-04-04 18:08:17 -07:00

hal_gm20b.h

gpu: nvgpu: Add class numbers to characteristics

2015-03-18 12:12:06 -07:00

hw_bus_gm20b.h

gpu: nvgpu: Update gk20a and gm20b headers

2015-04-04 18:03:11 -07:00

hw_ccsr_gm20b.h

gpu: nvgpu: Add GPU driver for GM20B

2015-03-18 12:09:38 -07:00

hw_ce2_gm20b.h

gpu: nvgpu: enable ce2 interrupts

2015-04-04 18:02:35 -07:00

hw_ctxsw_prog_gm20b.h

gpu: nvgpu: Allow enabling PC sampling

2015-04-04 18:56:54 -07:00

hw_fb_gm20b.h

gpu: nvgpu: Removal of regops from CUDA driver

2015-04-04 18:58:04 -07:00

hw_fifo_gm20b.h

gpu: nvgpu: More robust recovery

2015-04-04 18:06:37 -07:00

hw_flush_gm20b.h

gpu: nvgpu: Add GPU driver for GM20B

2015-03-18 12:09:38 -07:00

hw_fuse_gm20b.h

gpu: nvgpu: Regenerate HW headers

2015-04-04 19:02:57 -07:00

hw_gmmu_gm20b.h

gpu: nvgpu: gm20b: update gpu headers

2015-03-18 12:10:37 -07:00

hw_gr_gm20b.h

gpu: nvgpu: Regenerate HW headers

2015-04-04 19:02:57 -07:00

hw_ltc_gm20b.h

gpu: nvgpu: Sync gk20a and gm20b headers

2015-03-18 12:11:52 -07:00

hw_mc_gm20b.h

gpu: nvgpu: Ensure memory subsystem is enabled

2015-04-04 18:08:03 -07:00

hw_pbdma_gm20b.h

gpu: nvgpu: Sync gk20a and gm20b headers

2015-03-18 12:11:52 -07:00

hw_pri_ringmaster_gm20b.h

gpu: nvgpu: Add GPU driver for GM20B

2015-03-18 12:09:38 -07:00

hw_pri_ringstation_sys_gm20b.h

gpu: nvgpu: Add GPU driver for GM20B

2015-03-18 12:09:38 -07:00

hw_proj_gm20b.h

gpu: nvgpu: Add GPU driver for GM20B

2015-03-18 12:09:38 -07:00

hw_pwr_gm20b.h

gpu: nvgpu: Sync gk20a and gm20b headers

2015-03-18 12:11:52 -07:00

hw_ram_gm20b.h

gpu: nvgpu: Sync gk20a and gm20b headers

2015-03-18 12:11:52 -07:00

hw_therm_gm20b.h

gpu: nvgpu: Sync gk20a and gm20b headers

2015-03-18 12:11:52 -07:00

hw_timer_gm20b.h

gpu: nvgpu: Add GPU driver for GM20B

2015-03-18 12:09:38 -07:00

hw_top_gm20b.h

gpu: nvgpu: Gpu characterstics enhancement

2015-04-04 18:58:05 -07:00

hw_trim_gm20b.h

gpu: nvgpu: Add GM20B GPCPLL h/w definitions

2015-03-18 12:11:18 -07:00

ltc_gm20b.c

gpu: nvgpu: fix return code in *_ltc_cbc_ctrl()

2015-05-18 11:18:54 +05:30

ltc_gm20b.h

gpu: nvgpu: Set compression page per SoC

2015-04-04 18:04:45 -07:00

mc_gm20b.c

gpu: nvgpu: Allow enabling/disabling MC interrupt

2015-03-18 12:12:31 -07:00

mc_gm20b.h

gpu: nvgpu: Per-chip interrupt processing

2015-03-18 12:11:56 -07:00

mm_gm20b.c

gpu: nvgpu: add platform specific get_iova_addr()

2015-04-04 19:02:17 -07:00

mm_gm20b.h

nvgpu: Host side changes to support HS mode

2015-03-18 12:10:14 -07:00

pmu_gm20b.c

gpu: nvgpu: made gm20b_pmu_init_acr() global.

2015-04-27 10:45:37 -07:00

pmu_gm20b.h

gpu: nvgpu: made gm20b_pmu_init_acr() global.

2015-04-27 10:45:37 -07:00

regops_gm20b.c

gpu: nvgpu: update regops whitelist

2015-03-18 12:12:33 -07:00

regops_gm20b.h

gpu: nvgpu: gm20b: correct hdr #define

2015-05-18 11:19:31 +05:30