Commit Graph

23 Commits

Author SHA1 Message Date
Sai Nikhil
7f6c782ba0 gpu: nvgpu: clk: fix MISRA Rule 10.4 Violations
MISRA Rule 10.4 only allows the usage of arithmetic operations on
operands of the same essential type category.

Adding "U" at the end of the integer literals to have same type of
operands when an arithmetic operation is performed.

This fixes violation where an arithmetic operation is performed on
signed and unsigned int types.

JIRA NVGPU-992

Change-Id: Ic8e5ae1ab71c6ecdfed83deeb4f354a1d1dbe8ed
Signed-off-by: Sai Nikhil <snikhil@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1810614
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: Scott Long <scottl@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-10-12 17:35:09 +05:30
Thomas Fleury
c1e80da2c5 gpu: nvgpu: allow a calibration parameter to be zero
It is allowed for some calibration parameters to be zero, when the
others are non-zero. Pass all calibration parameters to PMU.

Bug 2331655

Change-Id: I953a40e37211169e1aefd80aef2545a1b6a0afa1
Reviewed-on: https://git-master.nvidia.com/r/1810994
Reviewed-by: David Jarrett <djarrett@nvidia.com>
Tested-by: David Jarrett <djarrett@nvidia.com>
Signed-off-by: Vaikundanathan S <vaikuns@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1817580
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-09-20 10:51:21 -07:00
Thomas Fleury
48ca15d839 gpu: nvgpu: set calibration type for VIN devices
Calibration type was not initialized for VIN devices 2.0
This was leading to using the older calibration method.
Fix calibration type when parsing VBIOS.

Bug 2331655

Change-Id: I935f2a1812b8934dd8d3cd7e7d9c335a979a154e
Reviewed-on: https://git-master.nvidia.com/r/1810379
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: David Jarrett <djarrett@nvidia.com>
Signed-off-by: Vaikundanathan S <vaikuns@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1817579
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-09-20 10:51:12 -07:00
ddutta
998c598834 gpu: nvgpu: change location of gk20a.h
Update the location of gk20a.h to include/nvgpu/gk20a.h in the
following directories.

nvgpu/boardobj/
nvgpu/clk/
nvgpu/lpwr/
nvgpu/perf/
nvgpu/pmgr/
nvgpu/pstate/
nvgpu/therm/
nvgpu/volt/

Jira NVGPU-597

Change-Id: I5d9e74ae2f1a646087f15a5872daf9017c1580a9
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1822741
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-09-14 15:34:58 -07:00
Philip Elcan
7f8226887c gpu: nvgpu: cleanup return types for MISRA 10.3
This is a big cleanup of return types across a number of modules in the
nvgpu driver. Many functions were returning u32 but using negative
return codes. This is a MISRA 10.3 violation by assigning signed values
to a u32.

JIRA NVGPU-647

Change-Id: I59ee66706321f5b5b1a07ed8c24b81583e9ba28c
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1810743
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-09-06 21:33:50 -07:00
Srirangan
ef851272e5 gpu: nvgpu: clk: Fix MISRA 15.6 violations
MISRA Rule-15.6 requires that all if-else blocks be enclosed in braces,
including single statement blocks. Fix errors due to single statement
if blocks without braces by introducing the braces.

JIRA NVGPU-671

Change-Id: I228f04adea809e1dd4e6826bf1a04f051a533102
Signed-off-by: Srirangan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1796831
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-09-05 20:38:33 -07:00
Sai Nikhil
05f45bcfc3 gpu: nvgpu: MISRA 10.3 Conversions to/from char
MISRA Rule 10.3 states that the value of an expression shall not be
assigned to an object with a narrower essential type or of a
different essential type category.

We have cases where we are converting to/from char and non char types
and this fix 10.3 violations resulting from these conversions.

This also fix violations in conversions between s8 and non-s8 types
as s8 can be typedefed as char.

Jira NVGPU-1010

Change-Id: I150dd633eb7575de9ea2bedd598b7af74d1fcbd9
Signed-off-by: Sai Nikhil <snikhil@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1801613
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-08-21 14:54:27 -07:00
Terje Bergstrom
227c6f7b7a gpu: nvgpu: Move fuse HAL to common
Move implementation of fuse HAL to common/fuse. Also implements new
fuse query functions for FBIO, FBP, TPC floorsweeping and security
fuses.

JIRA NVGPU-957

Change-Id: I55e256a4f1b59d50a721d4942907f70dc57467c4
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1797177
2018-08-20 11:00:59 -07:00
Debarshi Dutta
82a90170d3 gk20a: nvgpu: Remove io.h dependency from gk20a.h
In the current code, gk20a.h includes io.h which gets directly included
in a lot of other files. io.h contains methods which uses a struct
gk20a as a parameter leading to a circular dependency between io.h
and gk20a.h. This can be mitigated by removing io.h from gk20a.h as
part of larger effort to moving gk20a.h to nvgpu/gk20a.h

JIRA NVGPU-597

Change-Id: I93e504fa9371b88152737b342a75580c65e8f712
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1787316
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-07-30 11:24:06 -07:00
Terje Bergstrom
dd739fcb03 gpu: nvgpu: Remove gk20a_dbg* functions
Switch all logging to nvgpu_log*(). gk20a_dbg* macros are
intentionally left there because of use from other repositories.

Because the new functions do not work without a pointer to struct
gk20a, and piping it just for logging is excessive, some log messages
are deleted.

Change-Id: I00e22e75fe4596a330bb0282ab4774b3639ee31e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1704148
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-05-09 18:26:04 -07:00
Vaikundanathan S
65a362c01a gpu: nvgpu: Update clk_vin interface as per chips_a
clk_vin data structures updated as new calibration type (v20) is added.
GP106 header does not have vin calibration type.
Assuming V10 if calibration type is not V20.
Add fuse calibration for V20 type.

Bug 200399373

Change-Id: I9449de1ecb0d0873f3bc16f46660f93fab5b9eac
Signed-off-by: Vaikundanathan S <vaikuns@nvidia.com>
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1687591
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-05-04 06:09:47 -07:00
Alex Waterman
12cd49a733 gpu: nvgpu: Cleanup more set but unused variables
This time they were largely located in the various common directories.

JIRA NVGPU-525

Change-Id: I3a6d523b060a0c6761b227267890298c6d2fb19f
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1673820
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-03-30 14:54:08 -07:00
Thomas Fleury
13093eff52 gpu: nvgpu: add g cross reference in boardobjgrp
Added a pointer to GPU context in boardobjgrp, and updated
constructors. It will be useful to free allocated DMA resources.

JIRA EVLR-1959
Bug 200352099

Change-Id: I006e4f970c9a2525dabdfd6ad417be64e36b7b68
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1586551
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-11-06 13:40:59 -08:00
Terje Bergstrom
7885500a42 gpu: nvgpu: Change license for common files to MIT
Change license of OS independent source code files to MIT.

JIRA NVGPU-218

Change-Id: I1474065f4b552112786974a16cdf076c5179540e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1565880
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-09-26 11:37:32 -07:00
Terje Bergstrom
774899f30a gpu: nvgpu: Change VBIOS code to use gp106 headers
VBIOS code was the last code using gm206 hardware headers. Change the
code to use gp106 headers instead, move the code to gp106 directory
and delete gm206 HW headers.

JIRA NVGPU-218

Change-Id: I7ccd6c2975c767bca871d77a701dbd3395b17f30
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1563742
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-09-20 15:55:32 -07:00
Mahantesh Kumbar
673dd97160 gpu: nvgpu: moved & renamed "struct pmu_gk20a"
- Renamed "struct pmu_gk20a" to "struct nvgpu_pmu" then moved
to file "pmu.h" under folder "drivers/gpu/nvgpu/include/nvgpu/"

- Included header file "pmu.h" to dependent file &
removed "pmu_gk20a.h" include if its usage is not present.

- Replaced "struct pmu_gk20a" with "struct nvgpu_pmu" in dependent
source & header files.

JIRA NVGPU-56

Change-Id: Ia3c606616831027093d5c216959c6a40d7c2632e
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1479209
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-06-04 23:05:18 -07:00
Terje Bergstrom
1add126551 gpu: nvgpu: clk: Use new error macros
gk20a_err() and gk20a_warn() require a struct device pointer,
which is not portable across operating systems. The new nvgpu_err()
and nvgpu_warn() macros take struct gk20a pointer. Convert code
to use the more portable macros.

JIRA NVGPU-16

Change-Id: I58bb9e2fb7e5b18f74fbb92b70150cce97968fc3
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1457347
Reviewed-by: Alex Waterman <alexw@nvidia.com>
2017-04-07 13:48:24 -07:00
Terje Bergstrom
53465def64 gpu: nvgpu: Generalize BIOS code
Most of BIOS parsing code is not specific to any particular GPU. Move
most of the code to generic files, and leave only chip specific parts
dealing with microcontroller boot into chip specific files.

As most of the parsing is generic, they do not need to be called via
HALs so remove the HALs and change the calls into direct function
calls.

All definitions meant to be used outside BIOS code itself are now in
<nvgpu/bios.h>

Change-Id: Id48e94c74511d6e95645e90e5bba5c12ef8da45d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1302222
GVS: Gerrit_Virtual_Submit
2017-02-17 13:46:32 -08:00
Mahantesh Kumbar
3885fe099a gpu: nvgpu: move pmuif/* to drivers/gpu/nvgpu/include/nvgpu
Moved pmuif/* headers to drivers/gpu/nvgpu/include/nvgpu folder
to support cross platform feature implementation.

Made changes to files which accessed “include pmuif/*” to reflect
pmuif/* movement changes.

Deleted includes of gk20a.h/pmu_gk20a.h from pmuif/*.h files.

Jira NVGPU-19

Change-Id: Iace4e107c24bdaff08a407eae3b147959173e485
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1299823
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-02-10 09:43:46 -08:00
Terje Bergstrom
c05cfcb576 gpu: nvgpu: gp106: Generate new gp106 headers
Hardware headers have been outdated. Regenerate with newest tool.
At the same time correct the incorrect usage of fuse fields.

JIRA DNVGPU-172

Change-Id: If190bf0cf2e41d525e6ea374a30efd1f63963e5e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1294267
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
2017-01-26 14:12:22 -08:00
Alex Waterman
78ad8a23ea gpu: nvgpu: Move gp106 HW headers
Move the gp106 HW headers to a new directory specially for them:

  include/nvgpu/hw/gp106

And change the code to include like so:

  #include <nvgpu/hw/gp106/hw_fb_gp106.h>

This is part of the process to restructure the nvgpu driver.

Bug 1799159

Change-Id: I76a4ff2e92021150ce65a8843bc12bb614a0e68a
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1280327
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-01-11 12:44:15 -08:00
Terje Bergstrom
f37f4e27e3 gpu: nvgpu: Use perf table only VBIOS supports it
We retrieve perf table from VBIOS only if respective HAL op is
implemented. Later in code we unconditionally dereference the pointer
which can lead to NULL pointer access.

Fix by early aborting creation of devinit tables if the perf VBIOS
getter is missing.

Change-Id: If48aa6dac724056dd1feb2ef520e343736d4db85
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1279223
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
2017-01-04 01:44:25 -08:00
Vijayakumar Subbu
432017248e gpu: nvgpu: Add dGPU clocks support
JIRA DNVGPU-42

Change-Id: Ic2fca9d0cf82f2823654ac5e8f0772a1eec7b3b5
Signed-off-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1205850
(cherry picked from commit b9f5c6bc4e649162d63e33d65b725872340ca114)
Reviewed-on: http://git-master/r/1227257
GVS: Gerrit_Virtual_Submit
2016-12-27 15:26:49 +05:30