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2ba44f30c79b371773f64c425f2e14a31df5e3e8
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6523 Commits

Author SHA1 Message Date
Alex Waterman
2ba44f30c7 gpu: nvgpu: Add doxygen safety profile build 
Add a doxygen build to nvgpu. Use the following command from the
drivers/gpu/nvgpu directory:

  $ make -f Makefile.doxygen

This will autogenerate a list of files from the safety profile
architecture and then generate doxygen documentation from said
list of files.

Also add a .gitignore entry for the sources file that gets
generated during the build.

JIRA NVGPU-3544

Change-Id: I2415de631efcc8447c81ace1700ebac8b69a89df
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2131051
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-21 11:15:52 -07:00
ajesh
fa8e1904e2 gpu: nvgpu: fix CERTC violations in timers unit 
INT32-C requires that operations on signed integers do not result in
overflow.
Fix violations of INT32-C in timers unit.

Jira NVGPU-3605

Change-Id: I2d5ba6d1c2e3a84a5b3df1ecaf16cce13c1b2c97
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2139971
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-21 10:26:50 -07:00
Vaibhav Kachore
318d6451e9 gpu: nvgpu: Improve accuracy of dGPU clk measurement 
- This patch replaces "nvgpu_current_time_ms" with "nvgpu_hr_timestamp_us".
- "nvgpu_hr_timestamp_us" gives timestamp in microseconds and has better
accuracy than "nvgpu_current_time_ms" (which gives timestamp in millisecond)

Bug 200503143

Change-Id: I6a10e8e1b3e8ff842aa23f58bf2ba9344af232a6
Signed-off-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2125959
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-21 10:25:48 -07:00
Divya Singhatwaria
aab600a4f2 gpu: nvgpu: Fix CERT INT30-C violations in ACR 
CERT-C INT30 requires checking for wrapping when
doing arithmetic operations of unsigned value.

This fixes INT30 violations in acr_boostrap.c
and acr_sw_gv11b.c

JIRA NVGPU-3575

Change-Id: I9b73d9ca677b7e476ead4b67a257b37aeb3db6b3
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2139389
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-21 06:54:51 -07:00
ajesh
70d8a4555a gpu: nvgpu: fix CERTC violations in kmem unit 
INT30-C Requires that unsigned integer operations do not wrap.
INT31-C Requires that integer conversions do not result in lost or
misinterpreted data.
ERR33-C Requires to detect and handle standard library errors.
Fix the above CERT C violations in kmem unit.

Jira NVGPU-3603

Change-Id: I104551406e3cf6d2da22c5b6c6edc6694992ce62
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2139529
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-21 04:36:51 -07:00
Sagar Kadamati
d2444e85ed gpu: nvgpu: compile-out debug unit 
debug unit is not need to for safety build, so compile out it

JIRA NVGPU-3542

Change-Id: I60cc256a5659e72ae2e647ec4f1a810ba4aa959d
Signed-off-by: Sagar Kadamati <skadamati@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2133419
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-21 04:35:25 -07:00
Vinod G
eaae1afdae gpu: nvgpu: Fix CERT INT31-C error in gr.falcon unit 
Modify nvgpu_gr_checksum_u32 code from
(u32)(((u64)a + (u64)b) % (U32_MAX))
to nvgpu_safe_cast_u64_to_u32(((u64)a + (u64)b) & (U32_MAX)).
This function returns the last 32bits.

Jira NVGPU-3622

Change-Id: I8d348a624a5930b7ba813b0a74af270b49b03844
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2140254
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-21 01:07:42 -07:00
Seshendra Gadagottu
7ed189de44 gpu: nvgpu: fix CERT INT30-C in common.gr.falcon 
Fixed CERT C error by using nvgpu_gr_checksum_u32:
segments->boot_signature += bootimage[i]; -->
	segments->boot_signature = nvgpu_gr_checksum_u32(
				segments->boot_signature, bootimage[i]);

JIRA NVGPU-3622

Change-Id: I01de116ba2a8afacb8a93be7b88e356a48122c5a
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2132547
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-21 01:06:16 -07:00
rmylavarapu
2d66c2c928 gpu: nvgpu: Support sending VFE_EQU dependent masks to PMU 
Right now in PMU we have disabled usage of VFE cached
values as we have seen failures in 5.1.3.0 release.
This patch will send vfe_equ dependent masks to PMU which
will be used for initial invalidation of dependent VFE_EQU
cached values. As a result PMU will compute the dependent
EQUs and cache them.

NVGPU-3645

Change-Id: If99960481317a09df9499265650162245f404555
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2137867
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-20 22:59:53 -07:00
rmylavarapu
0194d8640e gpu: nvgpu: Support sending VFE_VAR dependent masks to PMU 
Right now in PMU we have disabled usage of VFE cached values
as we have seen failures in 5.1.3.0 release. This patch
will send vfe_var dependent masks to PMU which will be
used for initial invalidation of dependent VFE_VAR cached
values. As a result PMU will compute the dependent VARs and
cache them.

NVGPU-3645

Change-Id: I814ae819d77270ac45b97cf2a32726992e6f4af3
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2137423
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-20 22:58:51 -07:00
Sagar Kamble
5d37a9e489 gpu: nvgpu: compile out sim changes from safety build 
As sim is non-safe unit compile it out. Also removed FMODEL related
nvgpu changes and unit tests from the safety build.

JIRA NVGPU-3527

Change-Id: I22c83e195a09f9150fb6f5a3afff91df2ea075b9
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2139455
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Raghuram Kothakota <rkothakota@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-20 16:05:33 -07:00
Thomas Fleury
ad92d2d8cf gpu: nvgpu: Add doxygen documentation in preempt.h 
Jira NVGPU-3593

Change-Id: Ia4491e6cd123a571b528eccb23727f747895ea86
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2133849
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-20 16:05:09 -07:00
Seeta Rama Raju
3ca084ae65 gpu: nvgpu: Add safe ops func for cast s32 to u64 
JIRA NVGPU-3482

Change-Id: Iff3dd13132057d3ed89c2955c31f3e14bf6cfeda
Signed-off-by: Seeta Rama Raju <srajum@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2137505
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-20 04:14:07 -07:00
Rajesh Devaraj
29ec6ad40f gpu: nvgpu: report fb_flush_timeout error 
This patch adds the support to report fb_flush_timeout error to 3LSS.
Specifically, it adds the following service-ID:
NVGUARD_SERVICE_IGPU_HOST_SWERR_PFIFO_FB_FLUSH_TIMEOUT_ERROR

JIRA NVGPU-3460
JIRA NVGPU-3461

Change-Id: Iddf978eedbc676197a19e47e72e08cd71c478a08
Signed-off-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2138051
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Raghuram Kothakota <rkothakota@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-19 22:51:20 -07:00
Divya Singhatwaria
c341c84039 gpu: nvgpu: Fix CERT INT30-C violations in ACR 
CERT-C INT30 requires checking for wrapping when
doing arithmetic operations of unsigned value.
This fixes INT30 violations in acr.c and acr_blob_construct_v1.c

JIRA NVGPU-3575

Change-Id: Ib44cc5675f0f3af7575b1f5340c78cabe0ce67af
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2136158
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-19 03:07:48 -07:00
Deepak Nibade
0755b25231 gpu: nvgpu: remove reset and enable/disable ctxsw hals 
Remove below hals since the corresponding functions are same on all
platforms and they are h/w independent
g->ops.gr.enable_ctxsw()
g->ops.gr.disable_ctxsw()
g->ops.gr.reset()

Call the functions directly at all places

Remove CONFIG_NVGPU_DEBUGGER from places where these functions are
called since they are not debugger dependent
This also helps to disable CONFIG_NVGPU_DEBUGGER and to keep recovery
sequence intact

Jira NVGPU-3506

Change-Id: Id2b208ca23dc4667e78edcd8ad242a8558e0ff64
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2137255
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-18 01:39:20 -07:00
Deepak Nibade
10fae67c21 gpu: nvgpu: add flag for debugger fields in struct gk20a 
Add CONFIG_NVGPU_DEBUGGER flag for debugger specific fields in struct
gk20a

Jira NVGPU-3506

Change-Id: Icfae87e16e0079a2c5f16714b8a8ced7c6572cd4
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2137254
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-18 01:39:10 -07:00
Deepak Nibade
67350e2c9c gpu: nvgpu: add flags to debugger specific headers 
Add debugger/cyclestats/fecs_trace compile time flags to debugger
specific unit headers

Jira NVGPU-3506

Change-Id: Iedea5f274243a389dce91edecbc80c58753d4805
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2137253
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-18 01:38:54 -07:00
Deepak Nibade
064f7a2f13 gpu: nvgpu: add debugger flag for netlist units 
Add CONFIG_NVGPU_DEBUGGER flag for debugger specific code in
common.netlist and common.sim.netlist units

Jira NVGPU-3506

Change-Id: I616eaea58e72ff104fef11140a0daa59afe7b5fb
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2137252
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-18 01:38:39 -07:00
Deepak Nibade
27a133aa4c gpu: nvgpu: add debugger flag for common.hal.ltc unit 
Add CONFIG_NVGPU_DEBUGGER flag for debugger specific code in
common.hal.ltc unit

Jira NVGPU-3506

Change-Id: I7a330cc60ea90e6b76bd1f783bcecd649032e279
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2137251
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-18 01:38:28 -07:00
Rajesh Devaraj
ab70c2e80f gpu: nvgpu: report class/method related errors 
This patch adds support to report class/method related errors to 3LSS.
Specifically, it adds the following service ID:
NVGUARD_SERVICE_IGPU_PGRAPH_SWERR_ILLEGAL_ERROR

JIRA NVGPU-3458
JIRA NVGPU-3461

Change-Id: I9b28ed3074f664254347e059ac699470f95610b3
Signed-off-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2136301
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Raghuram Kothakota <rkothakota@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-18 01:37:43 -07:00
Sagar Kamble
b7061a3263 gpu: nvgpu: compile out changes for dgpu falcons 
SW handling of dgpu falcons GSPLITE, NVDEC, SEC2, MINION needs to be
compiled out in the igpu safety build. Also compile out gp106 falcon
and nvdec sources.

JIRA NVGPU-3539

Change-Id: If4d21cec151b6c00f944457dc6cae4f457043b04
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2137226
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-17 23:16:00 -07:00
Divya Singhatwaria
203120deed gpu: nvgpu: Fix CERTC INT31-C violations in ACR 
CERT-C INT31 requires checking before casting from
"bool" to "unsigned int", "unsigned long" to "unsigned int"
otherwise it may result in lost or misinterpreted data.
This fixes INT31 violations in acr_blob_construct_v1.c

JIRA NVGPU-3575

Change-Id: I6da67a64758974f9fd04facac358a59782168470
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2136255
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-17 22:15:35 -07:00
ajesh
b05a529219 gpu: nvgpu: Add safe ops for s64 
Add safe addition and multiplication functions for s64.

Jira NVGPU-3607

Change-Id: I8078679ee906dfcfcdab24ca221ec4e6b27e58db
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2133656
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-17 04:06:25 -07:00
Vedashree Vidwans
6f37ac5de2 gpu: nvgpu: Disable logging for safety build 
This patch adds a conditional flag to filter out logging functions from
safety release build. Logging functions are replaced with stubs.

Jira NVGPU-869

Change-Id: If898b9ce8edb260727df28b407df83f0a92f61ad
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2109509
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-17 00:16:03 -07:00
Seema Khowala
93e7bb67b5 gpu: nvgpu: Add doxygen documentation in engine_status.h 
JIRA NVGPU-3590

Change-Id: I91eb1df2b19923dd008b613e831b7143bca333d4
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2133735
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-14 11:27:58 -07:00
Seema Khowala
f3518ec5da gpu: nvgpu: Add doxygen documentation in pbdma_status.h 
JIRA NVGPU-3592

Change-Id: I8ac6d79327b2c11cf68ca052bc8f9d4fd078564a
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2131132
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-14 11:27:48 -07:00
Seema Khowala
4a2188e34e gpu: nvgpu: set channel to serviceable after it is bound to tsg 
Channel's unserviceable status should to set to false only
after channel is bound to tsg.

Bug 200460037

Change-Id: I24976c673b3b08cc652d2c203b9fc1f3aaed403f
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2135898
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-14 10:16:55 -07:00
Divya Singhatwaria
8948c91719 gpu: nvgpu: Fix MISRA violations in PMU unit 
- Rule 17.7 states that the value returned by a
  function having non-void return type shall be
  used.
- Add NVGPU_FEATURE_LS_PMU to compile out headers
  in pmu_gv11b.h to fix MISRA violation 8.6

JIRA NVGPU-3570

Change-Id: I6ab104aa72d8fd6419bd336c45e9055a40ba5a7e
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2131420
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-14 09:06:06 -07:00
Abdul Salam
7e8d0c2bb1 gpu: nvgpu: Move from TSENSE to TSOSC for TU104 
In TU104 tsense is not calibrated and tsosc needs to be used.
Tsosc is the POR for TU104.
This patch does the following
Remove the GP106 related thermal header and Add TU104 therm.
Rename the files from therm_gp106 to therm_tu104.
Update the debug fs interface to reflect the same.
Update the yaml files.

Bug 200526122

Change-Id: I73fd7d4c516426b5c6b84762480be2d6d572d5a7
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2135139
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 23:05:43 -07:00
Thomas Fleury
fcc66f9b90 gpu: nvgpu: Add doxygen documentation in pbdma.h 
Add doxygen documentations in pbdma.h and also take
care of setting pbdma_id to invalid value in case of
failure in nvgpu_pbdma_find_for_runlist.

Jira NVGPU-3591

Change-Id: I7aa7d55442cc7585c08fd6a54411cb22bc06ba30
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2131913
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 15:34:57 -07:00
Seshendra Gadagottu
344eceb739 gpu: nvgpu: fix CERT-C issues in ltc intr driver 
Use nvgpu_safe_add_u32 for u32 additions in ltc interrupt
driver.

JIRA NVGPU-3623

Change-Id: If4d1b126836c5980e7016ed42b588b435f4f7f66
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2135322
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 13:15:27 -07:00
Vinod G
c85d4c9e7f gpu: nvgpu: remove ZBC_STENCIL support for safety build 
Add CONFIG_NVGPU_GRAPHICS flag to enable the NVGPU_SUPPORT_ZBC_STENCIL
support.

Jira NVGPU-3580

Change-Id: I630430d5f2cca4a1230bdfe99e46346573030232
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2135369
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 12:07:22 -07:00
Deepak Nibade
a3d30adab2 gpu: nvgpu: add debugger flag for fb units 
Add CONFIG_NVGPU_DEBUGGER flag for debugger specific code in
common.hal.fb unit

Jira NVGPU-3506

Change-Id: If459e623e73ce716088d9cb92c31864c26fe0d3d
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2132260
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 12:06:30 -07:00
Deepak Nibade
1112af9f8c gpu: nvgpu: add flag for global fecs trace buffer index 
Add compile time flag check CONFIG_NVGPU_FECS_TRACE for
NVGPU_GR_GLOBAL_CTX_FECS_TRACE_BUFFER

Also add the flag check for setting NVGPU_FECS_TRACE_* characteristics
flag

Jira NVGPU-3506

Change-Id: I57f1538c852834b9be075a7b56b79fd699c04024
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2132259
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 12:06:14 -07:00
Deepak Nibade
436549b9bf gpu: nvgpu: add cilp flag for CILP support 
Add CONFIG_NVGPU_CILP flag for CILP support across all the units

Jira NVGPU-3506

Change-Id: I0c71d38f9db6f00599a5070a8cb9d75d5b5fc351
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2132258
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 12:05:59 -07:00
Deepak Nibade
4ac27a24bb gpu: nvgpu: add debugger flag for gr.utils unit 
Add CONFIG_NVGPU_DEBUGGER flag for debugger specific code in
common.gr.utils unit.

Jira NVGPU-3506

Change-Id: Iea551df287e06602949b3c2c33ebe565f0a0c921
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2132257
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 12:05:44 -07:00
Deepak Nibade
6ac3fc30c7 gpu: nvgpu: add debugger flag for gr.ctx unit 
Add CONFIG_NVGPU_DEBUGGER flag for debugger specific code in
common.gr.ctx unit.

Jira NVGPU-3506

Change-Id: I42becd6404eb12b39dca7815849425128e7e42d8
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2132256
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 12:05:34 -07:00
Deepak Nibade
1792e6b820 gpu: nvgpu: add debugger flag for gr.global_ctx unit 
Add CONFIG_NVGPU_DEBUGGER flag for debugger specific code in
common.gr.global_ctx unit.

Jira NVGPU-3506

Change-Id: I9baf468c17b9c6a2a64275ac191242fa8e01b0e1
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2132255
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 12:05:24 -07:00
Deepak Nibade
1239bf67a5 gpu: nvgpu: add debugger flag for hal.gr.ctxsw_prog unit 
Add CONFIG_NVGPU_DEBUGGER flag for debugger specific code in
hal.gr.ctxsw_prog unit
Also add this flag for PM context allocation/free

Jira NVGPU-3506

Change-Id: Ib40569c7617b8b8aa3343fc89f3d8f30b1d21aa6
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2132254
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 12:05:14 -07:00
Sagar Kamble
556ddaf9a3 gpu: nvgpu: add support for removing comptags and cbc from safety build 
Safety build does not support compression. This patch adds support to
compile out compression related changes - comptags, cbc.

JIRA NVGPU-3532

Change-Id: I20e4ca7df46ceec175b903a6a62dff141140e787
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2125473
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 10:55:27 -07:00
Deepak Nibade
840972c1cc gpu: nvgpu: update TU104 regops whitelist 
List of whitelisted registers is auto generated with script

Bug 200526741

Change-Id: I097f4638ce9c1498ae09cfea2dbc7386fc5e0004
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2135669
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 09:35:55 -07:00
Abdul Salam
ebeeec68ed gpu: nvgpu: Add support to query dgpu max freq 
Implement get_maxrate for TU104.
This function will use the clk_arb to get the P0 Max from VBIOS.

Bug 2610308

Change-Id: I09c692676bf949f300c9edd00f4faa26118b124f
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2133427
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 07:39:59 -07:00
Shashank Singh
627a933da5 gpu: nvgpu: Unify posix sort unit with qnx 
-Unify sort function with qnx as qsort is posix compliant.
-Update yaml accordingly.

Jira NVGPU-3625

Change-Id: I982570bccb3bc8720596bfacf48eb17a0fca2ddf
Signed-off-by: Shashank Singh <shashsingh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2134355
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 06:42:07 -07:00
Kary Jin
03db4f8f33 gpu: nvgpu: add check for "vm->num_user_mapped_buffers" 
The "nvgpu_big_zalloc()" will be failed if the passed-in argument
"vm->num_user_mapped_buffers" is zero. The returned value is 16
which will bypass the NULL-check and then causes the panic.

This patch adds a check on the "vm->num_user_mapped_buffers" to
avoid the zero is passed-in the "nvgpu_big_zalloc()".

Bug 2603292

Change-Id: I399eecf72a288e13992730651a34a6cea1ef56d1
Signed-off-by: Kary Jin <karyj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2123499
(cherry picked from commit fea9e05454)
Reviewed-on: https://git-master.nvidia.com/r/2130001
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-13 01:56:02 -07:00
Seshendra Gadagottu
5943f5fc9d gpu: nvgpu: fix CERT EXP34-C in common.gr.falcon 
Fixed CERT EXP34-C error in gr_falcon driver by checking for valid
nvgpu_firmware pointer, before calling nvgpu_release_firmware.

JIRA NVGPU-3622

Change-Id: Ief4973ce4b73aa5348460632693d18e6104eda47
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2134674
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-12 22:19:11 -07:00
Seshendra Gadagottu
b2ed105fe5 gpu: nvgpu: fix CERT-C errors in common.gr.falcon 
Used nvgpu_safe_mult_u32 function for u32 multiplications to avoid
CERT INT 30-C errors.

JIRA NVGPU-3622

Change-Id: Id945910a586c00be0f0cdad941b17023db66b23b
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2134621
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-12 22:18:55 -07:00
Vinod G
6110bcf586 gpu: nvgpu: Fix MISRA 17.7 errors in gr.intr unit 
Fix MISRA 17.7 errors in gr.intr unit
misra_c_2012_rule_17_7_violation: The return value of a non-void
function is unused.

Jira NVGPU-3621

Change-Id: I7b03b8165a628decce66bf886625fe001db76a01
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2134530
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-12 20:56:57 -07:00
Vinod G
448eed1da6 gpu: nvgpu: Fix MISRA 21.1 error in defaults.h 
Fix MISRA 21.1 error in defaults.h
misra_c_2012_rule_21_1_violation: Defining or
undefining a reserved name.

Jira NVGPU-3621

Change-Id: I6f15a260c5f72fa9401147e97904ee462965e141
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2134617
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-12 16:17:15 -07:00
Vinod G
a9fce07d11 gpu: nvgpu: Fix MISRA 13.2 errors in hal.gr.intr 
Fix MISRA 13.2 errors in hal.gr.intr unit.
misra_c_2012_rule_13_2_voilation: In hi32_lo32_to_u64, two function
calls in the arguments for which the order of evaluation is undefined.

Jira NVGPU-3621

Change-Id: I2c0d9a4492068f13edfb6ac6309f8679d1fbcee4
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2134597
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-06-12 16:17:06 -07:00