The BIOS_GET_FIELD() macro does a simple bit mask and shift operation.
The value of this macro is assigned to variables of different data
types. Casting the macro to different data types causes MISRA rule
10.8 violations. This issue is resolved by doing the cast inside the
macro and returning the value in the correct data type. These changes
also clear MISRA rule 10.1, 10.3 and 10.4 violations.
JIRA NVGPU-992
JIRA NVGPU-1006
JIRA NVGPU-1010
Change-Id: I16345865d107f0ff0b34daa8b17d7d576eafcfbf
Signed-off-by: Sai Nikhil <snikhil@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1936357
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
gk20a.h depends on definition of struct clk_pmupstate. Change that
to a pointer and use forward declaration, and allocation and free
functions.
Fix a few build breaks by adding explicit includes where previously
a header file had gotten included implicitly.
JIRA NVGPU-596
Change-Id: Iafe7d72a6fd31543653e0e10e2d2e552b6c3514b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1945286
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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MISRA rule 14.4 doesn't allow the usage of integer types as booleans
in the controlling expression of an if statement or an iteration
statement.
Fix violations where the integer variables err, ret, status are used
as booleans in the controlling expression of if and loop statements.
JIRA NVGPU-1019
Change-Id: I36494e84ee6cd4a108e2a539f48f102e47e2f7f4
Signed-off-by: Amurthyreddy <amurthyreddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1926820
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
pmuif structures refer to the ctrl structures, so that means that ctrl
structures are part of the pmuif. Move the headers to the right place
and update all include statements to include from the right place.
JIRA NVGPU-596
Change-Id: I7be1a727be654d58eccd0e12d599979687dd0733
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1934022
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Add nvgpu_memcpy/nvgpu_memcmp which are MISRA-compliant versions
(Rule 21.15) of memcpy/memcmp.
Also convert some clk/gr calls over to use the new routines;
all of the remaining calls will be converted in subsequent patches.
JIRA NVGPU-849
Change-Id: Ib3a602cd08886764ba9a50285462a8b07bfb18ba
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1919470
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This is a big cleanup of return types across a number of modules in the
nvgpu driver. Many functions were returning u32 but using negative
return codes. This is a MISRA 10.3 violation by assigning signed values
to a u32.
JIRA NVGPU-647
Change-Id: I59ee66706321f5b5b1a07ed8c24b81583e9ba28c
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1810743
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MISRA Rule 10.3 states that the value of an expression shall not be
assigned to an object with a narrower essential type or of a
different essential type category.
We have cases where we are converting to/from char and non char types
and this fix 10.3 violations resulting from these conversions.
This also fix violations in conversions between s8 and non-s8 types
as s8 can be typedefed as char.
Jira NVGPU-1010
Change-Id: I150dd633eb7575de9ea2bedd598b7af74d1fcbd9
Signed-off-by: Sai Nikhil <snikhil@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1801613
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
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Move implementation of fuse HAL to common/fuse. Also implements new
fuse query functions for FBIO, FBP, TPC floorsweeping and security
fuses.
JIRA NVGPU-957
Change-Id: I55e256a4f1b59d50a721d4942907f70dc57467c4
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1797177
In the current code, gk20a.h includes io.h which gets directly included
in a lot of other files. io.h contains methods which uses a struct
gk20a as a parameter leading to a circular dependency between io.h
and gk20a.h. This can be mitigated by removing io.h from gk20a.h as
part of larger effort to moving gk20a.h to nvgpu/gk20a.h
JIRA NVGPU-597
Change-Id: I93e504fa9371b88152737b342a75580c65e8f712
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1787316
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Switch all logging to nvgpu_log*(). gk20a_dbg* macros are
intentionally left there because of use from other repositories.
Because the new functions do not work without a pointer to struct
gk20a, and piping it just for logging is excessive, some log messages
are deleted.
Change-Id: I00e22e75fe4596a330bb0282ab4774b3639ee31e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1704148
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clk_vin data structures updated as new calibration type (v20) is added.
GP106 header does not have vin calibration type.
Assuming V10 if calibration type is not V20.
Add fuse calibration for V20 type.
Bug 200399373
Change-Id: I9449de1ecb0d0873f3bc16f46660f93fab5b9eac
Signed-off-by: Vaikundanathan S <vaikuns@nvidia.com>
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1687591
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- Renamed "struct pmu_gk20a" to "struct nvgpu_pmu" then moved
to file "pmu.h" under folder "drivers/gpu/nvgpu/include/nvgpu/"
- Included header file "pmu.h" to dependent file &
removed "pmu_gk20a.h" include if its usage is not present.
- Replaced "struct pmu_gk20a" with "struct nvgpu_pmu" in dependent
source & header files.
JIRA NVGPU-56
Change-Id: Ia3c606616831027093d5c216959c6a40d7c2632e
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1479209
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gk20a_err() and gk20a_warn() require a struct device pointer,
which is not portable across operating systems. The new nvgpu_err()
and nvgpu_warn() macros take struct gk20a pointer. Convert code
to use the more portable macros.
JIRA NVGPU-16
Change-Id: I58bb9e2fb7e5b18f74fbb92b70150cce97968fc3
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1457347
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Most of BIOS parsing code is not specific to any particular GPU. Move
most of the code to generic files, and leave only chip specific parts
dealing with microcontroller boot into chip specific files.
As most of the parsing is generic, they do not need to be called via
HALs so remove the HALs and change the calls into direct function
calls.
All definitions meant to be used outside BIOS code itself are now in
<nvgpu/bios.h>
Change-Id: Id48e94c74511d6e95645e90e5bba5c12ef8da45d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1302222
GVS: Gerrit_Virtual_Submit
Moved pmuif/* headers to drivers/gpu/nvgpu/include/nvgpu folder
to support cross platform feature implementation.
Made changes to files which accessed include pmuif/* to reflect
pmuif/* movement changes.
Deleted includes of gk20a.h/pmu_gk20a.h from pmuif/*.h files.
Jira NVGPU-19
Change-Id: Iace4e107c24bdaff08a407eae3b147959173e485
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1299823
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Hardware headers have been outdated. Regenerate with newest tool.
At the same time correct the incorrect usage of fuse fields.
JIRA DNVGPU-172
Change-Id: If190bf0cf2e41d525e6ea374a30efd1f63963e5e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1294267
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Move the gp106 HW headers to a new directory specially for them:
include/nvgpu/hw/gp106
And change the code to include like so:
#include <nvgpu/hw/gp106/hw_fb_gp106.h>
This is part of the process to restructure the nvgpu driver.
Bug 1799159
Change-Id: I76a4ff2e92021150ce65a8843bc12bb614a0e68a
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1280327
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
We retrieve perf table from VBIOS only if respective HAL op is
implemented. Later in code we unconditionally dereference the pointer
which can lead to NULL pointer access.
Fix by early aborting creation of devinit tables if the perf VBIOS
getter is missing.
Change-Id: If48aa6dac724056dd1feb2ef520e343736d4db85
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1279223
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
