Updated following hal functions for css gv11b and reused
them for gv100:
enable_snapshot
disable_snapshot
check_data_available
These changes are needed because of following reasons:
1. Register offsets for perf_pmasys_* are changed
for gv11b/gv100 from gk20a.
2. Updated memory type for perf_pmasys_mem_block_target
based on memory aperture used for hwpm inst_block.
Bug 200327596
Change-Id: I500d17670e2f389d8d0e77884374bcc3504a41f8
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1507546
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
SMID tables were generated according with the local tpc and the pagepool and cb
buffers from a different chip and did not take performance in consideration,
which made compute kernels hang with CTAs on the fly.
This change ensures we are using the right sizes and adds proper enumeration
of smids.
JIRA: NVGPUGV100-36
bug 2004378
Change-Id: Ic8f50c325d6d6720cca41d9740ae4f5f51e1100a
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1581664
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Change required for equivalent change on nvgpu. This is required
since a few HALs were added that must be populated for all chips.
This patch adds those HAL definitions for gv11b, gv100, and the
vgpu.
JIRA NVGPU-30
JIRA NVGPU-138
Change-Id: I65374764350a5cacce8624b15d98947fada35a4a
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1579865
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Updated following hal functions for gv11b and reused
them for gv100:
perfbuffer_enable
perfbuffer_disable
These changes are needed because of following reasons:
1. Register offsets for perf_pmasys_* are changed
for gv11b/gv100 from gk20a.
2. Updated memory type for perf_pmasys_mem_block_target
to sys_ncoh_f().
Bug 200327596
Change-Id: Ia672ac561917c8ed36caea9cc7e74b7fc7ce8188
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1571074
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
These changes allow GV100 to init the basic HALs to pass
nvgpu_submit_twod
(1) Allocate fault buffer from vidmem instead of sysmem to prevent coherency
issues
(2) Properly enable FB
(3) Fan control requires the execution of the pre-os FW, without it the SKU201
is extremely noisy
JIRA: NVGPUGV100-9
Change-Id: I9b2072737e45432f957e7faae6d33bc0ab43b817
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1539926
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
We right now call gk20a_fifo_tsg_unbind_channel_verify_status() to verify
channel status while unbinding a channel from TSG while closing
Add support to do this verification per-platform and keep this disabled
for vgpu platforms
Bug 200327095
Change-Id: I6e2a6a09c784d24ac49477d5450b7d4b671878e3
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1572369
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Add new API gv11b_fifo_tsg_verify_status_faulted() and use that as
g->ops.fifo.tsg_verify_status_faulted operation for gv11b/gv100
This API will check if channel has ENG_FAULTED status set, if yes it will clear
CE method buffer in case saved out channel is same as faulted channel
We need to write 0 to method count to invalidate CE method buffer
Also set g->ops.fifo.tsg_verify_status_ctx_reload operation for gv11b/gv100
Bug 200327095
Change-Id: I9d2b0f13faf881b30680219bbcadfd4969c4dff6
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1560643
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Add TSG enable/disable operations for gv11b/gv100
To disable a TSG we continue to use gk20a_disable_tsg()
To enable a TSG add new API gv11b_fifo_enable_tsg() since TSG enable sequence is
different for Volta than previous versions
For Volta it is sufficient to loop over all the channels in TSG and enable them
sequentially
Bug 1739362
Change-Id: Id4b4684959204c6101ceda83487a41fbfcba8b5f
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1560642
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the
gr sub-module of the gpu_ops struct.
Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.
Jira NVGPU-74
Change-Id: I8feaa95a9830969221f7ac70a5ef61cdf25094c3
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1542988
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the
pmu sub-module of the gpu_ops struct.
Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.
Jira NVGPU-74
Change-Id: I3f8a763a7bebf201c2242eecde7ff998aad07d0a
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1530983
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the
mm sub-module of the gpu_ops struct.
Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.
Jira NVGPU-74
Change-Id: I5fd295c6473d5b4a6178c0c6be8fcf8f4c33f2e3
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1537754
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the
fb sub-module of the gpu_ops struct.
Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.
Jira NVGPU-74
Change-Id: I3fdbf6059ef664caf8d33797a8a5f3f8eb6485bf
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1537748
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
