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Author SHA1 Message Date
Vedashree Vidwans
f46c3064ed gpu: nvgpu: unit: mm: add coverage & traceability 
This patch adds new tests to improve test coverage. Also, updating test
target tags to increase traceability.

Jira NVGPU-4780

Change-Id: I87341efa3fa7d741f7abb611ff28ad6d5e1c6880
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279644
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 2020-12-15 14:10:29 -06:00
ajesh
4bcd419a0b gpu: nvgpu: add unit tests for utils unit 
Add unit tests for posix utils unit.

Jira NVGPU-4478

Change-Id: I426e2b8cc7ed508f4e66db3796ab21eb3ce3e85f
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2282760
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 2020-12-15 14:10:29 -06:00
Divya Singhatwaria
4b0499498b gpu: nvgpu: Unit tests for common.hal.pmu.pmu 
Updating the test case to cover the
following ECC API:
- gv11b_pmu_ecc_init()

Also, since g->ops.pmu.secured_pmu_start is
called from nvgpu_pmu_rtos_init() (non-safe code)
so moved gv11b_secured_pmu_start() function under
CONFIG_NVGPU_LS_PMU flag

JIRA NVGPU-2192

Change-Id: Ia8d0386e81010b21b40437654c1f1667a450e060
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2274227
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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 2020-12-15 14:10:29 -06:00
shashank singh
d34bad0a27 nvgpu: gpu: simplify waiting logic for interrupt handler 
The atomic counter in interrupt handler can overflow and result in
calling of BUG() which will crash the process. The equivalent
functionality can be implemented with just setting an atomic variable at
start of handler and resetting at end of handler. The wait can be longer
in case there is constant interrupts coming but ultimately it will end.
Generally the wait path is not time critical so it should not be an
issue. Also, fix the unit tests for mc.

Change-Id: I9b8a236f72e057e89a969d2e98d4d3f9be81b379
Signed-off-by: shashank singh <shashsingh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2247819
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 2020-12-15 14:10:29 -06:00
Antony Clince Alex
bd5604bba7 nvgpu: userspace: make channel-devctl visible to SWUTS 
Add reference link to channel-devctl in SWUTS.

Fix unresolved merge conflict which managed to sneak into the branch.

Jira: NVGPU-4827

Change-Id: I99ba52603412ad3d4cb467e1dbdd6bbc5b31c344
Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2282371
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 2020-12-15 14:10:29 -06:00
vinodg
7f73c5fc20 gpu: nvgpu: add missing gops_gr hal to target section. 
Add missing gops_gr_setup, gops_gr_init, obj_ctx, global_ctx,
fs_state, gops_gr_falcon hal function  to the the target section.
Remove # from the target function name to keep consistency.

Jira NVGPU-4888

Change-Id: Ife9f2435d0e52cec490cfdf1809cc86809832cf2
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280202
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Thomas Fleury
d5833d1b8e gpu: nvgpu: add BUG callbacks to SW quiesce 
After initializing support for SW quiesce, register
callback to be invoked in case of BUG().

The callback will invoke nvgpu_sw_quiesce with "g" parameter.

Jira NVGPU-4512

Change-Id: Id6bd73268d832e003cf66534bd0cbaa4b1f32a6c
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2283011
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 2020-12-15 14:10:29 -06:00
smadhavan
a46abe4d64 gpu: nvgpu: Reduce ACR timeout wait to 100msec 
10s wait for ACR timeout is longer than time allowed for
entire GPU boot sequence. Hence we need to reduce it.

This patch reduces ACR timeout wait period to 100msec
for silicon platforms and retains the existing 10s for
non silicon.

JIRA NVGPU-4898

Change-Id: I29e58b34f09ed595336bf833ed6db13553794827
Signed-off-by: smadhavan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2282857
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 2020-12-15 14:10:29 -06:00
vinodg
2ea4dfb5c7 gpu: nvgpu: add gr.falcon hal function to target section 
Add gr.falcon hal functions being used from gr.falcon
unit test to the target section.

Jira NVGPU-4888

Change-Id: Id90ac8babfae95805421e4b9aded6a055e10e85b
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280795
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
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 2020-12-15 14:10:29 -06:00
vinodg
0003c7d13e gpu: nvgpu: add gr.config hal functions to target section 
Add gr.config hal functions to target section
Remove # from function names in target section

Jira NVGPU-4888

Change-Id: Ia8d8e91e731ad477ec330d79af69f60c0990fa70
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280794
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
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 2020-12-15 14:10:29 -06:00
vinodg
d0a029eadf gpu: nvgpu: add missing gr.falcon hal header to SWUTS 
add nvgpu-gr-falcon-gk20a.h to the SWUTS sources.

Jira NVGPU-4888

Change-Id: I4b407a5321ea67b3edcec7df7f3c07eb1e81c395
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280793
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 2020-12-15 14:10:29 -06:00
Thomas Fleury
e0a6000456 gpu: nvgpu: update SW quiesce 
Update SW quiesce as follows:
- After waking up sw_quiesce_thread, nvgpu_sw_quiesce
  masks interrupts, then disables and preempts runlists
  without lock. There could be still a concurrent thread
  that would re-enable the runlist by accident. This is
  very unlikely and would mean we are not in mission mode
  anyway.
- In sw_quiesce_thread, wait NVGPU_SW_QUIESCE_TIMEOUT_MS,
  to leave some time for interrupt handler to set error
  notifier (in case of HW error interrupt). Then disable
  and preempt runlists, and set error notifier for remaining
  channels before exiting the process.

Also modified nvgpu_can_busy to return false in case
SW quiesce is pending. This will make subsequent
devctl to fail.

Jira NVGPU-4512

Change-Id: I36dd554485f3b9b08f740f352f737ac4baa28746
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2266389
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 2020-12-15 14:10:29 -06:00
ajesh
fbafc9e05c gpu: nvgpu: units: swuts: Update SWUTS details 
Update Posix SWUTS with following additions
 - Add os_sched unit
 - Add rwsem unit
 - Modify the details for bitops unit

Jira NVGPU-4478

Change-Id: I196ce05f01a51d8a773f87f3e5446eda19e6a861
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2282304
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 2020-12-15 14:10:29 -06:00
ajesh
97718da708 gpu: nvgpu: add test for bug unit 
Add a new test for warn message functionality as part of bug UT.

Jira NVGPU-4478

Change-Id: I2a250e4f6dc6946027e995ec3f340bb113c60f58
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2281019
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 2020-12-15 14:10:29 -06:00
ajesh
bfef02181a gpu: nvpgu: whitelist Rule 10.3 and Rule 17.7 
Whitelist the violations of Rule 10.3 in atomic unit as
deviate.
Whitelist the violations of Rule 17.7 in atomic unit as
false positives.

Jira TID-374
Bug 2793032

Change-Id: I0c01d2100e7402f69b97ca1635b90da839ff730f
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2278812
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Rajesh Devaraj
e3bbc86805 gpu: nvgpu: add error injection support 
This patch adds error injection support for nvgpu_cond_broadcast().

JIRA NVGPU-2694

Change-Id: I2dc9c902b29db094d42bd16cd149e6a6eb5fbae9
Signed-off-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2278408
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 2020-12-15 14:10:29 -06:00
Vedashree Vidwans
2fb56f2cea gpu: nvgpu: add bvec check for common.fifo input 
This patch adds boundary value check for common.fifo parameters as
listed below.
1. nvgpu_channel_setup_bind() includes a condition to check that value
of num_gpfifo_entries does not exceed 2^31. Otherwise prints message and
returns error.
2. nvgpu_tsg_bind_channel() includes a condition to check if channel
subctx had ASYNC id. If true, runqueue selector is set to 1 and 0
otherwise. This check is to be moved from devctl to common.fifo.

Jira NVGPU-4817

Change-Id: Id1c9253945859c245e584b5c42b3285a6b620055
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2278613
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 2020-12-15 14:10:29 -06:00
vinodg
df7631efc8 gpu: nvgpu: correct the gr.config unit test for invalid pes 
Remove changing the gpc_count to 2. This could result in memory
access error for struct whose allocation happens during init call.
For igpu, no need to check for higher gpc_count.

Jira NVGPU-4531

Change-Id: I48ad60b083d91fd2f8a673fb8fabbe48e171912e
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280706
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Philip Elcan
9aecc444c8 gpu: nvgpu: unit: add SWUTS-intr group 
Add SWUTS-intr group to overall SWUTS group.

JIRA NVGPU-4818

Change-Id: I974e5dd2c001f67844c2fe104ce8854a118a4ee2
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280643
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 2020-12-15 14:10:29 -06:00
Philip Elcan
919d6c13cb gpu: nvgpu: ltc: hide HAL from doxygen 
The HAL gops_ltc.init_fs_state is private to the common.ltc unit, thus
the gv11b implementation gv11b_ltc_init_fs_state is private. So, hide it
from doxygen to cleanup SWVR traceability.

JIRA NVGPU-4818

Change-Id: I141d89e6e4859fb9dd554a2943a39939e6461084
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280642
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Philip Elcan
24d20485a5 gpu: nvgpu: init: cleanup traceability 
nvgpu_init_hal is private to the common.init unit in the driver, used
only by nvgpu_detect_chip. However, it is used extensively by the unit
tests, so it can't be static. So, hide it from doxygen, so it is not
included in SWVR traceability.

Add missing target APIs in SWUTS for init UTs.

JIRA NVGPU-4818

Change-Id: I4d8acf29e9cbafdfd26d7088f98974da3b12a8ba
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280641
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Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Philip Elcan
2b86f65477 gpu: nvgpu: mc: cleanup SWVR traceability 
Cleanup issues with traceability for common.mc:
- Move these declarations under macros or @cond as they are either
  non-fusa or private functions to the unit:
  - gm20b_mc_is_enabled
  - mc_gp10b_log_pending_intrs
  - mc_gp10b_ltc_isr
  - gv11b_mc_is_intr_hub_pending
- Fix typo in SWUTS for gv11b_mc_is_stall_and_eng_intr_pending

JIRA NVGPU-4818

Change-Id: I53a332627772e4d793430159ac1924c8f9ce8c1c
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280640
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 2020-12-15 14:10:29 -06:00
Philip Elcan
e195c05bcf gpu: nvgpu: unit: ce: add missing target 
Add missing target for gp10b_ce_stall_isr since it is called directly by
gv11b_ce_stall_isr.

JIRA NVGPU-4818

Change-Id: If9bc17335333cb4cbec56e60168e0fa22663a22c
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280639
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 2020-12-15 14:10:29 -06:00
Philip Elcan
b9c8436f2f gpu: nvgpu: fuse: move non-fusa gop out of doxygen 
Move the non-fusa HAL fuse_status_opt_gpc out into the section ignored
by doxygen to cleanup traceability in SWVR.

JIRA NVGPU-4818

Change-Id: Ia0e8e3a9d005b19cb14dae26422c7ffd02afe30d
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280638
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Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
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 2020-12-15 14:10:29 -06:00
ajesh
e7f55f668d gpu: nvgpu: unit: swuts: add posix bug 
Add posix bug unit to SWUTS.

Jira NVGPU-4478

Change-Id: I37fb087952414d1083b268ad2bbf38def40ef189
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280348
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 2020-12-15 14:10:29 -06:00
vinodg
aaba7ab960 gpu: nvgpu: compile out unused call from gops_gr 
wait_initialized is already under CONFIG_NVGPU_HAL_NON_FUSA
checking, add the checking in gops_gr.h to avoid the
function to show in doxygen comment

Jira NVGPU-4888

Change-Id: If80e7505959e7087140151224986837e79a47e6f
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280205
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 2020-12-15 14:10:29 -06:00
Petlozu Pravareshwar
b4029e9bfa gpu: nvgpu: posix: Make queue.c as a safe file 
Make Queue.c as a safe file in YAML because Queue.c file APIs
are used by SDL unit.

JIRA NVGPU-2679

Change-Id: Ia1a69e0f09addf70dfedb52516ceb7642bd35c6e
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280026
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Deepak Nibade
e4c9ab22f5 gpu: nvgpu: unit: mark boundary value tests for common.gr 
Add "Boundary value" to test type for below tests:
test_gr_setup_alloc_obj_ctx_error_injections
test_gr_setup_preemption_mode_errors

Also add a test to verify passing graphics class to alloc_obj_ctx
HAL fails.

Jira NVGPU-4843

Change-Id: I0c256c2fcff98e81bfdcf80c6e0edb66d3831c31
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279973
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:10:29 -06:00
Nitin Kumbhar
11b7e12b7d gpu: nvgpu: posix: whitelist built-in atomic ops certc violations 
Whitelist the following CERT-C INT31-C, DCL37-C and EXP47-C violations
from atomic.h reported due to an issue in the Coverity scanner tool
(version 2019.06).

Violations:
1. cert_int31_c_violation: Casting "__atomic_fetch_sub_4(&v->v, i, 5)"
 from "unsigned int" to "int" without checking its value may result in
 lost or misinterpreted data.
2. cert_int31_c_violation: Casting "i" from "int" to "unsigned int"
 without checking its value may result in lost or misinterpreted data.
3. cert_exp37_c_violation: Calling function "__atomic_fetch_add_4(void
 volatile *, unsigned int, int)" with the argument "i", which has an
 incompatible type "int" instead of "unsigned int".
4. cert_dcl37_c_violation: The reserved identifier "__atomic_load_ptr",
 which is reserved for use as identifiers with file scope in both
 the ordinary and tag name spaces, is declared.

Bug 200584380
JIRA NVGPU-4480

Change-Id: I9eebcca734f7081f9ca759c955e50a777e1ff25a
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279933
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Ajesh K V <akv@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Deepak Nibade
6acd7924c5 gpu: nvgpu: unit: add UT for gops.gr.init.commit_global_bundle_cb 
Add a code coverage test for HAL function exposed by common.gr.init
subunit :
g->ops.gr.init.commit_global_bundle_cb

Jira NVGPU-4778

Change-Id: Ibd8bd8513c63e6d5a6734a4ccc6744861de9e5e2
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279900
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:10:29 -06:00
Deepak Nibade
a0dede3a85 gpu: nvgpu: unit: add negative coverage with tpc_count set to 0 
Add negative testing coverage for below functions by setting tpc_count
to 0.

g->ops.gr.init.get_attrib_cb_size
g->ops.gr.init.get_alpha_cb_size

Jira NVGPU-4778

Change-Id: I105888b20bee2a991d35dc17f17854d22085a67a
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279899
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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GVS: Gerrit_Virtual_Submit
 2020-12-15 14:10:29 -06:00
Deepak Nibade
340f35d76e gpu: nvgpu: remove unnecessary asserts in common.gr hal subunits 
Below functions in common.gr hal subunits include unnecessary
asserts to ensure value is not truncated when parsing into U32 size.

gm20b_gr_init_commit_global_attrib_cb()
gp10b_gr_init_commit_global_bundle_cb()
gp10b_gr_init_commit_global_pagepool()
gv11b_gr_init_commit_global_attrib_cb()

Make use of nvgpu_safe_cast_u64_to_u32() and remove unnecessary
asserts

gp10b_gr_init_commit_global_bundle_cb() function checks if size <=
U32_MAX value. But since size is declared as u32, it will always be
<= U32_MAX value so there is no point in the check.
Remove unnecessary check.

Jira NVGPU-4778

Change-Id: I9562afd1b31c3c6b095f607cbdf725d33d87effb
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279898
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:10:29 -06:00
tkudav
b85c8b2b7c gpu: nvgpu: change test names to unique identifier 
Use a unique identifier to avoid below errors in SWVS:
Warning doxygenfunction: Unable to resolve multiple matches for
function 'test_xxx' with arguments () in doxygen xml output for
project 'nvgpu_doxygen'...

JIRA NVGPU-4679

Change-Id: Ifb310381fcc47c6e7ce41bd8789abc173f8380dc
Signed-off-by: tkudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279842
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Philip Elcan
cdaa77c40c gpu: nvgpu: unit: add bit-utils test 
Add test for common.utils.bit-utils.

JIRA NVGPU-4818

Change-Id: Ibb07d01fdf312e661bba76fe3c09b69424b62420
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279609
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Deepak Nibade
4e2c1c3ca4 gpu: nvgpu: unit: initialize variables in gr_init_error_injections 
Some boolean variables in gr_init_error_injections are not initialized
and assigned random value. That causes code coverage miss with
Vectorcast. Initialize all the boolean flags appropriately.

Also initialize falcon and intr local variables in the beginning of
function to avoid compile time warnings

Jira NVGPU-4778

Change-Id: I2d5a965a8715b590b29e2c153e825cb4ddb5ece0
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280503
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Deepak Nibade
755f0c7e96 gpu: nvgpu: unit: add UT to trigger patch write with NULL ctx pointer 
Add new unit test to trigger context patch write with NULL context
pointer

Jira NVGPU-4778

Change-Id: Iea0366e9b12dbf3abbd8c9b4a1ebd29be5961516
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280502
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Thomas Fleury
bdaa8519d5 gpu: nvgpu: unit: improve coverage for gv11b tsg HAL 
Add test for the following HAL:
- gv11b_tsg_enable

Jira NVGPU-4890

Change-Id: Ia79be676098e18ca71f6f9983485bf107c15f37c
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280135
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Thomas Fleury
45a6b873d2 gpu: nvgpu: unit: traceability for fifo 
Fix 'Targets:' statements and/or add explicit tests for:
- gops_fifo.fifo_init_support
- gops_fifo.fifo_suspend
- gv11b_tsg_unbind_channel_check_eng_faulted
- nvgpu_tsg_from_ch
- nvgpu_tsg_alloc_sm_error_states_mem
- nvgpu_tsg_cleanup_sw
- nvgpu_tsg_set_error_notifier
- nvgpu_tsg_enable_sched
- nvgpu_tsg_default_timeslice_us
- nvgpu_tsg_get_from_id
- nvgpu_tsg_disable_sched
- nvgpu_tsg_release_common
- nvgpu_tsg_check_and_get_from_id
- nvgpu_tsg_open_common
- gv11b_pbdma_config_userd_writeback_enable
- gv11b_tsg_deinit_eng_method_buffers

Jira NVGPU-4890

Change-Id: I298b9f18318105cee8dc882767e30729e7106ccc
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280134
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Thomas Fleury
55510f266d gpu: nvgpu: unit: improve coverage for engines 
Improve branch coverage for the following functions:
- nvgpu_engine_get_active_eng_info
- nvgpu_engine_get_ids
- nvgpu_ce_engine_interrupt_mask
- nvgpu_engine_get_gr_runlist_id

Add unit tests for the following functions:
-_nvgpu_engine_get_fast_ce_runlist_id
- nvgpu_engine_is_valid_runlist_id
- nvgpu_engine_id_to_mmu_fault_id
- nvgpu_engine_mmu_fault_id_to_engine_id
- nvgpu_engine_get_mask_on_id
- nvgpu_engine_get_id_and_type
- nvgpu_engine_find_busy_doing_ctxsw
- nvgpu_engine_get_runlist_busy_engines
- nvgpu_engine_mmu_fault_id_to_veid
- nvgpu_engine_mmu_fault_id_to_eng_id_and_veid
- nvgpu_engine_mmu_fault_id_to_eng_ve_pbdma_id

Jira NVGPU-4511

Change-Id: Ib340df17468ff3447e271a86af9a47a067f6ad11
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2262222
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Thomas Fleury
45b99f67b2 gpu: nvgpu: remove dead code for runlist_id check 
nvgpu_engine_is_valid_runlist_id already iterates the list of
active engines, therefore the engine_id is already known to
be valid.

Remove call to nvgpu_engine_get_active_eng_info (which iterates
all engines), and fetch f->engine_info[engine_id] instead.
Also remove non-NULL test for engine_info, which could not
be true.

Also make sure to reset num_engines in nvgpu_cleanup_sw, to avoid
accessing uninitialized active_engines_list in unit test corner
cases (targetting init/remove support).

Jira NVGPU-4511

Change-Id: Ia6b904a7f3ca46e5097f06770b4caad317ec967b
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2263618
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
vinodg
1843a10f39 gpu: nvgpu: add missing gops_gr_init hal to target section 
Add few missing gr.init hal functions being used from
the gr.init unit test to the target section.

Jira NVGPU-4888

Change-Id: I5f5604d3530f805cc605c33448371de176f9927a
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279668
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
vinodg
89f87c12fa gpu: nvgpu: add missing gops_gr_intr hal in targets section 
Add the gops_gr_intr hal functions used in gr.intr unit test
in targets section.

Jira NVGPU-4888

Change-Id: I347408c46b71dc0c0e7cee3d21f2fd849aef4628
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279667
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Seshendra Gadagottu
3b9630a366 gpu: nvgpu: fuse: use hals instead of direct register reads 
Use fuse hals instead of direct fuse register reads to make
code compatible with multiple chip families.

JIRA NVGPU-4663
JIRA NVGPU-4835
JIRA NVGPU-4856

Change-Id: I15889aee38baf6393d11becb7ed995e9f0fd5897
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279629
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Philip Elcan
993d138f60 gpu: nvgpu: units: update SWUTS for HALs 
Update the SWUTS for ptimer, fuse, and ltc tests to include HALs called
by appropriate gops for gv11b.

JIRA NVGPU-4818

Change-Id: I058d2e75b30373712b21edfd77245b6247812dfa
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279587
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Philip Elcan
748f83af2f gpu: nvgpu: unit: static_analysis: add test for safety_checks 
Add test for nvgpu_safety_checks().

JIRA NVGPU-4825

Change-Id: I0d0b94c87b1e17f3087831b904740e14e26b6355
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279563
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Philip Elcan
2cf72837ec gpu: nvgpu: unit: add nvgpu_gk20a test 
Add test for common.nvgpu.gk20a unit.

JIRA NVGPU-4818

Change-Id: Iae23d39675789fad141411162774c05f976c9831
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279562
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Philip Elcan
75be2f3f2c gpu: nvgpu: unit: therm: use gops for HALs 
Switch to calling the gops for the HALs rather than the HAL directly.
Update the SWUTS to reflect this change.
This allows traceability with the SWUD.
Also, move a non-fusa hal to the non-doxygen section for gops_therm.h.

JIRA NVGPU-4818

Change-Id: Ia6a0d3ad94fbb97cdb345bfc89bc7ab3cd4f2d5a
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279486
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Philip Elcan
38a37d1644 gpu: nvgpu: unit: add units to SWUTS group 
Add the static analysis test and sync units to the SWUTS doxygen group.

JIRA NVGPU-4818

Change-Id: I5d7fe7bd107979192d0344d75902ce96c710095d
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279485
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Philip Elcan
9fc6bf3a4b gpu: nvgpu: unit: ce: switch to gops 
Change the unit test to use gops instead of the HALs directly.
Update the Targets SWUTS keyword to reflect the change.

This allows linkage to test coverage in the SWUD.

JIRA NVGPU-4818

Change-Id: Ib87b4cdb68112eda89ba8844677b46c67b5e6745
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279484
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
Philip Elcan
12df00c943 gpu: nvgpu: unit: update SWUTS for mc 
Update targets for mc to use new gops_mc.func syntax.
Update Test Type as appropriate.

JIRA NVGPU-4818

Change-Id: I03d68743aa802a391d6782076607266939a4a133
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279483
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00