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7603 Commits

Author SHA1 Message Date
Aaron Tian
ef69bbc92b gpu: nvgpu: add unified path of GPU devfreq dev 
Add a symbolic link: /sys/devices/gpu.0/devfreq_dev which
pointed to GPU devfreq device: /sys/devices/gpu.0/devfreq/
devfreq<N>. The unified path won't be changed when the
number devfreq<N> is changed.

Bug 200588449

Change-Id: If00c9f9517a13a952d54a2963f31db81fd52e6fb
Signed-off-by: Aaron Tian <atian@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2298606
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Leon Yu <leoyu@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:28 -06:00
Sagar Kamble
74ae8bb20b gpu: nvgpu: add CONFIG_NVGPU_DMABUF_HAS_DRVDATA 
dma_buf private data is not supported in upstream kernel. Update
the logic of pin/unpin when this support is not present.

Separate out the related functions to new file and select logic
based on new config flag CONFIG_NVGPU_DMABUF_HAS_DRVDATA.

Bug 2834141

Change-Id: I921758727b1bfc3690f2ab26bccd9befae14d782
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2294098
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:28 -06:00
Sagar Kamble
98e84b8046 gpu: nvgpu: fix the includes in ce unit 
As per the coding guidelines, absolute paths in header inclusion are
prohibited. Fix such instances in ce unit.

JIRA NVGPU-5075

Change-Id: I63ebc576e72a8a666a2c9d207dafc4e96473ea32
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2303087
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:28 -06:00
rmylavarapu
a23d0c1c19 gpu: nvgpu: Check for timeout and indicate error 
For every copy_back enabled PMU cmd sent by NVGPU
we are waiting for PMU response but not checking
for timeout error. This will result in copying invalid
data which causes errors. Implemented timeout check
and return error if timedout.

NVBUG-200530426

Change-Id: I32eba16eeb6f7a56724329ab6d85fae062c6fa3f
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2258947
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2020-12-15 14:13:28 -06:00
rmylavarapu
ed33c465d5 gpu: nvgpu: Check for ACK from PMU before timeout 
At present in NVGPU for every get_status cmd we wait
for a response from PMU else timeout. In present code
we look for the ACK very early then after processing
the interrupts, this may result in timeout with valid
response from PMU. To avoid this timeout a check for
ACK is implemented before every timeout check.

NVBUG-200530426

Change-Id: I6f8df51ab73066953ef7c9c05c61aaf543e53b52
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2258899
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:28 -06:00
Abdul Salam
29d4831780 gpu: nvgpu: Segregate volt unit members based on their accessibility 
Currently all unit specific private members are inside ucode_volt_inf.h.
This patch moves the members specific to pmuif to ucode_volt_inf.h and
local to volt.h.
Append all unit specific local functions with volt/nvgpu.
Move volt specific rpc handler from g->pmu to g->pmu->volt.

NVGPU-4492

Change-Id: I626e002b3876c6c5330dec4396b7661b986c6119
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2299555
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:28 -06:00
Divya Singhatwaria
7fb3410d72 gpu: nvgpu: Updated traceability in ACR and PMU 
Updated unit test specifcation in ACR and PMU
unit and add traceability from test to design.

JIRA NVGPU-4319
JIRA NVGPU-2192

Change-Id: Iadffaf42f0844c556ba6d9b898d2896863ff0237
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2301579
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 2020-12-15 14:13:28 -06:00
Divya Singhatwaria
00b7ea7f13 gpu: nvgpu: Remove hard coded constants from PMU 
During code inspection use of some hard coded
constants was found in some parts of the code.
Those constants are replaced by macros

JIRA NVGPU-5031

Change-Id: I50821839bc36c8d28b3e8678abdf82a856b9d8d2
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2300562
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:28 -06:00
Divya Singhatwaria
ed4eb79ac1 gpu: nvgpu: SWUD Lite updates 
Updated minor typo errors found during code inspection

JIRA NVGPU-4785
JIRA NVGPU-4789

Change-Id: I37384a852e9a2783e3033a6f12c21eafc00e5bcf
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2300560
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:28 -06:00
Seshendra Gadagottu
43324f7b1b gpu: nvgpu: Reconcile sim escape paths between RM and nvgpu 
SIM models are getting updated to have same escape read path
for RM and nvgpu. Updated nvgpu driver code to have same escape
read mechanism as RM.

This is required for igpu to pass on NET21.

Bug 2539889

Change-Id: I5d37ceb799cafb7fc7dec611fda5f5caac7d7f17
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2130414
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Lakshmanan M <lm@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: Lakshmanan M <lm@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:28 -06:00
Seshendra Gadagottu
6669cbd7de gpu: nvgpu: gv11b: fix veid bundle wait issue 
For non go_idle bundles, check should be fe_idle
not gr_idle. fe_gi state will be busy until go_idle
bundle gets processed.

Bug 2804205

Change-Id: I12dd05f59d406aeac9476e0c85b6e457c6bd6bed
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2299895
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2020-12-15 14:13:28 -06:00
Rajesh Devaraj
50d71f7c56 gpu: nvgpu: report fecs ctxsw init error 
This patch adds callback to report fecs ctxsw init error to 3LSS.
It also moves the related wrapper function to nvgpu_err header
file and adds doxygen documentation.

JIRA NVGPU-5042

Change-Id: I2a051cf19c2940859169799a4dd51adf8870eff4
Signed-off-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2300003
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:28 -06:00
Sagar Kamble
18f9d05aae gpu: nvgpu: spec_barrier & DMA_ERROR_CODE update 
These macros are not defined in future kernel.

Bug 2834141

Change-Id: Ib2ee419b66f4d949fd538dfbb04b8cffa73c1e44
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2299626
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:28 -06:00
Scott Long
4fd8df5ca0 gpu: nvgpu: fix misra 10.5 violations 
MISRA Advisory Rule 10.5 states that the value of an expression should
not be cast to an inappropriate essential type.

This change eliminates such a violation in the posix implementation
of nvgpu_thread_cleanup_pop().

Jira NVGPU-3178

Change-Id: I2ad363b4d60c321fa20b23c167d783bebaceb7d3
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2298986
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:28 -06:00
Thomas Fleury
1f9f28df8c gpu: nvgpu: remove barrier from gm20b_channel_bind 
In gm20b_channel_bind an nvgpu_smp_wmb() was used presumably to
prevent MMIO writes from being re-ordered after the memory write
to 'ch->bound'. If that was to happen, then unbind routine could
observe the channel as bound and issue concurrent MMIO writes
to unbind the channel. Assuming, the barrier was to prevent
such race, it should have been an nvgpu_wmb(), since
nvgpu_smp_wmb() is for inner shareable domain only.

However, the race possibility between unbind called from close
path and bind from ALLOC_GPFIFO should be ruled out because
close will wait for any active devctl/ioctl to finish before
proceeding.

The race possibility between unbind called from
suspend_all_serviceable_ch path and bind from ALLOC_GPFIFO should
be ruled out because ALLOC_GPFIFO has power refcount at the start
of devctl/ioctl and suspend_all_serviceable_ch is called from
prepare_poweroff path which ensure that power refcount is 0.

Removed nvgpu_smp_wmb().

Jira NVGPU-4927

Change-Id: Ic4f072df364926c10be84e42b83394c13fc97fdc
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2298959
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Shashank Singh <shashsingh@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:28 -06:00
Sagar Kamble
6c4a0bb6cd gpu: nvgpu: API updates for newer kernel 
access_ok, totalram_pages and zap_vma_ptes are updated in the newer
kernel. Update accordingly.

Bug 2834141

Change-Id: I3097308740f1af3092ac0a5ac2f0146db8148e12
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2294097
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:28 -06:00
Sagar Kamble
d0d8ef79d1 gpu: nvgpu: use READ_ONCE/WRITE_ONCE 
In the upstream kernel ACCESS_ONCE is now deprecated with reason as
given in the following related commit:

    commit 381f20fceba8e ("security: use READ_ONCE instead of deprecated
    ACCESS_ONCE")

    ACCESS_ONCE() does not work reliably on non-scalar types. For
    example gcc 4.6 and 4.7 might remove the volatile tag for such
    accesses during the SRA (scalar replacement of aggregates) step.

Replace usages of ACCESS_ONCE with READ_ONCE and WRITE_ONCE in nvgpu.

Bug 2834141

Change-Id: I9904c49e1a4d7b17ed2fe54360051d08595a2982
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2294096
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:28 -06:00
tkudav
029da0437e gpu: nvgpu: Correct SCP_CTL reg read command 
The offsets in minion register manuals are relative to minion base
address. Update the read command to use minion read API instead of
nvgpu_readl().

Change-Id: I6c0e2c11992f69e2fdd9e16dde061c92a771eae0
Signed-off-by: tkudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2292959
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:28 -06:00
rmylavarapu
9508cc6f42 gpu: nvgpu: sbr: Load and execute PUB 
Implmented functions to load and execute PUB which
is the safety POR.
PUB has following functionality:
1) Lower PLM
2) Reset PMU
3) FBPA register access to devtools

Secure Boot and Runtime (SBR) microcode comprises of
single PLM Update Binary (PUB) which will execute on
SEC2 Engine Falcon. NVGPU shall load and execute PUB
and wait for falcon halt. On successful halt NVGPU
shall proceed with ns ucode loading on respective
falcons.

NVGPU-4549

Change-Id: I8ea897a026bbe2b1714823aba51bfa51864dd68a
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2292330
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2020-12-15 14:13:28 -06:00
Antony Clince Alex
3e6332af9e nvgpu: posix: add fault injection handle 
Add fault injection handle for usleep.

Jira: NVGPU-4884

Change-Id: Ibf1fab6680068ff3da7b6e12d9efdb9f09bd1bc9
Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2299952
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2020-12-15 14:13:28 -06:00
Petlozu Pravareshwar
d0e81397d5 gpu: nvgpu: unit: update fault injection handler 
Update fault injection handling for following mock API:
 - sem_wait()

JIRA NVGPU-3909

Change-Id: I60271153249b77732eb53ef0038a886a51b5c971
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2298872
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2020-12-15 14:13:28 -06:00
Abdul Salam
77c220c1ae gpu: nvgpu: Convert define to funtions in clk unit 
As a part of refactoring this patch does the following
*Convert #define to functions, This will help in unit testing
*Remove #define which are not needed
*Merge all clk subunits to single clock unit in yaml

NVGPU-4492

Change-Id: If3f3dbd714e710398c0f860f4d5022675136db8c
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2298874
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Ramesh Mylavarapu <rmylavarapu@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:28 -06:00
shashank singh
0b4ccc7247 gpu: nvgpu: ignore deterministic submit flag for safety 
Safety only supports usermode submits so there is no need to process
DETERMINISTIC submit flag. For safety, while processing DETERMINISTIC
submit flag we are only setting deterministic field of struct
channel_gk20a and taking power reference with gk20a_busy(). On qnx
safety deterministic field is just used to check the syncpoint
allocation and taking power reference is a noop.

Jira NVGPU-4378

Change-Id: I1dc256db7d9fab93bef8fcc42bdb36f611b3ef40
Signed-off-by: shashank singh <shashsingh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2284644
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
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GVS: Gerrit_Virtual_Submit
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 2020-12-15 14:13:28 -06:00
Petlozu Pravareshwar
038b928650 gpu: nvgpu: unit: update fault injection handler 
Update fault injection handling for following mock API:
 - nvdt_open()

JIRA NVGPU-3909

Change-Id: I9cf20f64cea60a1d039fa9f9622222a43dabb813
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2298355
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shashank Singh <shashsingh@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:28 -06:00
Abdul Salam
8e840a5af1 gpu: nvgpu: Segregate clk unit members based on their accessibility 
Current clk unit has multiple header files under include folder.
This has combination of public struct which is accessed outside the
unit and private struct which is accessed within clk unit.
This patch segregates them based on their accessibility.
All private items are moved into ucode_clk_inf.h from include which only
clk can access.
All public items are moved into include/clk.h which other units can
access and removed the clk_xxx.h files

NVGPU-4689

Change-Id: I469270ae539e09a3f6fe6187207791732407863e
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2298220
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2020-12-15 14:13:28 -06:00
Dinesh
0ae451059c gpu: nvgpu: Fix misra rule 5.1 
This is fixing the following misra violation

MISRA 5.1 :
	Declaration with identical names.

The first 31 characters of identifiers
"nvgpu_nvhost_syncpt_unit_interface_get_aperture" and
"nvgpu_nvhost_syncpt_unit_interface_get_byte_offset" are identical.

JIRA NVGPU-4811

Change-Id: Ib862c4acd53cf748b47c1edffa91b5f033c08953
Signed-off-by: Dinesh <dt@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2298136
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 2020-12-15 14:13:28 -06:00
Nitin Kumbhar
9770723639 gpu: nvgpu: add checks for kzalloc() allocations 
Check kzalloc() allocations for failures and return
an error if an allocation fails.

Bug 2279948

Change-Id: I8a2c3b84904da897ad6118900c11489c8656c20f
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2020123
(cherry picked from commit fadd0014da)
(cherry picked from commit 73254fc51281370b2bcce06b3e890d8da725d8d5)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2298097
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 2020-12-15 14:13:28 -06:00
ajesh
1c1dca5d6f gpu: nvgpu: avoid hard coded constants 
Replace the hard coded numeric constants in posix unit.

Jira NVGPU-4954

Change-Id: I9f57e2d60b44c942924c47a7e38c237c732b13b0
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2289633
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 2020-12-15 14:13:28 -06:00
Seema Khowala
9ca89fa97f gpu: nvgpu: gm20b: enable priv_ring interrupts for sim 
Simulation platform supports priv_ring interrupts.

JIRA NVGPU-4864
JIRA NVGPU-5017
Bug  2848340

Change-Id: Ia37e7f6aa6ce6ab654772d7688243c8fe931a80d
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2293680
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 2020-12-15 14:13:28 -06:00
tkudav
03393131fb gpu: nvgpu: Add BUG_ON to avoid division of zero 
Confirm that ptimer_src_freq is not zero before using it in
arithmetic operations. This check will avoid accidental
division by zero.

JIRA NVGPU-4925

Change-Id: I44cb895e00d64303f4a6bc0ab1f4e3018a33fa6a
Signed-off-by: tkudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2294654
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 2020-12-15 14:13:28 -06:00
Petlozu Pravareshwar
c2fbc99967 gpu: nvgpu: Address Vectorcast gap for posix queue 
Update unit test for posix queue unit to cover Vectorcast gap.

Jira NVGPU-4478

Change-Id: I0d79861f173d511d25cf45051c399e3193eabdbe
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2294146
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 2020-12-15 14:13:28 -06:00
Petlozu Pravareshwar
c6a0ffe0d6 gpu: nvgpu: unit: update fault injection handler 
Update fault injection handling for following mock APIs:
 - NvTegraSysInit()
 - waitfor()
 - procmgr_daemon()
 - procmgr_ability()
 - sem_init()
 - sem_post()
 - pthread_sigmask()
 - sigaction()

JIRA NVGPU-3909

Change-Id: I7e40289f1f57bc61261aeda09af531e47da9674e
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2290958
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
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 2020-12-15 14:13:28 -06:00
sagar
8c04d2f000 gpu: nvgpu: skip classes in obj_alloc 
Currently, we are performing obj ctx alloction for bellow classes

 1. VOLTA_COMPUTE_A
 2. VOLTA_DMA_COPY_A
 3. VOLTA_CHANNEL_GPFIFO_A

In safety, we use Async CE but not GRCE.
So allocating obj context only for COMPUTE_A and return success(0) for
all other valid classes, after setting class in the channel struct.

Jira NVGPU-4378

Change-Id: Ie99872e062cc66f9ddf699397a13df85c3d8d59e
Signed-off-by: sagar <skadamati@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2287486
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 2020-12-15 14:13:28 -06:00
tkudav
052bcfb2d2 gpu: nvgpu: Add doxygen comments for common.top 
common.top HAL get_max_lts_per_ltc was wrongly moved under
NON-FUSA HAL. Move it outside the @cond DOXYGEN_SHOULD_SKIP_THIS
and add doxygen comments for it.

JIRA NVGPU-5021

Change-Id: I8422be878c427df850ac4580283d777abd417462
Signed-off-by: tkudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2294561
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 2020-12-15 14:13:28 -06:00
shashank singh
fa42a07343 gpu: nvgpu: add missing pmu gops in doxygen 
gops for pmu_early_init is skipped in doxygen documentation by putting
it under DOXYGEN_SHOULD_SKIP_THIS. But it is needed in safety so move it
outside of the condition.

Change-Id: I7bab8a3617dd7b022a4b135b2db5893499458e75
Signed-off-by: shashank singh <shashsingh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2294117
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 2020-12-15 14:13:28 -06:00
Rajesh Devaraj
47016c3ea4 gpu: nvgpu: add print for nvgpu_bug_exit 
This patch adds print statement in nvgpu_bug_exit() to log the
completion of SW quiesce.

Bug 200587869

Change-Id: I7d727d35a2ee54c5f64871ddd436990ee41a12fd
Signed-off-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2294049
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 2020-12-15 14:13:28 -06:00
Abdul Salam
17cc9b2b98 gpu: nvgpu: Refactor Clock unit. 
Current clk unit has multiple header files under pmuif folder.
This has combination of public struct which is accessed outside the
unit and private struct which is accessed within clk unit.
This patch segregates them based on their accessibility.
All private items are moved into ucode_clk_inf.h from pmuif which only
clk can access.
All public items are moved into include/clk.h which other units can
access
This will help in documentation of items for public items.

NVGPU-4491

Change-Id: Iccb0571e05ecb3cb13363390bed8c7214409b543
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2292318
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 2020-12-15 14:13:28 -06:00
Vedashree Vidwans
406913dc42 gpu: nvgpu: gr: zbc: add hal for zbc_table_size 
Currently, size of zbc index table is defined as a macro. This macro is
independent of the number of address bits in the ltc zbc index register.
Adding below hal will update zbc index table size as per number of
address bits.

Add hal to get gr_zbc_index_table_size:
u32 (*zbc_table_size)(struct gk20a *g);

ZBC index table address 0 is reserved. Logic to start zbc table index
from 1 is moved to corresponding hals.

JIRA NVGPU-4838

Change-Id: I700cadfdd1f3dc5f323055b8f44d769d6627920a
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2288479
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 2020-12-15 14:13:28 -06:00
Vedashree Vidwans
f73dfcf7e1 gpu: nvgpu: add engine_status_info for nvgpu-next 
Update engine_status_info for nvgpu-next.

JIRA NVGPU-4972

Change-Id: I89241a1ef165886eba3b7f504656855afa1fa979
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2292687
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 2020-12-15 14:13:28 -06:00
Vedashree Vidwans
ec34e87573 gpu: nvgpu: extend runlist_info for nvgpu-next 
Extend runlist_info for nvgpu-next.

JIRA NVGPU-4971

Change-Id: I0043eff4df688c4131a0919500fef0dff3419a58
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2292686
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 2020-12-15 14:13:28 -06:00
Vedashree Vidwans
31ba194a85 gpu: nvgpu: extend engine_info for nvgpu-next 
Extend engine_info for nvgpu-next.

JIRA NVGPU-4970

Change-Id: I0e8e5ae9361776a48972ae6d0cee84ece19d7590
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2291811
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 2020-12-15 14:13:28 -06:00
Nicolas Benech
30755fef04 gpu: nvgpu: mm: use constants for string lengths 
For VM and allocator names, hardcoded constants were used which
can be a weakness. This patch uses proper defines in headers
instead.

JIRA NVGPU-4946

Change-Id: I1cc100a558d0c44c208a7e579cc36b71a0d4eeec
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2291069
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 2020-12-15 14:13:28 -06:00
Nicolas Benech
e8c02f121b gpu: nvgpu: vm: plausibility check for nvgpu_vm_bind_channel 
Ensure that the channel pointer passed to nvgpu_vm_bind_channel
is not NULL.
Update unit test accordingly.

JIRA NVGPU-4947.

Change-Id: I3f987ee9042066df83cc6101b20b4add3661fae8
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2291034
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 2020-12-15 14:13:28 -06:00
Nicolas Benech
16b80d2c5c gpu: nvgpu: pd_cache: add BUG_ON to guard divide by 0 
In the unlikely event of a corruption of pentry->pd_size this new
BUG_ON prevents a potential divide by 0. This change is mostly to
increase safety as it is unlikely for a divide by 0 to occur in this
instance.

JIRA NVGPU-4949

Change-Id: Ibdf80670f35a63dd20d06082cde23fb424931933
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2291022
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 2020-12-15 14:13:28 -06:00
Prateek sethi
51913163a6 gpu: nvgpu: Remove nvgpu_hr_timestamp from safety build 
nvgpu_hr_timestamp() is not being called from any safe API, so it cab
be removed from the safety build. Patch moves this function and unit
test covers this function to under CONFIG_NVGPU_NON_FUSA flag.

Jira NVGPU-4994

Change-Id: I47d5c22b5a407626d75b10c1c67cdb3e765397b9
Signed-off-by: Prateek sethi <prsethi@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2292895
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 2020-12-15 14:13:28 -06:00
ajesh
9c99dc4c4d gpu: nvgpu: cleanup based on code inspection 
Fix the following issues in Posix utils unit which were
identified during code inspection,
 - Remove the usage of #undef.
 - Avoid defining reserved identifiers.

Jira NVGPU-4993

Change-Id: I16189bfad5bba87ee73a26d61d19caefd5d852c2
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2292415
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Reviewed-by: Scott Long <scottl@nvidia.com>
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 2020-12-15 14:13:28 -06:00
Deepak Nibade
b0984cbf05 gpu: nvgpu: fix default ctxsw wdt value 
MAX wdt timeout value expected by CTXSW is 0x3fff_ffff.
Currenlty nvgpu tries to program it to 0x7fff_ffff.

Fix the hard coded value as per CTXSW expectation.

Bug 200586923

Change-Id: I67e06e988d301006b0c5153c18f5af1630d633b7
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2292429
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 2020-12-15 14:13:28 -06:00
Lakshmanan M
e445d08022 gpu :nvgpu : Add waiter index in syncpt_wait_ext 
Allocated the following two waiter objects for sync point waith path:
Job tracking and CE threads.
 2. QNX channel specific job tracking thread.
The above implementation is only available for QNX.
For Linux, waiter index is skipped.

JIRA NVGPU-3009

Change-Id: If12ad1dc90a24a7b922b205829ca335805c02c3d
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2292080
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-by: Shashank Singh <shashsingh@nvidia.com>
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 2020-12-15 14:13:28 -06:00
Vedashree Vidwans
14ce94df43 gpu: nvgpu: divide functions to reduce complexity 
This patch divides nvgpu_init_mm_setup_sw() and
nvgpu_vm_init_vma_allocators() functions to reduce code complexity.

Jira NVGPU-4780

Change-Id: I3d94cf44aee2e5e43471b97055c51fa2b0f83d52
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2291817
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Reviewed-by: Nicolas Benech <nbenech@nvidia.com>
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 2020-12-15 14:13:28 -06:00
Lakshmanan M
6ed4f57972 gpu: nvgpu: doxygen: Add NVGPU ISOLATION flag 
JIRA NVGPU-3009

Change-Id: I25f361c616044176c962db11307a09e5ed05ae27
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2290281
Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-by: Shashank Singh <shashsingh@nvidia.com>
Reviewed-by: Dinesh T <dt@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
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 2020-12-15 14:13:28 -06:00