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6999 Commits

Author SHA1 Message Date
Philip Elcan
19dd64930d gpu: nvgpu: pmu: move rtos init to func ptr 
This moves the nvgpu_pmu_rtos_init() to a HAL function pointer which
makes it consistent with the other init APIs.

JIRA NVGPU-3980

Change-Id: I562e264deaec76f2a45026a07f24d35b291b1930
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2202969
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Philip Elcan
b53ec4731e gpu: nvgpu: pmu: update init APIs 
Remove the second parameter for the pmu_early_init() and pmu_init()
functions so they only require the gk20a object. The g->pmu was always
passed for this parameter. And this makes the API signature match the
other init functions in the driver.

JIRA NVGPU-3980

Change-Id: Iae9361a5f14bc5c1d02f4ddb6583f30b71b22d59
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2202968
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Philip Elcan
78c1f328bb gpu: nvgpu: init: consolidate falcon init/free calls 
Combine all of the falcon_sw_init() calls into nvgpu_falcons_sw_init()
and combine all of the falcon_sw_free() calls into
nvgpu_falcons_sw_free().

JIRA NVGPU-3980

Change-Id: I23008a19be95a8cf4f73e2a18c414bce8879e8a2
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2202967
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Philip Elcan
b21da03432 gpu: nvgpu: clk: remove unused HAL 
The clk HAL disable_slowboot() is not set for any platform and is thus
unused, so remove it

JIRA NVGPU-3980

Change-Id: Idb61ae35e85d35e852f18d22c076a1e16e723e88
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2196421
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Vedashree Vidwans
17d5df6a24 gpu: nvgpu: mm: allocator code complexity cleanup 
This patch divides complex code segments into smaller functions to
reduce code complexity in allocators.

Jira NVGPU-4065

Change-Id: I844f71592fe990765c5ec162431323a8e4bf0ef9
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2201907
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Seshendra Gadagottu
0697d4237b gpu: nvgpu: netlist: compile out non safety function for safety build 
Move functions used only by sim under CONFIG_NVGPU_NON_FUSA.
Following functions are compiled out for safety build:

void nvgpu_netlist_set_fecs_inst_count(struct gk20a *g, u32 count);
void nvgpu_netlist_set_fecs_data_count(struct gk20a *g, u32 count);
void nvgpu_netlist_set_gpccs_inst_count(struct gk20a *g, u32 count);
void nvgpu_netlist_set_gpccs_data_count(struct gk20a *g, u32 count);

struct netlist_u32_list *nvgpu_netlist_get_fecs_inst(struct gk20a *g);
struct netlist_u32_list *nvgpu_netlist_get_fecs_data(struct gk20a *g);
struct netlist_u32_list *nvgpu_netlist_get_gpccs_inst(struct gk20a *g);
struct netlist_u32_list *nvgpu_netlist_get_gpccs_data(struct gk20a *g);

void nvgpu_netlist_vars_set_dynamic(struct gk20a *g, bool set);
void nvgpu_netlist_vars_set_buffer_size(struct gk20a *g, u32 size);
void nvgpu_netlist_vars_set_regs_base_index(struct gk20a *g, u32 index);

JIRA NVGPU-2773

Change-Id: I37bdf498d5e152dc0d438644e3996835c1150e78
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2208831
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Scott Long
67179c661e gpu: nvgpu: fix misra 4.4 violations 
This change eliminates the two instances of MISRA Advisory
Rule 4.4 violations from nvgpu by moving the code in question
within #if 0/#endif.

Advisory Rule 4.4 states that sections of code should not
be commented out.

JIRA NVGPU-3798

Change-Id: Id7c501d2d9407a87af5db54c3590705f67ba1ba3
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2208185
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Scott Long
77ffea99bd gpu: nvgpu: fix misra 18.4 violations 
This change eliminates MISRA Advisory Rule 18.4
violations in the following by accessing g->fifo.channel
with array indexing:

 * nvgpu_channel_init_support()
 * nvgpu_channel_semaphore_wakeup()

Advisory Rule 18.4 states that the +, -, +=, and -=
operators should not be applied to an expression
of pointer type.

JIRA NVGPU-3798

Change-Id: I6b1bf360db6ec25894cc0ea430c33067e0cddf64
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2207550
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Richard Zhao
1ad0bf9098 gpu: nvgpu: vgpu: add mmu_debug_mode support 
Added two new IVC commands that set gr and fb mmu debug mode.

Bug 2586624

Change-Id: I358fb04713a9754fb209c0a90d02130dd4a1caf6
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2204980
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nirav Patel <nipatel@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Philip Elcan
ef2d30328f gpu: nvgpu: ecc: improve CCM for nvgpu_ecc_free 
This reduces the code complexity for nvgpu_ecc_free() by creating a
helper function free_ecc_stat_count_array().

The TCC metric is reduced from 27 to 5.

JIRA NVGPU-4094

Change-Id: I80c85fe56d253616817682278f4bef241c346d57
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2206518
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Nicolas Benech
780b1f156b gpu: nvgpu: add doxygen documentation in mm.as 
Add doxygen documentation for mm.as in the as.h header.

JIRA NVGPU-4036

Change-Id: I274ba146395ba463cf9d4f575ea817f9c633e5f7
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2203941
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Nicolas Benech
7918cbb4f0 gpu: nvgpu: unit: unit tests for mm.as 
This patch adds unit testing for the mm.as unit including:
- feature tests
- error injection testing
- 100% line coverage and 96% branches (one missing branch that
  cannot be tested or removed)

JIRA NVGPU-917

Change-Id: I54bdac21e56554d1d960955f1a140ab98c9f3e5e
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2194399
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Nicolas Benech
6a6fa99d8a gpu: nvgpu: unit: fw: add nvgpu.nvgpu error injection support 
Similar to DMA and KMEM, this allows to trigger errors in a couple
of functions within os/nvgpu: gk20a_busy and nvgpu_posix_probe

JIRA NVGPU-917

Change-Id: I033861d7ff449fac1275c27dffcdf922de3f0ac7
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2194398
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Philip Elcan
9378675213 gpu: nvgpu: whitelist MISRA violations for WARN_ON/BUG_ON 
Whitelist false positive violations cause by a Coverity bug that
that overrides the WARN_ON/BUG_ON macros. See nvbug 2277532 for
details on the bug.

JIRA NVGPU-4031

Change-Id: I395f97c89580195485e93275663a062f26ab6fc7
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2207326
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Preetham Chandru Ramchandra
8ec2b11d04 gpu: nvgpu: use the right config name for s/w sema 
The correct config to be used is CONFIG_NVGPU_SW_SEMAPHORE and not
CONFIG_NVGPU_SW_SEMAPHPORE.
Due to this the s/w semaphores were not getting freed.

Bug 200542024

Change-Id: I5eee0d52f0c1116e68a304b94e01fd407e74526e
Signed-off-by: Preetham Chandru Ramchandra <pchandru@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2207182
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
dinesh
8244de0729 gpu: nvgpu: Change in scheduler class for threads 
As per one of the requirement priority of interrupt threads in
qnx should be changed to 21 with SCHED_RR class. NVGPU driver
is creating threads with FIFO class. This makes delay in scheduling
other interrupt threads.

This is added to change the schduler class to RR.

JIRA NVGPU-4121

Change-Id: Ie0a5f08b95cfab4ffbbd3c0c74a53324c64c202f
Signed-off-by: dinesh <dt@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2206210
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shashank Singh <shashsingh@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Seema Khowala
e340c9df05 gpu: nvgpu: re-org struct to move NON FUSA HALs at the end 
This is required to doxygen FUSA HALs and then pull
the content into SWUD.
Doxygenating NON FUSA HALs can be skipped.

JIRA NVGPU-3950

Change-Id: Ia1917fbb1c5d14753cb522691544e2f76aeb5a51
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2204079
GVS: Gerrit_Virtual_Submit
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Seema Khowala
202e066d4e gpu: nvgpu: move fifo specific gpu_ops out of gk20a.h 
gk20a.h will include gops_member.h where member corresponds to the
member of gpu_ops.

This is needed to doxygen HALs at high level without
exposing chip specific hal files.

JIRA NVGPU-3950

Change-Id: I99a5e6f45cf93dde47eac12ce76ba65c38d7fa67
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2203960
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Vedashree Vidwans
2f27a26026 gpu: nvgpu: mm: code complexity cleanup page_table 
This patch divides complex code segments into smaller functions to
reduce code complexity page_table.c.

Jira NVGPU-4065

Change-Id: I9e877b2e6db82f454732a9995d27aea4bec7784f
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2205940
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Shashank Singh
6fd0d972ae nvgpu: gpu: include qnx_init unit in doxygen documentation 
-Include qnx_init unit in doxygen documentation.
-Add documentation for gk20a_busy/idle and similar functions.
-Remove must_check return value as misra already reports violation for
 that.

Jira NVGPU-2571

Change-Id: I9573cb61865677944809dcc494d92f63cc6e0f58
Signed-off-by: Shashank Singh <shashsingh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2176755
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Richard Zhao
e770573468 gpu: nvgpu: disable mmu debug mode before unbind ch from tsg 
disable mmu debug mode needs to reference tsg struct, so it must be
called when ch can trace back to tsg.

Bug 2586624

Change-Id: I050b557fb7abbf7e52faec242a1c290742e86c0d
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2206636
Reviewed-by: Kajetan Dutka <kdutka@nvidia.com>
Tested-by: Kajetan Dutka <kdutka@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Vedashree Vidwans
c8b450b846 gpu: nvgpu: mm: code complexity cleanup vm_area.c 
This patch divides complex code segments into smaller functions to
reduce code complexity in vm_area.c.

Jira NVGPU-4065

Change-Id: I13faab85f00e9fdcb84cbcc4d46714a5832caa89
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2205942
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Vedashree Vidwans
21dfd4e441 gpu: nvgpu: mm: hal code complexity cleanup hal.mc 
This patch divides complex code segments into smaller functions to
reduce code complexity in hal mc code.

Jira NVGPU-4065

Change-Id: I90c37da2ce100bdbb5f11b744a42c00c7fc33988
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2204234
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Vedashree Vidwans
dad25b79f1 gpu: nvgpu: mm: code complexity cleanup mm.c 
This patch divides complex code segments into smaller functions to
reduce code complexity in mm.c.

Jira NVGPU-4065

Change-Id: I06d45ace3609bbda8513d9fad20cff20c5f0604a
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2204233
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Nitin Kumbhar
2eb3c431bd gpu: nvgpu: add check for unaligned access 
Add a build time check to confirm that unaligned accesses
are enabled for NvGPU driver. If unaligned access is not
enabled it results in a build error.

Currently it only checks for ARM build of NvGPU driver.

JIRA NVGPU-3908
JIRA NVGPU-3561

Change-Id: Ifd190a8f489844ed36b5c5cb51b48257ef051f9f
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2197150
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Vedashree Vidwans
07ab78c464 gpu: nvgpu: mm: ccm mmu_fault_nonreplay_replay 
This patch divides gv11b_mm_mmu_fault_handle_nonreplay_replay_fault()
into smaller functions to reduce code complexity in hal mm mmu_fault
gv11b_fusa code.

Jira NVGPU-4065

Change-Id: I4da8d7cdf445f1a924473cfe103d4c46c46a3353
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2206599
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Vedashree Vidwans
1155e394a1 gpu: nvgpu: return error for allocation failure 
This patch modifies nvgpu_runlist_setup_sw() to return error code for
allocation failures. This patch also modifies nvgpu_runlist_cleanup_sw()
to check active_runlist_info pointer before freeing runlist->mem.

Jira NVGPU-3699

Change-Id: Id6e72188ae5e921568c7ad016c115676358edf58
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2197346
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Seema Khowala
424df3b827 gpu: nvgpu: dump trapped_addr_reg for firmware method error 
Dumping trapped_addr_reg will help detect the method that
caused firmware method error.

Bug 2684835

Change-Id: I45aad14bca800d6f528e74891215d3d9d7e37dda
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2204771
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Philip Elcan
b5f1135ba8 gpu: nvgpu: utils: improve CCM for rbtree 
This improves the code complexity of the rbtree function
nvgpu_rbtree_unlink() by creating helper functions swap_in_new_child()
and adopt_children().

This reduces the TCC metric to 9.

JIRA NVGPU-4097

Change-Id: I2eb9ddf9a74478600874c71dab2b1267b5148b7b
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2205845
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Nicolas Benech <nbenech@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Philip Elcan
5e0bf2bb7a gpu: nvgpu: utils: improve CCM for rbtree 
Improve the code complexity for the rbtree function delete_fixup().
Create smaller functions, delete_fixup_right_child() and
delete_left_child() to handle those parts of the agorithm. Also, create
helper function has_no_red_children() to handle a common check in these
new functions.

This brings the TCC metric to 7.

JIRA NVGPU-4094

Change-Id: If34167be308093ae3b597e02bbd3da8b4e9d27aa
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2205844
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Nicolas Benech <nbenech@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Thomas Fleury
e7e0879217 gpu: nvgpu: return int for tsg.init_eng_method_buffers 
nvgpu_kzalloc can fail in gv11b_init_eng_method_buffers.
Added checks on returned pointer.
Also changed g->ops.tsg.init_eng_method_buffers to return an int,
and check return value in callers.

Jira NVGPU-3788

Change-Id: Icb541665c40b89d512929cc9cf9f6a3e7a0033db
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2205851
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Debarshi Dutta
eecd562be6 gpu: nvgpu: reduce CCM for channel_free 
Reduce CCM complexity of channel_free from 20 to 10
by extracting out multiple groups of code into different static
functions.

Jira NVGPU-4063

Change-Id: Iafff739a9db089681c1d74ac6eba1b3c365ee627
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2205286
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Sagar Kamble
f3f484d5dc gpu: nvgpu: gating_registers: s/gk20a_writel/nvgpu_writel 
Rename gk20a_writel to nvgpu_writel in gv11b gating reglist hal.

JIRA NVGPU-2175

Change-Id: Ib65bc7adc655d48e4bbc9f74a0d05f9d2a8e46f3
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2181997
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Sagar Kamble
9615857d9b gpu: nvgpu: userspace: add the elcg unit test 
Add unit test to verify the ELCG enable/disable interface for
various engines.

JIRA NVGPU-2175

Change-Id: If308a8ef1fefe019c936c8bfdacf1d7b44ae35f1
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2173830
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Sagar Kamble
be5a82b73e gpu: nvgpu: userspace: cg unit tests 
Add unit tests for verifying the blcg and slcg prod values loading
interfaces.

JIRA NVGPU-2175

Change-Id: Ia48f3fe9ce463e47f819d15aa64e120040a31fb4
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2173829
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Sagar Kamble
9d2b622b45 gpu: nvgpu: update the gv11b gating_reglist hal with getter functions for reglist data 
Functions to access gating registers data and size are now autogenerated
in the hal files. Update the gv11b hal with that change.

JIRA NVGPU-2175

Change-Id: Icfff940c57a770339757efff86bb93c7062b9406
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2177922
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Sagar Kamble
6ee3b5a7e5 gpu: nvgpu: update the gv11b gating_reglist hal 
Update the gv11b reglist hal with updated generator. It includes the
following changes:
1. update gr and ltc function names for consistent naming.
2. s/gv11b_blcg_ctxsw_prog/gv11b_blcg_ctxsw_firmware for consistent
   naming.
3. fixed alignment issues.

JIRA NVGPU-2175

Change-Id: I6c4c0f241eda18fd732dc4664010403c489178bf
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2173826
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Nitin Kumbhar
6208e86ca8 gpu: nvgpu: fix value leaking in log 
The timeout message of nvgpu_timeout_expired_msg() leaks
a stack value (%llx) in error log on timeout. As the format
expects 1 argument and none is given, fix this by specifying
the required argument.

Bug 2626449

Change-Id: I6eddbeaa8b6d91a51d755dfb3df9e7c800f0d161
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2205423
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Nitin Kumbhar
f8e4393ace gpu: nvgpu: fix possible buffer overflow issue 
As sprintf() is used to populate pool_name[20], it can overflow
for larger u32 values (u32 max decimal number chars are 10) i.e.
20 < strlen("semaphore_pool-") i.e. 15 + 10.

Fix this overflow by removing pool_name as it's not used.

Bug 2626446

Change-Id: I4e0a222a2cd34dcd09e69294bc46e2242abb04bb
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2205356
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
vinodg
f512d17e0b gpu: nvgpu: add definition for shader exception 
Add definition for NVA297_SET_SHADER_EXCEPTIONS_ENABLE_TRUE
Need for gr unit interrupt test

Jira NVGPU-4085

Change-Id: Ia22fae038822e26ecb48369b489d2514b701a84c
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2205679
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Philip Elcan
0d30036b30 Revert "gpu: nvgpu: posix: use MISRA-friendly true/false" 
This reverts commit 6db2be854c.

The original commit was to workaround a bug in Coverity that was
misinterpreting "true" and "false" as integers. See nvbug 2623654 for
details on the bug.

Rather than workaround the issue, we whitelist the violations.

JIRA NVGPU-4031

Change-Id: Ie1fe91934aa491966dc960b9706ce1e18d9cf905
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2203977
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Philip Elcan
7f87599df9 gpu: nvgpu: whitelist MISRA violations due to true/false bug 
Whitelist false positive violations cause by a Coverity bug that
misinterprets "true" and "false" as integers. See nvbug 2623654 for
details on the bug.

JIRA NVGPU-4031

Change-Id: Id144eac1d23be5cfaba73322c3e89c76b5664d6c
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2203976
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Philip Elcan
2a205f6aeb gpu: nvgpu: add whitelisting support for code blocks 
Add additional macros NVGPU_COV_WHITELIST_BLOCK_BEGIN and
NVGPU_COV_WHITELIST_BLOCK_END for whitelisting Coverity MISRA/CERT-C
violation for blocks of code.

JIRA NVGPU-4031

Change-Id: I5dbf5d469903bb446ce8b0258b6d5cab7f7b75d8
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2203975
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Vinod G
2608c4d80b gpu: nvgpu: ccm fix for gr unit 
Fix CCM issue in gv11b_ecc_init_tpc function
Reduced the complexity below 10 by adding sub functions
in ecc_init for corrected error count and
uncorrected error count.

Jira NVGPU-4084

Change-Id: I27593a68ee80790e9c66168cc1225b3e3a0c27cc
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2203958
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Petlozu Pravareshwar
1e7c3cb038 gpu: nvgpu: add fault injection for posix routines 
This adds the ability to enable fault injection for some of the
POSIX implementation of the nvgpu condition and thread routines.

JIRA NVGPU-2679

Change-Id: I6abb9d5ba3fbe8921e48a135e440c179702dcf6b
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2174647
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Vinod G
74723c7f62 gpu: nvgpu: check for non safety code 
Add checking for non safety code to avoid compilation
for safe os.

Jira NVGPU-4085

Change-Id: I7473fb6d97507532e47b7a02b53b6a0771aeb3aa
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2204890
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Seshendra Gadagottu
bc83d6aa9c gpu: nvgpu: unit: gr: add gr falcon unit test 
Added following unit tests to cover common gr falcon unit:
gr_falcon_init
gr_falcon_init_ctxsw
gr_falcon_nonsecure_gpccs_init_ctxsw
gr_falcon_recovery_ctxsw
gr_falcon_nonsecure_gpccs_recovery_ctxsw
gr_falcon_query_test
gr_falcon_init_ctx_state
gr_falcon_deinit

JIRA NVGPU-3930

Change-Id: I46f02ac62d8fbdd8704bca34a8088e2de4e2483a
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2201977
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Divya Singhatwaria
8f1c95f3c3 gpu: nvgpu: ACR unit test 
Add unit tests for ACR unit for the following
function:
nvgpu_acr_init()

JIRA NVGPU-2220

Change-Id: I40c6cf21439e1e9e376230b89cdae6740aec666b
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2181677
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Sagar Kamble
ba5d129cfc gpu: nvgpu: address CCM for nvgpu_cg_init_gr_load_gating_prod 
Reduced TCC/MCC below 10 by splitting into BLCG and SLPC load gating
prod functions.

JIRA NVGPU-4101

Change-Id: Ic572e1fe4dd6a3a1edf13d77ddadf08ea2214f74
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2205216
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00
Sagar Kamble
ec293030c1 gpu: nvgpu: move non-safe functions from fusa hal to non-fusa hal 
Multiple non-safe functions under NVGPU_DEBUGGER, NVGPU_CILP and other
config flags were moved to fusa files. Although they are guarded by
the C flags, it makes sense to keep those functions in non-fusa
files. Make this change for all hals.

JIRA NVGPU-3853

Change-Id: I8151b55a60cb50c5058af48bab9e8068f929ac3b
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2204352
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:05:52 -06:00