To support nvmap as OOT module in kstable it implemented the APIs
nvmap_dma_alloc_attrs and nvmap_dma_free_attrs to replace usage
of kernel dma_alloc_attrs and dma_free_attrs. nvmap APIs have
special handling for VPR carveout.
Use those exported APIs in nvgpu when CONFIG_NVGPU_NVMAP_NEXT is
defined. This config will be defined only for kstable builds.
JIRA LS-458
Bug 200754700
Change-Id: I717aa579d29ee10c006b044f6b0fafbedc57dba8
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2647951
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GVS: Gerrit_Virtual_Submit
VPR functionality is split up as static VPR and VPR resize. Static VPR
is supported on all kernels. VPR resize is enabled only on 4.9 kernel.
Enable CONFIG_NVGPU_VPR unconditionally in Linux Makefile. Compile
VPR resize related functionality in nvgpu under the check for
Linux kernel version using new define NVGPU_VPR_RESIZE_SUPPORTED.
JIRA LS-458
Bug 200754700
Change-Id: Ib92f7f1b95afc6c69fbdf33354459c147337350c
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2647619
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Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
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GVS: Gerrit_Virtual_Submit
nvs worker thread is created on each resume and deinitialized on every
suspend. nvgpu can be resumed when process is getting killed. Thread
creation can fail when the process is getting killed. That will lead
to driver resume failure.
To avoid the issue above, don't stop the nvs worker thread in suspend
and let the first created thread handle the nvs work always.
Deinitialize the nvs worker thread during nvgpu unload.
Also, log the error returned by nvgpu_thread_create in the function
nvgpu_worker_start.
bug 3480192
Change-Id: I8d5d9e7716a950b162cc3c2d9fcfde07c4edfcf6
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2646218
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GVS: Gerrit_Virtual_Submit
gops.gr.init.set_default_compute_regs() HAL configures compute specific
settings in safety build and this eliminates need of using SW methods.
Define this HAL for Orin safety build and configure sked check related
registers from the HAL. Other settings done on gv11b are no more
applicable for ga10b safety.
Bug 3456240
Change-Id: Ic125cdf414a5402511949015e3424b8cb2dab1e0
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2646284
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This patch performs the following improvements for VAB:
1) It avoids an infinite loop when collecting VAB information.
Previously, nvgpu incorrectly assumed that the valid bit would
be eventually set for the checker when polling. It may not be set
if a VAB-related fault has occurred.
2) It handles the VAB_ERROR mmu fault which may be caused for various
reasons: invalid vab buffer address, tracking in protected mode,
etc. The recovery sequence is to set the vab buffer size to 0 and
then to the original size. This clears the VAB_ERROR bit. After
reseting, the old register values are again set in the recovery
code sequence.
3) Use correct number of VAB buffers. There's only one VAB buffer on
ga10b, not two.
4) Simplify logic.
Bug 3374805
Bug 3465734
Bug 3473147
Change-Id: I716f460ef37cb848ddc56a64c6f83024c4bb9811
Signed-off-by: Martin Radev <mradev@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2621290
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During gpu re-initialization(rail gate exit/sc7 exit), vab buffers
needs to programmed in hw by writing vab buffer address to
NV_PFB_PRI_MMU_VIDMEM_ACCESS_BIT_BUFFER_LO(HI)_ADDR and
setting vab entries to NV_PFB_PRI_MMU_VIDMEM_ACCESS_BIT_BUFFER_SIZE_VAL.
For this moved nvgpu nvgpu_fb_vab_init_hal from
nvgpu_init_mm_setup_sw to nvgpu_init_mm_support.
nvgpu_init_mm_setup_sw is skipping during re-init, because
sw_ready is set during first boot.
Bug 3468562
Change-Id: Iee2bd4bc5165397ea4f9cca0ba6744eaf361a342
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2643244
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Reviewed-by: Martin Radev <mradev@nvidia.com>
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1. Registers NV_PLTCG_LTC0_LTS0_DSTG_ECC_REPORT and
NV_PLTCG_LTC0_LTS0_DSTG_ECC_ADDRESS are
deprecated. Remove them.
2. Define NV_PLTCG_LTC0_LTS0_INTR3 for ga100.
3. Add fields and constants for the register
NV_PLTCG_LTC0_LTS0_L2_CACHE_ECC_ADDRESS.
4. Add new fields for the register
NV_PLTCG_LTC0_LTS0_L2_CACHE_ECC_CONTROL.
Bug 3446731
Change-Id: I3e41198b7b2e75ff69b5c6193e6fd54efae15752
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2633958
Reviewed-by: Antony Clince Alex <aalex@nvidia.com>
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GVS: Gerrit_Virtual_Submit
- Make the domain scheduler timeslice type nanoseconds to future proof
the interface
- Return -ENOSYS from ioctls if the nvs code is not initialized
- Return the number of domains also when user supplied array is present
- Use domain id instead of name for TSG binding
- Improve documentation in the uapi headers
- Verify that reserved fields are zeroed
- Extend some internal logging
- Release the sched mutex on alloc error
- Add file mode checks in the nvs ioctls. The create and remove ioctls
require writable file permissions, while the query does not; this
allows filesystem based access control on domain management on the
single dev node.
Jira NVGPU-6788
Change-Id: I668eb5972a0ed1073e84a4ae30e3069bf0b59e16
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2639017
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GVS: Gerrit_Virtual_Submit
Move away from the prototype call in channel wdt worker and create a
separate worker thread for the domain scheduler. The details of runlist
domains are still encapsulated in the runlist code; the domain scheduler
controls when to switch domains. Switching happens based on domain
timeslices or when the current domain is deleted.
The worker thread is paused on railgate and spun back on poweron. The
scheduler data was also left dangling, so fix that by deinitializing all
nvs-related when gk20a_remove_support() is called. The runlist domains
already get freed as part of fifo removal.
Jira NVGPU-6427
Change-Id: I64f42498f8789448d9becdd209b7878ef0fdb124
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2632579
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The flag pmu->pg->golden_image_initialized is set to
true during initial GPU context creation and is not
cleared while the GPU goes into pm_suspend (during railgate).
Hence, when the GPU resumes after un-railgate it retains
the previous value which can cause ELPG to kick in immediately.
Due to this, when ELPG and Railgating are enabled, IDLE_SNAP
is seen for read access of gr_gpc0_tpc0_sm_arch_r reg.
To resolve this, if golden image is ready set the
pmu->pg->golden_image_initialized to suspend state during railgate,
to delay the early enable of ELPG. Add a new
pmu_init_golden_img_state hal in the NVGPU_INIT_TABLE_ENTRY.
This will be called after all the GR access is done and GPU resumes
completely after un-railgate. This hal will then check if
golden_image_initialized flag is in suspend state, it will set it
to ready state and then re-enable ELPG.
Bug 3431798
Change-Id: I1fee83e66e09b6b78d385bbe60529d0724f79e79
Signed-off-by: Divya <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2639188
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
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GVS: Gerrit_Virtual_Submit
WARN() and WARN_ON() are most useful when the log explains where they
happened. The posix implementation of these prints neither that nor the
warning message (if any). Extend the macros to include function name and
line number, and print those plus the format string.
Actually formatting the format string is problematic wrt. MISRA rules,
so the arguments are not formatted.
The implementation of BUG() already prints the function name and line
number.
Change-Id: Ie246a915f5e8420e1c606bb1555a7f9b498725fd
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2634105
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GVS: Gerrit_Virtual_Submit
With the existing implemenatation ELPG was disabled and
enabled once for handling stall isr and then again ELPG is
disabled and aenabled for writing to gr retrigger register.
This increased number of ELPG cycles and degraded perf of various
graphics test with ELPG enabled.
This change now disables ELPG, then handles stall_isr and
write to gr retrigger register and then enables ELPG.
Thus, number of ELPG cycles are reduced.
Bug 3451615
Change-Id: Iadac0c7b01eb711878280cd1503ba0f26000937c
Signed-off-by: Divya <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2638175
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GVS: Gerrit_Virtual_Submit
The GSP stress test debug node only checks for gpu poweron and continues
to trigger the stress test if power is on. This results in a small
window where the GPU might get railgated, so call gk20a_busy() to hold a
power ref while loading or starting the stress test (which touches HW).
Change-Id: I2ced45472cd0602da36f1801e56b486097ece83d
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2635604
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GVS: Gerrit_Virtual_Submit
Now that the main nvsched code exists in the nvgpu build, make it
control the runlist domains. As a new nvs domain is created, create the
relevant runlist data too. To support the default domain, create a
default nvs domain at boot.
The scheduling domain code owns the responsibility of domain lifetime,
and runlist domains exist to serve that logic although the RL domains
are directly used by channel and TSG logic. Add refcounting to the
scheduler uapi level to make sure that busy domains (that still have TSG
participants) do not get removed too early.
Adjust error injection sensitive unit tests to match the updated logic.
Jira NVGPU-6425
Jira NVGPU-6427
Change-Id: I1beec97c54c60ad334165b1c0acb5e827c24f2ac
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2632287
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Add ioctls for creating, removing and querying scheduling domains and
interface with the "nvsched" entity that will be the core scheduler.
Include the scheduler in the Linux build.
The core scheduler code will ultimately hold data on and control what
gets scheduled, but this intermediate layer in nvgpu-rm needs a bit of
bookeeping to manage the userspace interface.
To keep changes isolated, this does not touch the internal runlist
domains yet. The core scheduler logic will eventually control the
runlist domains.
Jira NVGPU-6788
Change-Id: I7b4064edb6205acbac2d8c593dad019d517243ce
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2463625
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As the docs of nvgpu_thread say, each thread (which the worker loop is)
should wake up and check also nvgpu_thread_should_stop() to manage
graceful and quick exit as requested. The loop does have that check
already, but the workqueue condition does not, so the cond wait might
end up waiting until its timeout hits.
It's not robust to trust the worker users to have a swift timeout for
exiting the thread, so read the should-stop flag in the wakeup condition
too.
Simplify the clk arb worker ops now that calling
nvgpu_worker_should_stop from there is no longer necessary. (Other
worker users did not have those, so they were technically buggy.)
Change-Id: I5409b8037564d4b6445a15cdbd4f1f3d616c4083
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2635808
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GVS: Gerrit_Virtual_Submit
The list of valid class numbers is inconsistent between SWUD and code.
Remove the non-Volta class numbers from the valid list to ensure
consistency.
Also, there are some common.class files in safety build which are not
needed. Remove files hal/class/class_gm20b.h and
hal/class/class_gp10b.h from safety build.
Enhance common.class SWUD to include hyperlinks and input parameter
validation information.
JIRA NVGPU-6645
JIRA NVGPU-6991
Change-Id: I91f76dfed17bad1ed946070d0c96732047fd4548
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2603768
(cherry picked from commit af36b956ef12d1ef09aed6757d68d5866303b931)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2634753
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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- Separate out local golden context memory allocation from
nvgpu_gr_global_ctx_init_local_golden_image() into a new function
nvgpu_gr_global_ctx_alloc_local_golden_image().
- Add a new member local_golden_image_copy to struct
nvgpu_gr_obj_ctx_golden_image to store copy used for context
verification.
- Allocate local golden context memory from nvgpu_gr_obj_ctx_init()
which is called during poweron path.
- Remove memory allocation from nvgpu_gr_obj_ctx_save_golden_ctx().
- Disable test test_gr_obj_ctx_error_injection since it needs rework
to accomodate the new changes.
- Fix below tests to allocate local golden context memory :
test_gr_global_ctx_local_ctx_error_injection
test_gr_setup_alloc_obj_ctx
Bug 3307637
Change-Id: I2f760d524881fd328346838ea9ce0234358f8e51
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2633713
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tpc_pg_mask_read: function returns the value stored in the
tpc_pg_mask node. Since, it does not have the terminator it
returns garbage value after the mask value and gets troublesome
to parse in the userspace. Fix is to add '\n' at the end of the
mask value to be consistent with the earlier releases.
tpc_pg_mask_store: In this function there is a call to check if
gpu is powered on or not. In case when gpu is powered on, the return
value is just assigned to the 'err' variable which is never
returned to notify the application to follow the next steps. Thus,
need to return this value and inform the same to the userspace.
Bug 3445617
Change-Id: Ibb6fed88c83c751a5fb73181089274aa27c3f18b
Signed-off-by: Ninad Malwade <nmalwade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2630925
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
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The definition of srctree.nvgpu for external modules is specified as a
function of $(MAKEFILE_LIST). This variable gets extended also when
files are included, so any include directives in the makefile affect the
path because srctree.nvgpu is assigned with "?=" which is lazy like "=".
To avoid problems with the lazy init, use ":=" surrounded with an
explicit check to initialize srctree.nvgpu only when undefined.
Jira NVGPU-6427
Change-Id: Ic9847528d0da73f06bc7e421130c9c54247caadb
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2632925
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- When DISALLOW cmd is sent from driver to PMU the actual
completion of the disallow will be acknowledged by PMU
via a new RPC: ASYNC_CMD_RESP.
- Disallow needs a delayed ACK from PMU in order to disable
the ELPG.
- If ELPG is already engaged, the DISALLOW cmd will trigger
ELPG exit and then transition to PMU_PG_STATE_DISALLOW.
- After this whole process is completed, PMU will send
DISALLOW_ACK through ASYNC_CMD_RESP RPC.
- After disallow command is sent from the driver, NvGPU driver
waits/polls for disallow command ack. This is sent immediately
by RPC framework of PMU.
- Then, the driver will poll/wait for ASYNC_CMD_RESP event which
is the delayed DISALLOW ACK.
- The driver captures the ASYNC_CMD_RESP RPC sent from PMU.
- set disallow_state to ELPG_OFF.
- If the driver does not wait/poll for this delayed disallow
ack from PMU, it can result in pmu halt issues as PMU is still
processing DISALLOW cmd but the driver progressed further which
can result in errors.
Bug 3430273
Bug 3439350
Change-Id: If2acf8391d18cd3c6b8b07e3bf6577667ec99eea
Signed-off-by: Divya <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2631214
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GVS: Gerrit_Virtual_Submit
