Nicolas Benech
5137e51da8
gpu: nvgpu: unit: increase commom.mm test coverage
...
This patch adds some corner cases tests to increase coverage.
JIRA NVGPU-4413
Change-Id: I77ed2f1cc4e31336f4815468be80b880f015dde7
Signed-off-by: Nicolas Benech <nbenech@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2293848
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2020-12-15 14:13:28 -06:00
Nicolas Benech
b85094e045
gpu: nvgpu: unit: increase hal.fb test coverage
...
This patch adds some corner cases tests to increase coverage.
JIRA NVGPU-4413
Change-Id: Ifb58c595a0953fdc91580e3d491a1f04143ad9f6
Signed-off-by: Nicolas Benech <nbenech@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2293847
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2020-12-15 14:13:28 -06:00
Nicolas Benech
30755fef04
gpu: nvgpu: mm: use constants for string lengths
...
For VM and allocator names, hardcoded constants were used which
can be a weakness. This patch uses proper defines in headers
instead.
JIRA NVGPU-4946
Change-Id: I1cc100a558d0c44c208a7e579cc36b71a0d4eeec
Signed-off-by: Nicolas Benech <nbenech@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2291069
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2020-12-15 14:13:28 -06:00
Nicolas Benech
e8c02f121b
gpu: nvgpu: vm: plausibility check for nvgpu_vm_bind_channel
...
Ensure that the channel pointer passed to nvgpu_vm_bind_channel
is not NULL.
Update unit test accordingly.
JIRA NVGPU-4947.
Change-Id: I3f987ee9042066df83cc6101b20b4add3661fae8
Signed-off-by: Nicolas Benech <nbenech@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2291034
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2020-12-15 14:13:28 -06:00
Nicolas Benech
16b80d2c5c
gpu: nvgpu: pd_cache: add BUG_ON to guard divide by 0
...
In the unlikely event of a corruption of pentry->pd_size this new
BUG_ON prevents a potential divide by 0. This change is mostly to
increase safety as it is unlikely for a divide by 0 to occur in this
instance.
JIRA NVGPU-4949
Change-Id: Ibdf80670f35a63dd20d06082cde23fb424931933
Signed-off-by: Nicolas Benech <nbenech@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2291022
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2020-12-15 14:13:28 -06:00
Philip Elcan
8366e2980d
gpu: nvgpu: unit: fix typo in static_analysis SWUTS
...
Fix a typo in the doxygen for the static_analysis unit test was
preventing it from being included in the generated SWUTS.
JIRA NVGPU-4825
Change-Id: I3cbc1bb275c28d6d51adce48c74f88593d36ea72
Signed-off-by: Philip Elcan <pelcan@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2293623
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2020-12-15 14:13:28 -06:00
Prateek sethi
51913163a6
gpu: nvgpu: Remove nvgpu_hr_timestamp from safety build
...
nvgpu_hr_timestamp() is not being called from any safe API, so it cab
be removed from the safety build. Patch moves this function and unit
test covers this function to under CONFIG_NVGPU_NON_FUSA flag.
Jira NVGPU-4994
Change-Id: I47d5c22b5a407626d75b10c1c67cdb3e765397b9
Signed-off-by: Prateek sethi <prsethi@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2292895
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2020-12-15 14:13:28 -06:00
ajesh
9c99dc4c4d
gpu: nvgpu: cleanup based on code inspection
...
Fix the following issues in Posix utils unit which were
identified during code inspection,
- Remove the usage of #undef.
- Avoid defining reserved identifiers.
Jira NVGPU-4993
Change-Id: I16189bfad5bba87ee73a26d61d19caefd5d852c2
Signed-off-by: ajesh <akv@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2292415
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Reviewed-by: Scott Long <scottl@nvidia.com >
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2020-12-15 14:13:28 -06:00
Deepak Nibade
b0984cbf05
gpu: nvgpu: fix default ctxsw wdt value
...
MAX wdt timeout value expected by CTXSW is 0x3fff_ffff.
Currenlty nvgpu tries to program it to 0x7fff_ffff.
Fix the hard coded value as per CTXSW expectation.
Bug 200586923
Change-Id: I67e06e988d301006b0c5153c18f5af1630d633b7
Signed-off-by: Deepak Nibade <dnibade@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2292429
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2020-12-15 14:13:28 -06:00
Lakshmanan M
e445d08022
gpu :nvgpu : Add waiter index in syncpt_wait_ext
...
Allocated the following two waiter objects for sync point waith path:
Job tracking and CE threads.
2. QNX channel specific job tracking thread.
The above implementation is only available for QNX.
For Linux, waiter index is skipped.
JIRA NVGPU-3009
Change-Id: If12ad1dc90a24a7b922b205829ca335805c02c3d
Signed-off-by: Lakshmanan M <lm@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2292080
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com >
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2020-12-15 14:13:28 -06:00
Vedashree Vidwans
14ce94df43
gpu: nvgpu: divide functions to reduce complexity
...
This patch divides nvgpu_init_mm_setup_sw() and
nvgpu_vm_init_vma_allocators() functions to reduce code complexity.
Jira NVGPU-4780
Change-Id: I3d94cf44aee2e5e43471b97055c51fa2b0f83d52
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2291817
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Reviewed-by: Nicolas Benech <nbenech@nvidia.com >
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2020-12-15 14:13:28 -06:00
Lakshmanan M
6ed4f57972
gpu: nvgpu: doxygen: Add NVGPU ISOLATION flag
...
JIRA NVGPU-3009
Change-Id: I25f361c616044176c962db11307a09e5ed05ae27
Signed-off-by: Lakshmanan M <lm@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2290281
Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com >
Reviewed-by: Shashank Singh <shashsingh@nvidia.com >
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2020-12-15 14:13:28 -06:00
Abdul Salam
75eabece8b
gpu: nvgpu: Move volt unit from perf to pmu.
...
As a part of refactoring volt unit, move volt struct from
perf to pmu.
This will help to segregate volt from perf as both are
different units.
Add functions to allocate/free volt related structure.
Also remove macro's in Volt unit.
NVGPU-4492
Change-Id: I1b56aeee5e5f1a14c277155f147344275809f8d3
Signed-off-by: Abdul Salam <absalam@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2286477
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2020-12-15 14:13:28 -06:00
ajesh
b342b29600
gpu: nvgpu: add tests for posix thread
...
Add more tests as part of Thread unit test to increase the
branch coverage.
Move struct instances to C file as part of cleanup.
Jira NVGPU-4478
Change-Id: Ie750f67a38abecae4d85327e002d3163539bfef0
Signed-off-by: ajesh <akv@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2292278
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2020-12-15 14:13:28 -06:00
Divya Singhatwaria
374a0a1dbe
gpu: nvgpu: Add traceability and UTS in ACR and PMU
...
- Add unit test specification for PMU unit
- Updated unit test specifcation in ACR unit and add
traceability from test to design.
JIRA NVGPU-4319
JIRA NVGPU-2192
Change-Id: Ic483ec18844cb828002ed7d354cf112f3ea03898
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2289559
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2020-12-15 14:13:28 -06:00
Divya Singhatwaria
6b7527dd0e
gpu: nvgpu: Add more branch coverage for PMU and ACR
...
Adding test scenarios to cover branches for
g->ops.pmu.pmu_isr
nvgpu_pmu_reset
nvgpu_acr_bootstrap_hs_acr
nvgpu_acr_init
Adding new test test_is_pmu_supported()
Also, moved gv11b_write_dmatrfbase() and the related ops
.write_dmatrfbase to non-fusa code under the flag
CONFIG_NVGPU_LS_PMU
JIRA NVGPU-2192
JIRA NVGPU-4319
Change-Id: I489ec5078756d68a4fdb37658e4a89b0d45f8963
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2283715
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2020-12-15 14:13:28 -06:00
ajesh
33c9379b8b
gpu: nvgpu: add test for thread unit
...
Add test as part of Thread UT to increase the branch coverage.
Jira NVGPU-4478
Change-Id: I774e9677fde51d33505081d33193c93ef25617a9
Signed-off-by: ajesh <akv@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2291448
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2020-12-15 14:13:28 -06:00
Thomas Fleury
2d7eb09ab4
gpu: nvgpu: free g->bios on sw init failure
...
nvgpu_bios_sw_init was not freeing g->bios on init failure
(for instance when board does not complete devinit).
As a result, the function was skipping init at the next
nvgpu_finalize_poweron attempt. This was resulting in a
crash later on, when attempting to parse VBIOS data.
Changed nvgpu_bios_sw_init to free g->bios and set it to
NULL, in case init fails.
Bug 2834853
Change-Id: I87bc18b89674141f713c4043a231a437669c9c94
Signed-off-by: Thomas Fleury <tfleury@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2291246
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2020-12-15 14:13:28 -06:00
vinodg
740f26cee5
gpu: nvgpu: fix branch coverage for gr unit
...
Fix branch coverage to the change added in
driver code for checking su_coalesce and lg_coalesce
hal pointers as valid.
Jira NVGPU-4868
Change-Id: I88b34226051697c941811c40b3a0f7928f3b1e2a
Signed-off-by: vinodg <vinodg@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2291208
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2020-12-15 14:13:28 -06:00
Seshendra Gadagottu
40e6206311
gpu: nvgpu: add nvgpu-next gops
...
Add gops for nvgpu-next runlist.
JIRA NVGPU-4968
Change-Id: Ic3b5906c8d6e959eae92652aa84fea9c2e3d15ff
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2291196
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2020-12-15 14:13:28 -06:00
Abdul Salam
b21f300db7
gpu: nvgpu: Refactor Volt unit
...
Current volt unit has multiple header files under pmuif folder.
This has combination of public struct which is accessed outside the
unit and private struct which is accessed within volt unit.
This patch segregates them based on their accessibility.
All private items are moved into ucode_volt_inf.h from pmuif which only
volt can access.
All public items are moved into include/volt.h which other units can
access
This will help in documentation of items for public items.
NVGPU-4492
Change-Id: Id40bf4922408a55f1e67d071be726839ac57718f
Signed-off-by: Abdul Salam <absalam@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2289114
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2020-12-15 14:13:28 -06:00
vinodg
7852d452ee
gpu: nvgpu: Add test to cover FECS watchdog timeout
...
Add unit test to cover the FECS watch timeout method
in gm20b.
Correct the file and function name to gm20b from gk20a.
Bug 200586923
Change-Id: I447e26c7d898f3967ad2de7a7e4a7457264941b5
Signed-off-by: vinodg <vinodg@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2290643
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2020-12-15 14:13:28 -06:00
Peter Daifuku
86e030a18a
gpu: nvgpu: add struct nvgpu_sched_ctrl to gk20a
...
Add struct nvgpu_sched_ctrl to struct gk20a
Delete struct gk20a_sched_ctrl from struct nvgpu_os_linux
Update sched_ctrl functions to use the nvgpu_sched_ctrl struct
Bug 200576520
Change-Id: I35b13219e5ef0a8a03333dfd7d46e1d308aec541
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279152
(cherry picked from commit 9e9046f03c )
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2288466
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2020-12-15 14:13:28 -06:00
Seshendra Gadagottu
b811a0b755
gpu: nvgpu: add hal for fecs ctsw clear mailbox
...
Add hal to have chip specific fecs ctxsw mailbox clear function.
This hal has following prototype with mailbox reg_index and bitmask
for clear_val:
void (*fecs_ctxsw_clear_mailbox)(struct gk20a *g,
u32 reg_index, u32 clear_val);
JIRA NVGPU-4870
Change-Id: I1d20309224f856872dc97040ecf7628c60fb2802
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2287921
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2020-12-15 14:13:28 -06:00
Thomas Fleury
b57bd925f9
gpu: nvgpu: remove spew in nvgpu_bug_init
...
Remove debug trace left in nvgpu_bug_init.
Bug 2834132
Jira NVGPU-4512
Change-Id: Idc3b8e29bbbf0ed2b90cbdd5d188351d82e3aa6e
Signed-off-by: Thomas Fleury <tfleury@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2286669
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2020-12-15 14:13:28 -06:00
Sagar Kamble
992aaebfc4
gpu: nvgpu: mc: fix the header guards for hal files
...
Header guards in gp10b, gv11b and gv100 MC hal files were not as per
naming convention. Fix those.
JIRA NVGPU-4795
Change-Id: Ifc8c162e43242a5d221e5685ceecb02b76944a96
Signed-off-by: Sagar Kamble <skamble@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2288031
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2020-12-15 14:13:28 -06:00
Sagar Kamble
ded9241b1d
gpu: nvgpu: detach previous attachment on re-mapping
...
If the dmabuf attachment is not stored in the dmabuf priv data, on
re-mapping the buffer, new attachment is prepared and the same is
detached on finding existing mapping. Prior attachment is not
detached in nvgpu_vm_find_mapping.
However mapped_buffer stores the recent attachment that is detached.
Hence on last unmap it will result in NULL access. Hence, detach the
attachment stored in mapped_buffer in nvgpu_vm_find_mapping.
Bug 2834141
Change-Id: I0c3c0b1c684b4984dba4f39edb8610b94961291e
Signed-off-by: Sagar Kamble <skamble@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2290313
Tested-by: Debarshi Dutta <ddutta@nvidia.com >
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Reviewed-by: Debarshi Dutta <ddutta@nvidia.com >
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2020-12-15 14:13:28 -06:00
Debarshi Dutta
249418b90b
gpu: nvgpu: addon to RC unit
...
Added entries to SWUTS.sources and required_tests.json
Jira NVGPU-4385
Change-Id: I8300645d0ea63e9e016d602f1cc4cf1d4104f45b
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2287600
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2020-12-15 14:13:28 -06:00
Nitin Kumbhar
fa75e9d2de
gpu: nvgpu: add checks for sizes of data types
...
Check sizes of the data types considered as "same types" in
the CERT-C EXP37-C deviation record.
JIRA NVGPU-3561
Change-Id: I99c0da1adfee6c4809aa1439e67aae57baa2642d
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2282951
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2020-12-15 14:13:28 -06:00
ajesh
73df40d9d4
gpu: nvgpu: add kmem in SWUTS
...
Add posix kmem unit in SWUTS files.
Jira NVGPU-4478
Change-Id: I700d2f81b63ea0e4e8b1aa9621a02dddf4841d78
Signed-off-by: ajesh <akv@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2290219
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2020-12-15 14:13:28 -06:00
ajesh
057d746690
gpu: nvgpu: make circ_buf and log2 as safe
...
Mark circ_buf and log2 units under posix as safe units.
Jira NVGPU-4417
Change-Id: Ifd486242f94884f9696f18af0412b17c2517f21e
Signed-off-by: ajesh <akv@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2289637
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2020-12-15 14:13:28 -06:00
Seema Khowala
57d6721ce3
gpu: nvgpu: add NULL check for su/lg_coalesce
...
su_coalesce and lg_coalesce hals are chip specific and
not all the chips need to set su/lg. Add NULL check for
these hals.
Also add hooks for nvgpu-next fuse.
JIRA NVGPU-4868
Change-Id: Ic89d3fb7669f86dcdd6e36c7f832e64958cb9576
Signed-off-by: Seema Khowala <seemaj@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2288652
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GVS: Gerrit_Virtual_Submit
2020-12-15 14:13:28 -06:00
rmylavarapu
aa20b36597
gpu: nvgpu: Refactor Therm unit
...
-Created ucode_therm_inf.h header to include all
interface struct and macros from pmuif folder
-Removed thrmpmu.c/.h files and moved all those
functions into thrm.c file
-Renamed functions into public/private format
NVGPU-4449
Change-Id: I8015679351648e94b2d8dd22548c727294b4ddcb
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2286333
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2020-12-15 14:13:28 -06:00
Thomas Fleury
9a16bc3fd4
gpu: nvgpu: wait ACK for FECS watchdog timeout
...
From gv11b onwards, FECS ucode returns an ACK for set watchdog
timeout method. Failure to wait for this ACK was leading to races,
and in some cases, the ACK could be mistaken for the reply to the
next method.
In particular, this happened for the discover golden image size
method which is sent after set watchdog timeout.
With instrumented FECS ucode, it takes longer for the code to
process the set watchdog timeout method, and the write to ack
that method could happen after nvgpu driver clears the mailbox to
send the discover image size method.
With an invalid golden context image size, FECS ended up causing
an MMU fault while attempting to save past allocated buffer.
Added NVGPU_GR_FALCON_METHOD_SET_WATCHDOG_TIMEOUT to be used with
gops_gr_falcon.ctrl_ctxsw, and implemented 2 variants:
- gm20b_gr_falcon_ctrl_ctxsw, without ACK
- gv11b_gr_falcon_ctrl_ctxsw, with ACK
Added NVGPU_GR_FALCON_SUBMIT_METHOD_F_LOCKED flag to allow
executing above method without re-acquiring FECS lock. Longer term,
the 'flags' could be added to gop_gr_falcon.ctrl_ctxsw parameters.
Use gops_gr_falcon.ctrl_ctxsw instead of register writes to invoke
set watchdog timeout method in gm20b_gr_falcon_wait_ctxsw_ready.
Also replaced calls to gm20b_gr_falcon_ctrl_ctxsw to
gops_gr.falcon.ctrl_ctxsw when appropriate, since there are
multiple variants (gm20b, gp10b and gv11b).
Last, fixed clearing of mailbox 0 in gm20b_gr_falcon_bind_instblk.
Bug 200586923
Change-Id: I653b9a216555eec8cd4bb01d6f202bc77b75a939
Signed-off-by: Thomas Fleury <tfleury@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2287340
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2020-12-15 14:13:28 -06:00
Abdul Salam
e21d70574c
gpu: nvgpu: Fix mismatch in Volt boardobj parsing
...
There is a mismatch between data parsed by nvgpu struct to pmu struct.
This patch fixes this by correctly parsing the data from vbios and
sending it to pmu.
This was unnoticed till now and started poping up during refactoring.
NVGPU-4492
Change-Id: I75648de41832eadd39aa499a5354705694699238
Signed-off-by: Abdul Salam <absalam@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2289748
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2020-12-15 14:13:28 -06:00
Nicolas Benech
f206c1df9c
gpu: nvgpu: unit: update sync SWUTS for sync_ro_map
...
Adds gops_sync.gops_sync_syncpt.get_sync_ro_map to sync SWUTS.
JIRA NVGPU-3510
Change-Id: I94e0859727a91d997d69bd64ddbb40cd2c723919
Signed-off-by: Nicolas Benech <nbenech@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2289245
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com >
Reviewed-by: Alex Waterman <alexw@nvidia.com >
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2020-12-15 14:13:28 -06:00
Nicolas Benech
f97335e723
gpu: nvgpu: unit: update bug SWUTS for nvgpu_assert
...
Adds nvgpu_assert to bug SWUTS.
JIRA NVGPU-3510
Change-Id: I7fcb00cf435d70d5536a783ad0fd4c159a77a0e3
Signed-off-by: Nicolas Benech <nbenech@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2289244
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com >
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2020-12-15 14:13:28 -06:00
Nicolas Benech
acd459237a
gpu: nvgpu: unit: update FIFO SWUTS for inst_block
...
Adds nvgpu_inst_block_addr and nvgpu_free_inst_block to FIFO SWUTS.
JIRA NVGPU-3510
Change-Id: Ia65a53dfe7f976c271c2f7cc5da9ffa9d676aac4
Signed-off-by: Nicolas Benech <nbenech@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2289243
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2020-12-15 14:13:28 -06:00
Nicolas Benech
c70a3a9fff
gpu: nvgpu: unit: update FB SWUTS for gops_fb and gv11b*
...
Adds some gops_fb.* and several gv11b HALs to FB SWUTS.
JIRA NVGPU-3510
Change-Id: Id68be50a06e1cd52be8413e2aed9d59ada776459
Signed-off-by: Nicolas Benech <nbenech@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2289242
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com >
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2020-12-15 14:13:28 -06:00
Nicolas Benech
e903146040
gpu: nvgpu: unit: update ECC SWUTS for gops_ecc
...
Adds some gops_ecc.* to ecc SWUTS.
JIRA NVGPU-3510
Change-Id: I9e5d783b7cde60434279bcc77f04b4a519c4caf1
Signed-off-by: Nicolas Benech <nbenech@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2289241
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com >
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2020-12-15 14:13:28 -06:00
Nicolas Benech
da0fb30256
gpu: nvgpu: unit: add SWUTS for interface.list
...
This patch adds SWUTS for interface.list and moves the unit test
files to the appropriate 'interface' folder.
JIRA NVGPU-3510
Change-Id: I6d67d784fcf4d89ba4ee7cfe5f5d7a0e558d71a8
Signed-off-by: Nicolas Benech <nbenech@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2289225
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2020-12-15 14:13:28 -06:00
Seema Khowala
8c01512e12
gpu: nvgpu: add ops in gr.falcon
...
- add gr.falcon.fecs_dmemc_write ops
- add gr.falcon.fecs_imemc_write ops
- add gr.falcon.gpccs_dmemc_write ops
- add gr.falcon.gpccs_imemc_write ops
This is required for nvgpu-next.
JIRA NVGPU-4908
Change-Id: I71c59aebf21276146ee62880d6739e850ef3fc78
Signed-off-by: Seema Khowala <seemaj@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2288878
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2020-12-15 14:13:28 -06:00
ajesh
9c40a7389d
gpu: nvgpu: fix issue with DIV_ROUND_CLOSEST
...
Fix the issue in DIV_ROUND_CLOSEST implementation. Current
implementation will have issues for an input of two negative
numbers. For example, Input values of a = -13 and divisor = -5
should ideally give result as 3. But because of the third condition
check ie.(val) > 0, the result would be given incorrectly as 2
with the current implementation. Modify the condition to handle
two negative number division.
Jira NVGPU-4478
Change-Id: Ifb3f58b4ff742abbb59fda328c1b5facdcb1b38b
Signed-off-by: ajesh <akv@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2284320
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2020-12-15 14:13:28 -06:00
Dinesh
30dd0732bf
nvgpu: nvgpu_doc: Doxygen chnages for nvhost
...
This is adding doxygen changes for nvhost unit.
Change-Id: If398fa2fb588a00da4eaa73a69272800a0afcf98
Signed-off-by: Dinesh <dt@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2288367
Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com >
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2020-12-15 14:13:28 -06:00
Sagar Kamble
a3ef9cf7df
gpu: nvgpu: power_features: address code inspection gaps
...
Address following code inspection gaps:
1. Fix the header guards for *gating_reglist.h files.
2. Remove ctxsw_firmware slcg/blcg mention from doxygen
comments as that hal is removed.
3. Add therm slcg function and description to doxygen.
4. Add defgroups for including enums/macros in swud.
JIRA NVGPU-4797
Change-Id: I26f2e50b556bcac1486175143ab070f0c3c56c36
Signed-off-by: Sagar Kamble <skamble@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2288030
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2020-12-15 14:13:28 -06:00
sagar
14384edb68
nvgpu: force cilp in cta
...
For integration testing in safety build, we need to test ctxsw firmware
header interface. inorder to validate we populate header with
unsupported data.
Use CONFIG_NVGPU_CTXSW_FW_ERROR_HEADER_TESTING for testing CILP error.
JIRA NVGPU-4471
Change-Id: Ibcd2f9cccc7a85403d2b006ad8164e37592ccaa1
Signed-off-by: sagar <skadamati@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2284602
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2020-12-15 14:13:28 -06:00
Vedashree Vidwans
f2446737fd
gpu: nvgpu: fifo: add coverage & traceability
...
This patch adds new channel and sync test to improve coverage. This
patch also updates SWUTs target tag to increase function traceability
and updates test type.
Jira NVGPU-4817
Change-Id: I52a7fa27f61e7e465d2ede25b92745413f17e50b
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2280963
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2020-12-15 14:13:28 -06:00
ajesh
37d2f533d0
gpu: nvgpu: update the header guard for file_ops
...
Update the header guard as per the guidelines for file_ops unit.
Jira NVGPU-4910
Change-Id: Ia8ab30fcb76a3bd837ddad891581977d8390f321
Signed-off-by: ajesh <akv@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2288068
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Reviewed-by: Prateek Sethi <prsethi@nvidia.com >
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2020-12-15 14:13:28 -06:00
Sagar Kamble
57f3968cb9
gpu: nvgpu: mc: address code inspection gaps
...
Address following issues uncovered during inspection:
1. Remove the doxygen comment from nvgpu_wait_for_deferred_interrupts
definition.
2. Use NVGPU_MC_INTR_STALLING instead of hardcoding the index.
3. Define doxygen groups NVGPU_MC_UNIT_ENUMS,
NVGPU_MC_INTR_TYPE_DEFINES, NVGPU_MC_INTR_UNIT_DEFINES and
NVGPU_MC_INTR_ENABLE_DEFINES.
4. Update the doxygen comments.
5. Fix the cleanup, typo in the description of the test
test_wait_for_deferred_interrupts.
JIRA NVGPU-4795
Change-Id: Ifc6756832aabf9dd42ee174eb1373495e6d38c86
Signed-off-by: Sagar Kamble <skamble@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2287627
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2020-12-15 14:13:28 -06:00
ajesh
d794ec926c
gpu: nvgpu: add unit tests for log2
...
Add unit tests for posix log2 unit.
Fix the build issue with rounddown_pow_of_two macro.
Jira NVGPU-4417
Change-Id: I244aa4ae2f8c5e682e263784b4efbf9cd372379e
Signed-off-by: ajesh <akv@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2286955
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2020-12-15 14:13:28 -06:00