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2560 Commits

Author SHA1 Message Date
Rajesh Devaraj
bf5fd03a10 gpu: nvgpu: update doxygen for error reporting 
This patch updates the doxygen documentation for error reporting
related APIs to address review comments for SDL SWUD.

JIRA NVGPU-6181

Change-Id: Ic937492cd539bdb1bce6eb1bc7b02ec1c07b69e4
Signed-off-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2467194
(cherry picked from commit 5b188895c29895042bdd660ba5e10bf161bf21e4)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2468255
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Dinesh T <dt@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
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GVS: Gerrit_Virtual_Submit
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 2021-01-11 06:26:51 -08:00
shashank singh
76f766d6ac gpu: nvgpu: add full documentation for gk20a header file 
-Document all structure fields defined in gk20a.h.
-Add few missing documentation for gk20a struct.
-Add return value for the public APIs of common.nvgpu unit.

Jira NVGPU-6252

Change-Id: I6726d83f6d1a4db5f24c0d94093b2c00263d220a
Signed-off-by: shashank singh <shashsingh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2459287
(cherry picked from commit 9f6f1eddee9ac39918fca345917490e2063bc01e)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2466601
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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 2021-01-07 11:15:08 -08:00
Deepak Nibade
cae88e7451 gpu: nvgpu: initialize cau data while binding HWPM in global mode 
Add CAU initialization data in const array hwpm_cau_init_data[].
Add HAL API gops.gr.get_hwpm_cau_init_data() to retrieve this data
and implement it for TU104.

Add new HAL API gops.gr.init_cau() that uses above data and
initializes all cau units. Implement this HAL only for TU104.

Invoke above sequence from nvgpu_profiler_bind_hwpm() in case of
global HWPM mode.

Jira NVGPU-5360

Change-Id: I1c7a380e9d04d6cd45fb7f746c0a79fc56675244
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2463854
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 2021-01-05 12:39:54 -08:00
mkumbar
ff2bfbd229 gpu: nvgpu: update doxygen comments for falcon 
update the doxygen comments for falcon unit.

Jira NVGPU-6233

Change-Id: I04d5aa1f18a658c7f391ae3259deae0be45c2ad9
Signed-off-by: mkumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2463948
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
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 2021-01-05 12:39:38 -08:00
mkumbar
6e22ebf9f8 gpu: nvgpu: update doxygen comments for pmu 
update the doxygen comments for pmu unit.

Jira NVGPU-6234

Change-Id: I7b06479208e93d5a8715b51d2dfacba7be60c186
Signed-off-by: mkumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2463947
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
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 2021-01-05 12:39:32 -08:00
mkumbar
5aa2311a88 gpu: nvgpu: update doxygen comments for acr 
update the doxygen comments for acr unit.

Jira NVGPU-6232

Change-Id: Ie8ab6137f4902d7fd1aff864911e80359818d5ad
Signed-off-by: mkumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2461961
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 2021-01-05 12:39:27 -08:00
Deepak Nibade
a0fb91846d gpu: nvgpu: set regop type based on per-resource ctxsw flag 
New profiler APIs set regop type based on whether context is bound or
not in nvgpu_prof_get_regops_staging_data(). But it is possible that
ctxsw is not enabled for some particular HWPM resource even if context
is bound to profiler object.

Fix this by extracting regop type based on per-resource ctxsw flag
instead of bound context.

Add reg_op_type[] array in profiler object to track regop type for each
HWPM resource. Initialize the array based on resource ctxsw flag in
nvgpu_profiler_pm_resource_reserve().

Update profiler_obj_validate_reg_op_offset() to get regop type from
nvgpu_profiler_validate_regops_allowlist() and use this type and
prof->reg_op_type[] to get actual type that should be used for that
regop.

Update validate_reg_ops() to validate the offset first since regop
type is now determined in offset validation. Set ops[i].status to 0
for each validation iteration, and if op is valid set it to
REGOP(STATUS_SUCCESS) at the end of iteration.

Bug 2510974
Jira NVGPU-5360

Change-Id: Ib1f75d840d04d288789473adabda02cdc807eea0
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2460003
Reviewed-by: Antony Clince Alex <aalex@nvidia.com>
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 2021-01-05 12:38:17 -08:00
Deepak Nibade
7158db453c gpu: nvgpu: add test offsets to allowlist 
Add ptimer register offsets to regops allowlist for testing. New
allowlist restricts regops only to reserved resources, this makes it
difficult to test the interface since only HWPM registers can be
accessed and that could have side effects on system.

Having ptimer registers as test offsets has advantage that the offsets
do not change across chips, registers are read-only, and values are
always incrementing so a test can verify read regops and test various
flags of interface.

Add gops.ptimer.get_timer_reg_offsets() HAL to return timer offsets.

Add static function add_test_range_to_map() that adds timer offsets to
allowlist always.

In nvgpu_profiler_validate_regops_allowlist() return success if timer
offsets are hit in range search.

Bug 2510974
Jira NVGPU-5360

Change-Id: I8b51bb92e43e8b1bbe903c874a429341659ef603
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2460002
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 2021-01-05 12:38:12 -08:00
Deepak Nibade
869735cda4 gpu: nvgpu: add dynamic allowlist support 
Add gv11b and tu104 HALs to get allowed  HWPM resource register ranges,
offsets, and stride meta data.

Add new enum nvgpu_pm_resource_hwpm_register_type for HWPM register
type. Add new struct nvgpu_pm_resource_register_range_map to store all
the register ranges for HWPM resources. Add pointer of map in struct
nvgpu_profiler_object along with map entry count.

Add new API nvgpu_profiler_build_regops_allowlist() to build the regops
allowlist dynamically while binding the resources. Map entry count is
received with get_pm_resource_register_range_map_entry_count() and only
those resource ranges are added for which resource is reserved by
profiler object.

Add nvgpu_profiler_destroy_regops_allowlist() to destroy the allowlist
while unbinding the resources.

Add static functions allowlist_range_search() to search a register
offset in HWPM resource ranges. Add another static function
allowlist_offset_search() to search the offset in per-resource offset
list.

Add nvgpu_profiler_validate_regops_allowlist() that accepts an offset
value, checks if it is in allowed ranges using allowlist_range_search()
and then checks if offset is in allowlist using allowlist_offset_search().

Update gops.regops.exec_regops() to receive profiler object pointer as
a parameter.

Invoke nvgpu_profiler_validate_regops_allowlist() from
validate_reg_ops() if prof pointer is not-null. This will be true only
for new profiler stack and not legacy profilers.

In gr_exec_ctx_ops(), skip regops execution if offset is invalid.

Bug 2510974
Jira NVGPU-5360

Change-Id: I40acb91cc37508629c83106ea15b062250bba473
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2460001
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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 2021-01-05 12:38:06 -08:00
Seema Khowala
6f2b2aa233 gpu: nvgpu: fifo: fix DOXYGEN_SHOULD_SKIP_THIS 
"DOXYGEN_SHOULD_SKIP_THIS" string should not be present in
SWUD.

Jira NVGPU-6179

Change-Id: I1695dc96a6095276818f49c61823dae43b502f47
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2459229
(cherry picked from commit a783c9169a0eed3aa7217c79c91227b33889a922)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2462216
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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 2020-12-29 10:45:07 -08:00
Prateek sethi
a0ee546ad7 gpu: nvgpu: doxygen update for os_utils 
Update the doxygen comments for firmware and intr APIs.

Jira NVGPU-6258

Change-Id: I035be3ed249b0766d27cefeb8fc573859069f0d5
Signed-off-by: Prateek sethi <prsethi@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2457814
(cherry picked from commit 9a09e754aacb0b87ab61e39e5966da46fd85481c)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2463906
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GVS: Gerrit_Virtual_Submit
 2020-12-28 13:04:25 -08:00
ajesh
4303579e38 gpu: nvgpu: update doxygen comments for posix 
Update the doxygen comments for various posix units.

Jira NVGPU-6253

Change-Id: Iedada7e344b51f2075c783598ba2f32102c1b8c9
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2457340
(cherry picked from commit 7ae2fbae2fa3759393339bf1b30b196b2f525215)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2461963
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 2020-12-28 09:53:04 -08:00
Deepak Nibade
9221b01968 gpu: nvgpu: implement HWPM streamout teardown sequence 
Implement below functions:

- nvgpu_profiler_quiesce_hwpm_streamout_resident
Teardown sequence when context is resident or in case profiling
session is a device level session.

- nvgpu_profiler_quiesce_hwpm_streamout_non_resident
Teardown sequence when context is non resident

- nvgpu_profiler_quiesce_hwpm_streamout
Generic sequence to call either of above API based on whether
context is resident or not.

Trigger HWPM streamout teardown sequence while unbinding resources
in nvgpu_profiler_unbind_hwpm_streamout()

Add a new HAL gops.gr.is_tsg_ctx_resident to call
gk20a_is_tsg_ctx_resident() from common code.

Implement below supporting HALs for resident teardown sequence:
- gops.perf.pma_stream_enable()
- gops.perf.disable_all_perfmons()
- gops.perf.wait_for_idle_pmm_routers()
- gops.perf.wait_for_idle_pma()
- gops.gr.disable_cau()
- gops.gr.disable_smpc()

Jira NVGPU-5360

Change-Id: I304ea25d296fae0146937b15228ea21edc091e16
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2461333
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 2020-12-18 15:26:21 -08:00
Deepak Nibade
ce8358ef2b gpu: nvgpu: update common.gr doxygen to match swud 
Update doxygen comments for common.gr functions used in initialization,
context creation, and interrupt handling usecases to closely match
design description in SWUD.

Add details on why those APIs are needed.

Jira NVGPU-6180

Change-Id: I6f987a797eb9412a0a8853b37c9f13f18d9717c2
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2459526
(cherry picked from commit 0dffeb056656b403ef3bc2ef2c54732da5de2bd9)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2461159
GVS: Gerrit_Virtual_Submit
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Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com>
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 2020-12-18 03:29:30 -08:00
Deepak Nibade
462853ab71 gpu: nvgpu: update common.gr doxygen 
- Use retval keyword instead of return keyword for return values.
- Add note to refer gops_class to get valid classes. Also add a note
  that graphics classes are treated as invalid classes in safety.
- Note specific preemption modes that are allowed by API to set
  preemption modes.
- Fix typos.

Jira NVGPU-6180

Change-Id: Ida0a78ba3e70e83f0f091f16b90b7cb9636d2468
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2456706
(cherry picked from commit 5e583a44dee4ead74438d49f8f674189ff4803c0)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2461158
GVS: Gerrit_Virtual_Submit
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Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com>
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 2020-12-18 03:29:22 -08:00
ajesh
e49c5a5cce gpu: nvgpu: move macros under NON_FUSA flag 
Move macros in posix unit that are not used by safety code
under NON_FUSA flag.

Jira NVGPU-6253

Change-Id: If4227b4a5d8c35652e324e0cf5276293e29fa3f2
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2459298
(cherry picked from commit 86c1b4ca98f9ff7104a1c2e6ce5512a44aafa832)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2461111
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 2020-12-18 03:29:04 -08:00
ajesh
d0e76cc4a3 gpu: nvgpu: update doxygen comments for utils 
Update the doxygen comments for common utils unit.

Jira NVGPU-6236

Change-Id: I2d842baaf2efea66673f700b6926c6a16b468bbd
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2457841
(cherry picked from commit 88b83544696c350933082c8c88bce985837213ac)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2459913
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 2020-12-18 03:28:16 -08:00
mkumbar
65111b64f2 gpu: nvgpu: Add RISCV LS PMU support 
-Add RISCV LS PMU support by adding RISCV LS PMU ucode to the blob.
-Modify the PMU RTOS sequence based on NEXT CORE enable flag.

JIRA NVGPU-6303

Change-Id: I4e2b989f9903b72a6327c931eb3c02f8cef2aa75
Signed-off-by: mkumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2447388
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 2020-12-17 18:36:44 -06:00
Prateek sethi
5767c36312 nvgpu: compile out g->max_comptag_mem from safety build 
max_comptag_mem is being used only for CBC unit which is not a part of
safety build. Remove max_comptag_mem from safety build.

Jira NVGPU-6258

Change-Id: I4773468174ca261ec90a09ffaadb853acc4352f0
Signed-off-by: Prateek sethi <prsethi@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2455874
(cherry picked from commit 1262f7b268df8d64c91d5960a26a5ab9a58749d5)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2460386
GVS: Gerrit_Virtual_Submit
Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com>
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 2020-12-17 18:36:44 -06:00
Prateek sethi
fe3e6a00b5 gpu: nvgpu: compile out NON FUSA IO APIs 
Patch removes declarations for IO NON FUSA APIs.

Jira NVGPU-6238

Change-Id: Iea52d6c0a54b65bebe92b6abfeb8e585963631d0
Signed-off-by: Prateek sethi <prsethi@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2451361
(cherry picked from commit 66446f0ce2d9b65e48201400ca09eaa625026384)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2460379
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Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
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 2020-12-17 18:36:44 -06:00
Prateek sethi
9a618aaef3 nvgpu: update details of return types 
Patch updates the doxygen for APIs nvgpu_enable_irqs and
nvgpu_init_soc_vars and adds describe the error codes which can be
returned by these APIs.

Jira NVGPU-6258

Change-Id: I002d25865eec6e3fa52250fd25880bf259358f1d
Signed-off-by: Prateek sethi <prsethi@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2455856
(cherry picked from commit 01c7f3398622047bdf3d46024c1b51223461cba7)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2460377
GVS: Gerrit_Virtual_Submit
Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com>
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 2020-12-17 18:36:44 -06:00
dt
ec4e8c7613 gpu: nvgpu: Doxygen: Change the return value format 
This is changing the return value format.

JIRA NVGPU-6259

Change-Id: Ic889328e5aaf6716837e594d6b9876e0cf8a5d56
Signed-off-by: dt <dt@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2457892
(cherry picked from commit 707cdaf7600300cd1612cac53714a3118b4b3b6f)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2459284
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 2020-12-15 14:13:48 -06:00
shashank singh
e13f0db093 gpu: nvgpu: add doxygen comments for missing gk20a fields 
Many fields of struct gk20a is missing documentation and not all
non-safety fields are skipped. Document all safety fields and skip
non-safety fields of struct gk20a.

Jira NVGPU-6252

Change-Id: I5c280e812f6398c0984db11f9ad144b67a532ab3
Signed-off-by: shashank singh <shashsingh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2457268
(cherry picked from commit 85d47e3e7f3708f0403ff3810b168862432c29e0)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2457263
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:48 -06:00
Sagar Kamble
bd7bda4f98 gpu: nvgpu: do_idle/unidle handling with runtime PM after probe 
Extend the runtime suspend/resume based idle/unidle logic in the
probe case to handling done in gk20a_do_idle/unidle for nvgpu
after the probe completion.

If the railgating is disabled, setting autosuspend_delay to 0 will
enable the suspend. If railgating is enabled, autosuspend delay
will be > 0. Setting it to 0 will enable the immediate suspend.

With this approach based on RPM, forced_reset logic is removed.
force_reset_in_do_idle is also removed as railgating is
supported.

Bug 200602747
JIRA NVGPU-5356

Change-Id: Iaf6d5ab651b8200f0547b45d90f812110cf63c0e
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2375941
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:48 -06:00
Sagar Kamble
4012a97640 gpu: nvgpu: enable runtime PM before secure_alloc init during probe 
With genpd based runtime PM, the device railgating is managed by the PM
core and the nvgpu manages the clocks. To suspend/resume the device for
idling/unidling while initializing secure alloc, runtime PM is to be
enabled during probe.

nvgpu platform railgate handlers will be only managing the clocks.
During probe, the nvgpu driver poweroff/poweron are not to be
invoked as part of driver runtime suspend/resume hence probe
state is added.

After platform probe initializes the clock, explicit runtime resume of
the device is required to sanely suspend it during gk20a_do_idle.

Runtime PM configuration differs based on the NVGPU_CAN_RAILGATE
capability, hence the runtime PM is enabled ("truly") only for
the duration of nvgpu_probe and then the state is reverted at
the beginning of gk20a_pm_late_init.

Bug 200602747
JIRA NVGPU-5356

Change-Id: I1fbd03d3f49da07ccbee9714387e00ffc688864e
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2375939
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:48 -06:00
Mayur Poojary
160c6c16bd gpu: nvgpu: Add auto-generated regops allowlist 
Add auto-generated regops allowlist files for gv11b and tu104.
Update Makefiles accordingly.

Bug 2510974
Bug 200668999
Jira NVGPU-5360

Change-Id: I5bc6a220ef6f90838e0ba735b1ee8e97d8f9215f
Signed-off-by: Mayur Poojary <mpoojary@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2423637
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:48 -06:00
smadhavan
d3509af0f5 gpu: nvgpu: add next-core selection flag for acr 
NVGPU_ACR_NEXT_CORE_ENABLED indicates which core to
use for acr bootstrap. This flag will be set based on PMU
and GSP core selection fuses in case of non-safety
and safety builds respectively

Change-Id: Id8daca20ba56648c1d7074ea2dd2384739c88704
Signed-off-by: smadhavan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2455895
Reviewed-by: svcguardwords <svcguardwords@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Deepak Goyal <dgoyal@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:48 -06:00
tkudav
05e3482106 gpu: nvgpu: Enhance doxygen for common.ptimer APIs 
Add details about the purpose served by the common.ptimer APIs.

JIRA NVGPU-6235

Change-Id: I4e4716135649aa611646e63c1b4e9b37eacde60b
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2456005
(cherry picked from commit 7b8907a0e8445d7b97fd0fdd2ca763e039b5893c)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2457621
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:48 -06:00
tkudav
2ee6a0f554 gpu: nvgpu: Add details to common.class APIs 
Add more details about the purpose served by the common.class
APIs.

JIRA NVGPU-6244

Change-Id: I16e4d62175a05ff6f71b7148d1ea7874d1fe01ac
Signed-off-by: tkudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2455939
(cherry picked from commit 5ad0a0b6fdc1b68fea6570bf434bf479f8bd05ea)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2457393
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:48 -06:00
tkudav
882e418d1b gpu: nvgpu: Add details to common.fbp API retval 
Add doxygen comments to describe the possible return values from
common.fbp API in case of error.

JIRA NVGPU-6237

Change-Id: Ifff997f18d61f855fc83914fbbe4ea09c5fafbaf
Signed-off-by: tkudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2455034
(cherry picked from commit 5d646ef5d3f18c91f2d60c0abf4cecb84154bf4a)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2457392
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:48 -06:00
mkumbar
c62cfa2efb gpu: nvgpu: get PMU NEXT core irqmask 
-Add new PMU ops to get NEXT core irq mask
-Add support to handle NEXT core interrupt request.

Bug 200659053
Bug 3199589

Change-Id: I78738f074a425f8934bbba28bf6996eeec7ab05a
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2457077
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:48 -06:00
Antony Clince Alex
48265944c4 gpu: nvgpu: update doxygen for common.ecc unit 
Updated doxygen comments for common.ecc unit functions to better
describe return values.

Jira NVGPU-6248

Change-Id: I36e94d7e41e28072c4bb0699024724e25fe3b35c
Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2456423
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:48 -06:00
mkumbar
ee7cdf1fff gpu: nvgpu: Add multiple signature parsing support for ACR 
- Add multiple signature parsing support for ACR using ucode version
fuse value.
-Signature file contains multiple signatures and need to select
one signature using ucode version to validate the ucode.

Bug 200673810

Change-Id: I39007d4e2e8bb959caf278275d153b633a775def
Signed-off-by: mkumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2455171
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Dinesh T <dt@nvidia.com>
Reviewed-by: Lakshmanan M <lm@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:48 -06:00
Lakshmanan M
d85588c9a3 gpu: nvgpu: update doxygen for some mm public functions 
This patch updates the doxygen for following mm functions that
are used by other sub-units in GPU to mm unit.

1) Initialize MM
2) GMMU Map
3) GMMU Unmap
4) VM Init
5) VM Map
6) VM UnMap

JIRA NVGPU-5932

Change-Id: Ia4ff43d7afc96f853d69c8cf88dfcb27a9bc3548
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2454483
Reviewed-by: svcguardwords <svcguardwords@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:48 -06:00
Joshua Widen
60f44506a3 Revert "gpu: nvgpu: get PMU NEXT core irqmask" 
This reverts commit 4ff427c51619cecdcc74fdbb388d82421cf45655.

Reason for revert: Testing for regression seen in GVS.

Bug 3198736

Change-Id: If12da341c3e13907bdcbb778c8fb4118cd5e3803
Signed-off-by: jwiden <jwiden@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2456791
Reviewed-by: svcguardwords <svcguardwords@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:48 -06:00
dt
ea5fe7c66c gpu: nvgpu: doxygen: update return values 
This is updating return values of some APIs.

JIRA NVGPU-6259

Change-Id: Ic54dd7988b0704cd845f977add83ffbadf2424fb
Signed-off-by: dt <dt@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2453981
(cherry picked from commit 28b1aca455d9ee11455b92a3a07c92487e9f00e6)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2455954
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svcguardwords <svcguardwords@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:48 -06:00
mkumbar
8284832300 gpu: nvgpu: get PMU NEXT core irqmask 
-Add new PMU ops to get NEXT core irq mask
-Add support to handle NEXT core interrupt request.

Bug 200659053

Change-Id: I8b1c9b9d74ed59b4130fea712f970b4a31a8b4fe
Signed-off-by: mkumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2429042
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:48 -06:00
Lili Sang
3f0ea98b73 gpu: nvgpu: Add get_gr_context support for Linux. 
Implement the feature of retrieving gr context contents for all chips.
Two IOCTLs, NVGPU_DBG_GPU_IOCTL_GET_GR_CONTEXT_SIZE and _GET_GR_CONTEXT,
are added.

Bug 3102903

Change-Id: If11006f4e294f190785a2c3159ca491b9f3b5187
Signed-off-by: Lili Sang <lilis@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2449183
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Chris Johnson <cwj@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:48 -06:00
Rajesh Devaraj
bfa712ab3d gpu: nvgpu: update doxygen for error reporting functions 
This patch updates the doxygen for error reporting functions that
are used to report errors from sub-units in GPU to SDL unit.

JIRA NVGPU-6149

Change-Id: I250f5775c2aac44239d49625d9c30c838adcbb1f
Signed-off-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2452643
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Shashank Singh <shashsingh@nvidia.com>
Reviewed-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:48 -06:00
Deepak Nibade
b23a114c63 gpu: nvgpu: ensure all perfmon writes are complete after reset 
gr_gv100_reset_hwpm_pmm_registers() writes a bunch of registers in
sys/gpc/fbp chiplets to reset perfmons. To ensure all the writes have
completed it is necessary to readback each chiplet's PRI fence register.

Add and use new HAL g->ops.priv_ring.read_pri_fence() to achieve this.

Implement the HAL for gv11b in new source code file
hal/priv_ring/priv_ring_gv11b.c.

Bug 2510974
Jira NVGPU-5360

Change-Id: If4dd61cb4265422e8c2d16884790eb0fe7f2c103
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2453631
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:48 -06:00
Jon Hunter
8c94013c4d gpu: nvgpu: Add host1x support 
Add support for the upstream host1x driver with the 'Host1x/Tegra UAPI'
series [0] applied. The host1x support is only enabled if the kernel
configuration variable CONFIG_TEGRA_HOST1X_NEXT is set. Please note that
the initial implementation only supports Tegra194.

[0] https://patchwork.ozlabs.org/project/linux-tegra/list/?series=206532

Bug 3156385

Change-Id: If531a8b866b48ba5a2af021756a4b5d158b8d59a
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2429981
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:48 -06:00
Richard Zhao
7364c311fa gpu: nvgpu: vgpu: add ctxsw buffer rtvcb support for gfxp 
gfxp needs to set a different rtv buffer which is larger than the
default rtv global buffer.

Jira GVSCI-4732

Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Change-Id: I1383b6b0abff40904133a7b32559899f9259ae89
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2448161
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Sagar Kadamati <skadamati@nvidia.com>
Reviewed-by: Aparna Das <aparnad@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:48 -06:00
Deepak Nibade
d584294545 gpu: nvgpu: set preemption mode for specific GR instance 
Pass gr_instance_id to function nvgpu_gr_setup_set_preemption_mode()
which picks up correct nvgpu_gr struct pointer based on instance id.

nvgpu_gr_get_cur_instance_ptr() is not needed in this special case
since there is no PGRAPH register programming required to set preemption
mode. All writes/updates are done on context image.

Also fix unit tests accordingly to always select 0th GR instance.

Jira NVGPU-5648

Change-Id: I46eff816d5a4afe784bf75b64ee9d698c77eb64a
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2435468
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Lakshmanan M <lm@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:48 -06:00
Lakshmanan M
883c12529a gpu: nvgpu: Add multi GR reset support for MIG 
* Added multi GR reset/recovery support for MIG.
* Added a api to get the gr engine id using gr instance id.

JIRA NVGPU-5650
JIRA NVGPU-5653

Change-Id: I12ece75a4c33f0944f404121b54879e814dda6df
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2443644
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-by: Dinesh T <dt@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:48 -06:00
Lakshmanan M
613e1e704a gpu: nvgpu: Add recursive gr remap window support 
Added logic to support recursive gr remap window support using
thread id and recursive lock count.

JIRA NVGPU-5650
JIRA NVGPU-5647

Change-Id: I4fca4b776fa009d630ecea38947c45bfea048e41
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2443279
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Dinesh T <dt@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:48 -06:00
Vedashree Vidwans
2386ddd038 gpu: nvgpu: modify pbdma.get_fc_target 
Modify pbdma.get_fc_target() to accept nvgpu_device pointer. This is
required for nvgpu-next.

JIRA NVGPU-6135

Change-Id: I8baa58c704ee32ee68e87915029ac2be2132d4a4
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2440180
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:48 -06:00
David Ung
47c30eb80f gpu: nvgpu: Updated with generator headers 
Add pmu_idle_mask_1, pmu_idle_mask_2 and pmu_idle_mask_2_supp

Bug 2833620

Change-Id: I616ea584646c6affacc3df4c63ccff59d574ab52
Signed-off-by: David Ung <davidu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2422614
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:28 -06:00
Richard Zhao
e8a356548e gpu: nvgpu: vgpu: add runlist_id to cmd TEGRA_VGPU_CMD_CHANNEL_ALLOC_HWCTX 
Server side needs channel runlist_id to do channel operations.

Jira GVSCI-8166

Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Change-Id: Ie51f7263851d24d95756bd60f29ba01fdc13ec49
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2438020
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:28 -06:00
tkudav
9251621f5f gpu: nvgpu: Add GV11b missing register 
Add the missing register definition as highlighted by HAL
checker tool for GV11b.

Bug Bug 200604892

Change-Id: Id4127a8bdf8a866cdecd2457d327bed16530ef09
Signed-off-by: tkudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2437691
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:28 -06:00
Vedashree Vidwans
a252cc244a gpu: nvgpu: modify alloc_as ioctl to accept mem size 
- Modify NVGPU_GPU_IOCTL_ALLOC_AS and struct nvgpu_alloc_as_args to
accept start address and size of user memory. This allows configurable
address space allocation.
- Modify gk20a_as_alloc_share() and gk20a_vm_alloc_share() to receive
va_range_start and va_range_end values.
- gk20a_vm_alloc_share() initializes vm with low_hole = va_range_start,
and user vma size = (va_range_end - va_range_start).
- Modify nvgpu_as_alloc_space_args and nvgpu_as_free_space_args to
accept 64 bit number of pages.

Bug 2043269
JIRA NVGPU-5302

Change-Id: I243995adf5b7e0e84d6b36abe3b35a5ccabd7a37
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2385496
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Sami Kiminki <skiminki@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Sami Kiminki <skiminki@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:28 -06:00