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vinodg
df896cd3c7 gpu: nvgpu: support feature_override for nvgpu-next 
Jira NVGPU-4667

Signed-off-by: vinodg <vinodg@nvidia.com>
Change-Id: I5dc64b874acf691c6a77dcda6c66c119dbc0092c
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2324880
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:28 -06:00
ajesh
e4285740a4 gpu: nvgpu: modify the prints for return values 
Modify the prints for certain OS API return values for non safe build.

Jira NVGPU-4987

Change-Id: I7c3eba58b5c685fbf654b7093e4d2180e02c49a6
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2324992
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Shashank Singh <shashsingh@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
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Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:28 -06:00
Vinod G
0e0b966f0c gpu: nvgpu: update gr exception hal 
Make generic gr exception static functions
to public functions.

Jira NVGPU-5033

Signed-off-by: Vinod G <vinodg@nvidia.com>
Change-Id: I9ac4cbc728edda813a487f80af622559a798b319
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2324676
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Vedashree Vidwans <vvidwans@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:28 -06:00
Konsta Hölttä
62955ec7f1 gpu: nvgpu: reorganize gpfifo writes in submit 
Reduce the number of branches and make the code flow more
straightforward by having two complete paths for the gpfifo entry
writes: one when job tracking is done and another when not. Although
this adds some very minor duplication (of the user gpfifo append call),
this way it's easier to read what happens to the job metadata, and when
do we even have one.

Jira NVGPU-4548

Change-Id: I6be8bc5afaf139e7c49d5e44837e04f642dd5721
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2321761
(cherry picked from commit 9a3d3c8d556d563b9d67b370636791d6a1dd57ee)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2324253
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:28 -06:00
Konsta Hölttä
550d45430f gpu: nvgpu: extract submit prechecks to own function 
Reduce complexity of the big gpfifo submit function by adding another
function to perform channel-global and driver-global sanity checks that
don't depend on submit parameters.

The nvgpu_channel_check_unserviceable() check was in the middle of the
submit function because there used to be a blocking wait just before it
when the hw gpfifo would be full. The blocking wait could exit with the
channel recovered from a timeout. Now it's ok to check this only once in
the beginning because the submit is non-blocking.

Jira NVGPU-4548

Change-Id: Idf19a560ca58a4f7da776c420dc9c6299cd7f7e7
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2321760
(cherry picked from commit 5359a2180f13505f57c62b9f639344913716370a)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2324252
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:28 -06:00
Konsta Hölttä
8b96f27c45 gpu: nvgpu: delete channel refs in job tracking 
Each submitted job has held a reference to the channel where the job
runs. This is not necessary: all that the refs do is prevent the channel
from getting freed before the jobs are done in case the channel file is
closed early. However, that is already taken care of, so remove the
per-job get/put pair.

The channel closure path needs to unbind the channel from its tsg if
that hasn't done by the channel's user. Unbind gets the channel off the
runlist and forces all fences to expire, then enqueues the channel for
final job cleanup. No jobs can outlive this.

Delete also the extra get/put pair in job cleanup. The caller (either
the channel worker thread or the submit path in case of deterministic
channels) will always hold a reference.

Jira NVGPU-4548

Change-Id: I3a01759e1b2caf66c46cff19f6557645489ca8f4
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2322541
(cherry picked from commit 8af6260b8fcfd7bf393f50addb681b5353cbae38)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2324255
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:28 -06:00
vinodg
9d577b8d9a gpu: nvgpu: unit: remove gv11b_channel_debug_dump test 
dump_channel hal is moved to common code.
Remove the test_gv11b_channel_debug_dump

Jira NVGPU-5109

Signed-off-by: vinodg <vinodg@nvidia.com>
Change-Id: If04314c09d9f7f0c789752a8a003e012a629d9be
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2323553
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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GVS: Gerrit_Virtual_Submit
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 2020-12-15 14:13:28 -06:00
Vinod G
340ea241cb gpu: nvgpu: remove channel debug_dump hal 
Channel debug_dump hal function does not involve
any register related code.

Move gv11b_channel_debug_dump hal function to
common code nvgpu_channel_info_debug_dump function.

Check gpu hw version to limit instance variables
dump that differs between socs.

Add new hal pointer syncpt_debug_dump for pbdma.

Jira NVGPU-5109

Signed-off-by: Vinod G <vinodg@nvidia.com>
Change-Id: Icfca837ce8e4117387cffa6fadf6c094c7da5946
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2321016
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2020-12-15 14:13:28 -06:00
Seshendra Gadagottu
62c06723dd gpu: nvgpu: sim: defer sim buffers allocation 
Allocate sim buffers only after chip specific
memory properties are enabled.

JIRA NVGPU-5281

Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Change-Id: I7b64b3a51b8cd66dbefd22a09216b2caaeccacbf
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2324083
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:28 -06:00
Sagar Kamble
c37c1b5474 gpu: nvgpu: fix null pointer access in nvgpu_vm_find_mapping 
mapped_buffer sgt is deallocated by dma_buf_unmap_attachment in the
function nvgpu_vm_find_mapping if it is previously mapped. Debug
print referred to the sgt page after deallocating hence move it
before deallocation.

Fix below null pointer dereference issue:

[   34.692659] Unable to handle kernel NULL pointer dereference
at virtual address 0000000000000000
...
[   34.699820] Hardware name: Jetson-AGX (DT)
[   34.709136] pc : nvgpu_vm_find_mapping+0xcc/0x240 [nvgpu]
[   34.714377] lr : nvgpu_vm_find_mapping+0xa4/0x240 [nvgpu]
...
[   34.804523] Call trace:
[   34.807093]  nvgpu_vm_find_mapping+0xcc/0x240 [nvgpu]
[   34.812195]  nvgpu_vm_map+0xd4/0x480 [nvgpu]
[   34.816168]  nvgpu_vm_map_linux+0x15c/0x1c8 [nvgpu]
[   34.821237]  nvgpu_vm_map_buffer+0x14c/0x270 [nvgpu]
[   34.825962]  gk20a_as_dev_ioctl+0x320/0xfe0 [nvgpu]
[   34.830955]  do_vfs_ioctl+0xb8/0xa40
[   34.834449]  ksys_ioctl+0x80/0xb8
[   34.837430]  __arm64_sys_ioctl+0x1c/0x28
[   34.841630]  el0_svc_handler+0x80/0x1a8
[   34.845129]  el0_svc+0x8/0xc
[   34.848106] Code: f9400021 d360ff3a b9406a62 f940007c (f9400034)
[   34.854227] ---[ end trace 1d8c4efb211dc317 ]---

Bug 2834141

Change-Id: I281ac21071fcc2e3e6f3685798c8e77daba6d4a4
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2323361
Tested-by: Debarshi Dutta <ddutta@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:28 -06:00
Debarshi Dutta
f483304238 gpu: nvgpu: add prerequisite for syncpoint-shim support 
add check for nvgpu_has_syncpoints() before enabling syncpoint-shim and
usermode_syncpoint support. Syncpoint shim cannot exist without
syncpoint support in the first place.

Bug 200551105

Change-Id: I2a9c6d23c72a25bcac4a2a8737ed0bad14cd4d8f
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2323208
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:28 -06:00
Seshendra Gadagottu
ec54b8b2ad gpu: nvgpu: sim: set remove_support hal to NULL 
Found issues with removing sim support for igpu.
Set sim->remove_support to NULL  until JIRA NVGPU-5281
is fixed.

JIRA NVGPU-5257

Change-Id: I2c8af7a0d05f963233378bdb3aa2afcfc4f32b6e
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2322987
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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GVS: Gerrit_Virtual_Submit
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 2020-12-15 14:13:28 -06:00
Konsta Hölttä
6cb6a970af gpu: nvgpu: don't update ch syncpt for user sync 
g->ops.channel.set_syncpt() updates the inst block's allowed syncpt
field for the syncpoint that's allocated for kernelmode submits (if
any). This is different from the userspace-owned syncpoint that is used
with usermode submits, so don't call set_syncpt when creating the user
syncpt.

If the kernel sync object wouldn't exist, the call would even fail. The
allowed syncpt is written during nvgpu_channel_setup_bind() (if usermode
submit isn't requested), after the kernel syncpt is allocated.
Originally, just one syncpoint used to be shared for the kernel and
userspace; now that they're separate, this different path to update the
allowed syncpt would need other modifications to work with the user sync
if one would be used on platforms that care about the allowed syncpt.

Jira NVGPU-4548

Change-Id: If800e704ef8a3289e04c8d75a623affd6779e309
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2320357
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:28 -06:00
Seshendra Gadagottu
675fb39ca0 gpu: nvgpu: add runlist.init_enginfo hal 
Add runlist.init_enginfo hal to initialize
runlist's engine info. nvgpu-next has it's own
implementation for init_enginfo hal, so removed
NVGPU_NEXT_INIT_RUNLIST_ENGINFO from nvgpu hals.

JIRA NVGPU-4979

Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Change-Id: Ie35a88c6ba3c7c741124386f7c643b36b42d4143
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2319103
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
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Reviewed-by: Lakshmanan M <lm@nvidia.com>
Reviewed-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:28 -06:00
Seshendra Gadagottu
2f6be2735e gpu: nvgpu: remove nvgpu-next gr init 
nvgpu-next gr init is handled within nvgpu-next
hals. So remove references to NVGPU_NEXT_INIT_GR_INFO from
nvgpu hals.

JIRA NVGPU-4979

Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Change-Id: I2e493220f855a7ff2f940cf07b1fc0b876601df5
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2319102
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-by: Lakshmanan M <lm@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:28 -06:00
Vedashree Vidwans
44f12288ad gpu: nvgpu: add mc.reset_engine hal for nvgpu-next 
Engine reset process has changed for nvgpu-next. Add mc.reset_engine
gops for nvgpu-next.
Modify engine reset functions to use mc.reset_engine hal.

Jira NVGPU-5145

Change-Id: I176800212042eaef71c8cbd4bc499805c5af0e60
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2312485
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:13:28 -06:00
Debarshi Dutta
a2080a1208 gpu: nvgpu: add fuse clock support 
1) added support for fuse clock directly from nvgpu linux build for GV11B
and GP10B.
2) added a common function platform_acquire_clock thats used by both
GP10B, GV11B to acquire their respective clocks.
3) remove use of tegra_fuse_clock_enable/disable APIs

The clock parsing code is changed to verify the clock-names obtained
via DT with the static clock-names in the platform code before proceeding
with clk_enable.

Bug 2887230

Change-Id: I177cde9c4bf1a8be6f3437f36e1c6f75cd9c9279
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2307136
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:28 -06:00
Konsta Hölttä
f9e9e41c7b scripts: rfr: convert to python 3 
Python 2 is no longer maintained. Use python 3 to be up to date and to
make it easier to work with utf-8 text.

Change-Id: I341f558730caaa9106e8eef4304d67af747c7373
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2318760
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:28 -06:00
Konsta Hölttä
0cd5502935 scripts: rfr: fix urls with digits 
With just (\d+), the very first regex would find a number within a
longer string, which for the following example would be wrongly 3, not
2318270. Make it match just a number and nothing else. Interestingly,
plain number search would work for most gerrit urls, but let's be
specific to avoid accidents.

example: https://git-master.nvidia.com/r/c/3rdparty/qnx/src/+/2318270

Also make the list more concise by joining almost identical pairs that
differ by just one character: use "?" to make the character optional.

Change-Id: Ia1b2ee4270c599ec7bcc2c4375c8a8f498043b27
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2318496
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:28 -06:00
Seshendra Gadagottu
002fb2431d gpu: nvgpu: nvgpu-next changes for fifo pbdma 
- Include nvgpu_next_pbdma.h in pbdma.h
- NULL check for fifo.init_pbdma_map hal before allocating
  memory for f->pbdma_map
- NULL check for f->pbdma_map before freeing memory for
  f->pbdma_map

JIRA NVGPU-4979

Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Change-Id: I5eacc671b924c947620b2c49c8f82577c30ba1a3
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2317804
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
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Reviewed-by: Seema Khowala <seemaj@nvidia.com>
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GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:28 -06:00
Nicolas Benech
fee7b81061 gpu: nvgpu: unit: required tests system 
When running unit testing, we need to ensure that all expected unit
tests were actually run. This used to be done by an external Python
script, but it is not suitable for some OSes. This patch brings this
mechanism into the unit testing framework, and makes use of an INI
file to provide the list of expected tests.

JIRA NVGPU-3072

Change-Id: I9ed590de9005fe10324c594ea33ebc8fda482019
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2317220
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
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 2020-12-15 14:13:28 -06:00
Seema Khowala
b7767a604f gpu: nvgpu: add intr_top_enable fifo gops 
This is required for enabling fifo interrupts for nvgpu-next.

JIRA NVGPU-4864

Change-Id: I5c09105296a01b82505023ecf576d71ce74f7a31
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2313013
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 2020-12-15 14:13:28 -06:00
Konsta Hölttä
d0ffb335dc gpu: nvgpu: move nvgpu_has_syncpoints 
nvgpu_has_syncpoints is more general than a channel synchronization
related, so move it to nvhost.c from channel_sync.c. Move the
declaration from gk20a.h to nvhost.h.

As the debugfs knob is Linux related, move it from struct gk20a to
struct nvgpu_os_linux.

Jira NVGPU-4548

Change-Id: I4236086744993c3daac042f164de30939c01ee77
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2318814
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 2020-12-15 14:13:28 -06:00
Konsta Hölttä
db9c1b1f97 gpu: nvgpu: don't build sw semas for dgpu 
Make tu104's sema cmd HAL ops depend on CONFIG_NVGPU_SW_SEMAPHORE
in addition to the kernel mode submit flag.

Drop CONFIG_NVGPU_SW_SEMAPHORE from NVGPU_FORCE_DGPU_SAFETY_PROFILE.
Semaphore-based synchronization is not actually needed for dgpu.

Jira NVGPU-4548

Change-Id: I3fe066dbeb68295dfc4bbe09256ff6a20c892c2f
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2318737
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 2020-12-15 14:13:28 -06:00
ajesh
9846573d64 gpu: nvgpu: handle the return values from OS APIs 
Handle the return values from standard OS library calls.

Jira NVGPU-4987

Change-Id: I41bf0113097d6bfa344ed58f68448abc9cc7f367
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2299985
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 2020-12-15 14:13:28 -06:00
Terje Bergstrom
cc2e1be0bb gpu: nvgpu: unit: atomic: Use labs when operating on long 
Use labs() instead of abs() when operating with longs.

Change-Id: Ibb1f2c69099387478b41b66cf68539b460bc2be3
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
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 2020-12-15 14:13:28 -06:00
Terje Bergstrom
caf9ba229f gpu: nvgpu: unit: Remove invalid dereference 
test_tsg_format_gen() accessed test_args->timeslice when test_args
has not been initialized.

Change-Id: Ia72c5371c8634b7b1fe54c9aa20693edc47cb762
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2318389
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 2020-12-15 14:13:28 -06:00
Terje Bergstrom
7a71aba234 gpu: nvgpu: unit: Fix header guards 
Fix cases where header guard #ifdef and #define had a mismatch.

Change-Id: I74aec2736c467f79e9786880d3e3847ee86a2466
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2318388
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 2020-12-15 14:13:28 -06:00
Terje Bergstrom
3569e21518 gpu: nvgpu: unit: Several fixes for initializations 
Structs with structs inside them need to be initialized with double
braces. Also add a couple of missing initializations.

Change-Id: I0aa5f7ac008b8db4bececa92807f598f2f3081bd
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
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 2020-12-15 14:13:28 -06:00
Terje Bergstrom
d7927778b3 gpu: nvpgu: posix: Remove unused static nvhost func 
Remove unused statuc function nvgpu_nvhost_syncpt_nb_hw_pts.

Change-Id: I73f6990957390e8ec0b93ca341056d30e17b79c5
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
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 2020-12-15 14:13:28 -06:00
Terje Bergstrom
32db53d4e1 gpu: nvgpu: posix: Pass atomic types to atomic ops 
Atomic functions require the type of manipulated atomic to be of
_Atomic type.

Change-Id: I8cf417a2b15ef34488b82560b65d5abfbe67fde8
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2318385
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 2020-12-15 14:13:28 -06:00
Terje Bergstrom
6d4e4f633f gpu: nvgpu: posix: Use non-atomic types when appropriate 
Atomic functions return non-atomic types. Change the type definitions
and casts to follow that.

Change-Id: If6fbfa5f75810151fe4765874f3dd610b85a39d1
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2318384
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 2020-12-15 14:13:28 -06:00
Thomas Fleury
88c774e5d1 gpu: nvgpu: enable clk_arb for dGPU safety 
Enable CONFIG_NVGPU_CLK_ARB for dGPU safety build.

Use CONFIG_NVGPU_NON_FUSA for invocation of non-safe functions:
- nvgpu_hr_timestamp
- nvgpu_hr_timestamp_us

Jira NVGPU-4661
Jira NVGPU-5235 (for addressing usage of above functions).

Change-Id: I271fdbc45c1e4d01cb70d50dcf63d15b9df33c76
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2317842
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 2020-12-15 14:13:28 -06:00
Sagar Kamble
401d4cbc5f gpu: nvgpu: reorganize tegra clocks enable/disable 
When the tegra powergate support is not present, genpd takes care of
powergating. However, clocks are still controlled by nvgpu driver.
Hence enable/disable tegra clocks when the tegra powergate support
is not available.

Bug 2834141

Change-Id: I7ca4e5002604b30de6bddcf640d78b939136dd4d
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2316879
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 2020-12-15 14:13:28 -06:00
Thomas Fleury
25edcc1353 gpu: nvgpu: cta preemption mode HAL for tu104 
Use gp10b_ctxsw_prog_set_compute_preemption_mode_cta instead
of gm20b_ctxsw_prog_set_compute_preemption_mode_cta for tu104.

Jira NVGPU-4661

Change-Id: I7b85cbcc139e6843c8b7bd89e0afb6030160362f
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2316206
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 2020-12-15 14:13:28 -06:00
Thomas Fleury
28ccd63f69 gpu: nvgpu: enable CONFIG_NVGPU_LS_PMU for safety 
Enable CONFIG_NVGPU_LS_PMU for dGPU safety build.
Add missing #ifdefs for CONFIG_NVGPU_POWER_PG and
CONFIG_NVGPU_CLK_ARB which are not defined for safety build.

Moved gm20b_mc_is_enabled to fusa code.

NVGPU_UNIT_PWR is only defined when CONFIG_NVGPU_HAL_NON_FUSA
is defined. Added #ifdefs to compile out gk20a_pmu functions
that are using it.

Jira NVGPU-4661

Change-Id: Ieb552f9374bad6f3dad777322f118931e0bc94ec
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2317085
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 2020-12-15 14:13:28 -06:00
Thomas Fleury
1adf23eea5 gpu: nvgpu: build flags for dGPU safety 
Add the following flags for dGPU safety build:
- CONFIG_NVGPU_GR_FALCON_NON_SECURE_BOOT
- CONFIG_NVGPU_SM_DIVERSITY
- CONFIG_NVGPU_USE_3LSS_ERR_INJECTION

Jira NVGPU-4661

Change-Id: I50df5677f6b53d835852ef29fb378d4817bd4e2b
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2315694
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 2020-12-15 14:13:28 -06:00
Konsta Hölttä
46761356e5 gpu: nvgpu: make channel sync ops const 
The function pointers for the syncpoint and semaphore implementations of
struct nvgpu_channel_sync do not change in runtime. Make this more
explicit by having the pointers in predefined private structures. Each
instance of a sync (which there are one per open channel) gets a pointer
to an ops structure instead of a list of all the individual ops.

Jira NVGPU-4548

Change-Id: I361b74bdfe32470203760d11c30e048cb4d20b77
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2318242
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 2020-12-15 14:13:28 -06:00
Antony Clince Alex
fa6cf4598e nvgpu: userspace: update therm unit init 
Update therm unit testcase: test_setup_env to include assignment of hal
function: therm_max_fpdiv_factor.

Jira: NVGPU-4860

Change-Id: I644191cdd4d4538d0c189af9cb80cea3d6368820
Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
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 2020-12-15 14:13:28 -06:00
Antony Clince Alex
da8ee8d615 gpu: nvgpu: add therm_max_fpdiv_factor gops.therm 
Use therm_max_fpdiv_factor gops.therm for nvgpu-next to get the maximum
fp_div_factor.

Jira NVGPU-4860

Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
Change-Id: If0e9b82f5b61289e226ceeff386fc88763af66e2
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2313336
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 2020-12-15 14:13:28 -06:00
Abdul Salam
4f5bd9e633 gpu: nvgpu: Implement clk_good and pll_lock check 
Add clk_good and pll_lock check as a part of fmon polling.
This will poll for any clock related faults at FTTI interval.
Add new function to poll for vbios init completion.

NVGPU-4967
Bug 2849506
Bug 200564937

Change-Id: I5bc885329981e07376824e148edabe9be4120e1c
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2305782
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 2020-12-15 14:13:28 -06:00
sagar
b8a3e54dda gpu: nvgpu: add invalid ctxsw method 
* For ctxsw negative testing, nvgpu need to send and invalid method
 * Sending 0xFFFF method will result in triggering ctxsw error intr.

JIRA NVGPU-5080

Change-Id: I6c16137d86ee2ddb25f1508161d9d6befcbcbefe
Signed-off-by: sagar <skadamati@nvidia.com>
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 2020-12-15 14:13:28 -06:00
Seema Khowala
21e2214c3d gpu: nvgpu: support nvgpu-next intr config 
JIRA NVGPU-4864

Change-Id: I2fb5be3270c73ea891021161f539a7f731e05f63
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
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 2020-12-15 14:13:28 -06:00
rmylavarapu
a5b3170c6f gpu: nvgpu: Refactor allocator lite unit 
- Changed the names of structs as per private/public
  naming convention.
- Renamed allocator.c file

NVGPU-4487

Change-Id: I42ec5730f1cb0029a6bb6e6ddff151bd08d6bbd8
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2316945
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 2020-12-15 14:13:28 -06:00
Sagar Kamble
f254a09094 gpu: nvgpu: fix dgpu build for next kernels 
Add the following changes to build dgpu sources for kernels after 4.14:
1. tegra_alloc_fd is defined by downstream tegra mc driver built with
   the flag CONFIG_NV_TEGRA_MC, hence make the nvgpu config
   NVGPU_USE_TEGRA_ALLOC_FD dependent on it.
2. dma_buf_ops.map_atomic is removed in kernel version 4.17.
3. gk20a_vidbuf_ops.set_drvdata and .get_drvdata are to be set
   under the config CONFIG_NVGPU_DMABUF_HAS_DRVDATA

Bug 2834141

Change-Id: If2351beddfd6f22a1a1da4499cacf6a1880ede76
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2316486
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 2020-12-15 14:13:28 -06:00
vinodg
8da4c91ad5 gpu: nvgpu: move userspace firmware files to gv11b dir 
Move all userspaces firmware files from firmware dir
to firmware/gv11b dir.
Fix for unit.sh test failure in local host.

Update Makefile.tmk and install-unit.sh scripts to
copy from firmware/gv11b dir.

Jira NVGPU-5144

Signed-off-by: vinodg <vinodg@nvidia.com>
Change-Id: I706af069f6796db085947278e56a8598a9e3fff2
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2311071
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 2020-12-15 14:13:28 -06:00
Thomas Fleury
f43d5df83a gpu: nvgpu: build dGPU in safety 
Enable build flags for dGPU in safety, when
NVGPU_FORCE_DGPU_SAFETY_PROFILE is set.

Use libnvgpu-dgpu_safe.exports for dGPU safety build.

Add build flags for tu104 HAL initialization (to solve
undefined symbols in safety build).

Temporarily add non-fusa files needed to build dGPU in safety.
related functions will have to move to fusa files.

Jira NVGPU-4611

Change-Id: I41db0c039c7f15d9191cdb811b4906e779d5cc88
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2310276
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 2020-12-15 14:13:28 -06:00
Seshendra Gadagottu
872b3946dd gpu: nvgpu: add nvgpu-next fb gops 
JIRA NVGPU-5222

Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Change-Id: I3004fcfd9cf17b81c6d218954da140982a76c6fd
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2316212
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
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 2020-12-15 14:13:28 -06:00
rmylavarapu
f5acc98db3 gpu: nvgpu: Refactor Super surface lite unit 
- Changed the names of structs as per private/public
  naming convention.
- Removed unwanted code in struct super_surface.

NVGPU-4486

Change-Id: I5834c2296ccbe1545bca6a608ad88817a9104fb8
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2313989
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 2020-12-15 14:13:28 -06:00
vinodg
a9d8fc96a7 gpu: nvgpu: hal correction for class error handling 
Add new hal function
gp10b_gr_intr_handle_class_error.

Update handle_class_error hal function for
gp10b, gv11b and tu104 to
gp10b_gr_intr_handle_class_error from
gm20b_gr_intr_handle_class_error.
gr_trapped_data_mme_pc uses 12 bits from gp10b.

Move gm20b_gr_intr_handle_class_error hal function
to non-fusa section.

Jira NVGPU-4913

Signed-off-by: vinodg <vinodg@nvidia.com>
Change-Id: Ic93013ba43d4bf409527109f2f2d43db11c4238e
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2314249
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 2020-12-15 14:13:28 -06:00