Commit Graph

27 Commits

Author SHA1 Message Date
mkumbar
880a639a86 gpu: nvgpu: skip simulation check for pmu-lsfm unit
skip simulation check for pmu-lsfm unit as lsfm unit execution
is required on simulation to support secure boot of ctxsw.

JIRA NVPU-5200

Change-Id: I85b8896643551e782b59663b13c52df36169754c
Signed-off-by: mkumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2396449
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
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Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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GVS: Gerrit_Virtual_Submit
2020-12-15 14:13:28 -06:00
smadhavan
c261f7573b gpu: nvgpu: support nvgpu-next secure boot
Add NVGPU_NEXT_GPUID in
nvgpu_acr_init, nvgpu_acr_lsf_fecs_ucode_details,
and nvgpu_acr_lsf_gpccs_ucode_details functions.

JIRA NVGPU-5323

Change-Id: I514ab6de08ffaad323072499a92acef24668d3fc
Signed-off-by: smadhavan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2361630
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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GVS: Gerrit_Virtual_Submit
2020-12-15 14:13:28 -06:00
smadhavan
f48c4e1887 gpu: nvgpu: remove fmodel check in secure boot
This patch removes fmodel check in functions nvgpu_acr_init,
nvgpu_acr_construct_execute and nvgpu_acr_hs_bootstrap_acr since these
are called based on NVGPU_SEC_PRIVSECURITY flag and are independent of
platform for secure boot path.

JIRA NVGPU-5323

Change-Id: I8647ecc1de80900995dae953b4645bc8d281b829
Signed-off-by: smadhavan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2367219
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2020-12-15 14:13:28 -06:00
mkumbar
91af7efd23 gpu: nvgpu: enable ACR support for NEXT dGPU
-Enabled ACR support for NEXT dGPU
-Blob creation & boot strap of LSPMU support skipped by ACR
 by checking flag "support_ls_pmu", lspmu support is not
 required until PSTATE support is enabled.

JIRA NVGPU-5461

Change-Id: I5a4c688926ca1c55aeb4cbbb9668c55bb35f9119
Signed-off-by: mkumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2344582
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Reviewed-by: Abdul Salam <absalam@nvidia.com>
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2020-12-15 14:13:28 -06:00
Scott Long
20114c7c8c gpu: nvgpu: acr: misra 12.1 fixes
MISRA Advisory Rule states that the precedence of operators within
expressions should be made explicit.

This change removes the Advisory Rule 12.1 violations from acr code.

Jira NVGPU-3178

Change-Id: Ibfcb23dbf9931efd1890c9b548c36462c55ae47d
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2277477
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2020-12-15 14:10:29 -06:00
Divya Singhatwaria
3853636720 gpu: nvgpu: Adding more tests in ACR unit
Test the following function:
nvgpu_acr_construct_execute()

Also, add check for "invalid falcon id"
in the function nvgpu_acr_is_lsf_lazy_bootstrap()

JIRA NVGPU-4123

Change-Id: Icedca3eec76f5cedbd5f2857755a0a79c476dc8b
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2214742
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2020-12-15 14:10:29 -06:00
Philip Elcan
67e1fbca1f gpu: nvgpu: acr: update acr init APIs
Remove the second parameter for the nvgpu_acr_init() and
acr_construct_execute() functions so they only require the gk20a
object. The g->acr was always passed for this parameter. And this
makes the API signature match the other init functions in the driver.

JIRA NVGPU-3980

Change-Id: I8c513b1dcb9c6083f0f3e2f7b6f31dc78c5c8200
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2202971
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2020-12-15 14:05:52 -06:00
Mahantesh Kumbar
837f2a58f4 gpu: nvgpu: ACR's bootstrap_hs_acr() parameters clean up
Private data struct "struct hs_acr" used incorrectly by adding
as input param to public function for ACR unit. Cleaned up &
added required chip specific ACR unit's function.

JIRA NVGPU-3811

Change-Id: I6cdcdb71c48ebff349de2b7a587d4d2cb0f0212c
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2195019
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2020-12-15 14:05:52 -06:00
Mahantesh Kumbar
b23dc81f05 gpu: nvgpu: Deleting ACR's unit GV100 support
-Deleting GV100 from ACR unit as GV100 is not
 supported anymore.

JIRA NVGPU-3243

Change-Id: I8461db05a199a32643d9ec797e9db23d1f286886
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2168050
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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2019-08-05 23:00:27 -07:00
Sagar Kamble
a16cc2dde3 gpu: nvgpu: compile out vidmem from safety build
Safety build does not support vidmem. This patch compiles out vidmem
related changes - vidmem, dma alloc, cbc/acr/pmu alloc based on
vidmem and corresponding tests like pramin, page allocator &
gmmu_map_unmap_vidmem..
As vidmem is applicable only in case of DGPUs the code is compiled
out using CONFIG_NVGPU_DGPU.

JIRA NVGPU-3524

Change-Id: Ic623801112484ffc071195e828ab9f290f945d4d
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2132773
GVS: Gerrit_Virtual_Submit
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2019-06-25 04:37:08 -07:00
Sagar Kamble
5d37a9e489 gpu: nvgpu: compile out sim changes from safety build
As sim is non-safe unit compile it out. Also removed FMODEL related
nvgpu changes and unit tests from the safety build.

JIRA NVGPU-3527

Change-Id: I22c83e195a09f9150fb6f5a3afff91df2ea075b9
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2139455
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Raghuram Kothakota <rkothakota@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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2019-06-20 16:05:33 -07:00
Divya Singhatwaria
c341c84039 gpu: nvgpu: Fix CERT INT30-C violations in ACR
CERT-C INT30 requires checking for wrapping when
doing arithmetic operations of unsigned value.
This fixes INT30 violations in acr.c and acr_blob_construct_v1.c

JIRA NVGPU-3575

Change-Id: Ib44cc5675f0f3af7575b1f5340c78cabe0ce67af
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2136158
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2019-06-19 03:07:48 -07:00
Divya Singhatwaria
5eab914e34 gpu: nvgpu: Fix MISRA violation in ACR safety code
- Fix directive 4.7 violation
  Test the return value "err" of the function.

- Fix Rule 16.1 and 16.3 MISRA violations
  Add break-statement in "default" case.

JIRA NVGPU-3571

Change-Id: I57b098361ecefe6b69061063d1f52cda88fced18
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2134182
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2019-06-11 22:28:24 -07:00
Sagar Kamble
3f08cf8a48 gpu: nvgpu: rename feature Make and C flags
Name the Make and C flag variables consistently wih syntax:
CONFIG_NVGPU_<feature name>

s/NVGPU_DEBUGGER/CONFIG_NVGPU_DEBUGGER
s/NVGPU_CYCLESTATS/CONFIG_NVGPU_CYCLESTATS
s/NVGPU_USERD/CONFIG_NVGPU_USERD
s/NVGPU_CHANNEL_WDT/CONFIG_NVGPU_CHANNEL_WDT
s/NVGPU_FEATURE_CE/CONFIG_NVGPU_CE
s/NVGPU_GRAPHICS/CONFIG_NVGPU_GRAPHICS
s/NVGPU_ENGINE/CONFIG_NVGPU_FIFO_ENGINE_ACTIVITY
s/NVGPU_FEATURE_CHANNEL_TSG_SCHED/CONFIG_NVGPU_CHANNEL_TSG_SCHED
s/NVGPU_FEATURE_CHANNEL_TSG_CONTROL/CONFIG_NVGPU_CHANNEL_TSG_CONTROL
s/NVGPU_FEATURE_ENGINE_QUEUE/CONFIG_NVGPU_ENGINE_QUEUE
s/GK20A_CTXSW_TRACE/CONFIG_NVGPU_FECS_TRACE
s/IGPU_VIRT_SUPPORT/CONFIG_NVGPU_IGPU_VIRT
s/CONFIG_TEGRA_NVLINK/CONFIG_NVGPU_NVLINK
s/NVGPU_DGPU_SUPPORT/CONFIG_NVGPU_DGPU
s/NVGPU_VPR/CONFIG_NVGPU_VPR
s/NVGPU_REPLAYABLE_FAULT/CONFIG_NVGPU_REPLAYABLE_FAULT
s/NVGPU_FEATURE_LS_PMU/CONFIG_NVGPU_LS_PMU
s/NVGPU_FEATURE_POWER_PG/CONFIG_NVGPU_POWER_PG

JIRA NVGPU-3624

Change-Id: I8b2492b085095fc6ee95926d8f8c3929702a1773
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130290
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2019-06-11 09:46:24 -07:00
Mahantesh Kumbar
b691df5a02 gpu: nvgpu: compile out PMU members & headers for safety
-compile out nvgpu_pmu members which are not required for
safety buid & modified source as required to support same.
-compile out PMU headers include which are not required for
safety code
-Removed unnecessary PMU header includes from some files

JIRA NVGPU-3418

Change-Id: I5364b1b16c46637d229e82745dd2846cb6335a72
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2128228
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2019-06-06 06:55:58 -07:00
Mahantesh Kumbar
bb090ae672 gpu: nvgpu: Compile out ACR legacy profile & dGPU code for safety
Compile out ACR legacy tegra profile code used for gm20b/gp10b
& dGPU ACR code which is not required for safety build by setting
NVGPU_FEATURE_ACR_LEGACY build flag to 0

JIRA NVGPU-3567

Change-Id: I798fa0bd88bdf42612bd6bc7916e92fcffa786e7
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2128262
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2019-05-31 09:55:59 -07:00
Sagar Kamble
08add88e1d gpu: nvgpu: remove dgpu hal and sw from the safety build
Since dGPU support is not required for initial safety release, compile
out dGPU sw and hal implementations except below files that are used
by gv11b currently: acr_sw_gv100.c, engine_status_gv100.c, gr_gv100.c
gr_config_gv100.c and hwpm_map_gv100.c.

JIRA NVGPU-3062

Change-Id: I8a6bc8b235e7e5eac5b0e76147b8bd12f9abbd2d
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2119586
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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2019-05-23 10:07:31 -07:00
Sagar Kamble
bcbc87dc2e gpu: nvgpu: move pmu interface headers to include/nvgpu/pmu
Interface header files for PMU features are now moved under PMU header
files directory include/nvgpu/pmu. And fix bulk of coding style issues.
Update header file names and guards.

JIRA NVGPU-1971

Change-Id: Idf53fc09d8928d1b0a1cd16eef886de010dae06b
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2093006
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2019-04-13 12:33:52 -07:00
Vinod G
63fb543f63 gpu: nvgpu: Clean up gr_gk20a.h and gk20a.h
Initial cleanup process of gk20a.h
Remove unused structs. Add more structs to avoid including
gr_gk20a.h. This need more structs to be moved from gr_gk20a.h
Remove including pramin.h/acr.h/falcon.h and sim.h

Removed unused struct and netlist.h include from gr_gk20a.h

JIRA NVGPU-3132
JIRA NVGPU-3079

Change-Id: I1e965dd572e8e45bb20fca73ea566a6411aeebc1
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2094732
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2019-04-11 22:24:46 -07:00
Sagar Kamble
b8b02885af gpu: nvgpu: add rpc handlers for therm, volt, perfmon and acr
RPC handlers for therm, volt, perfmon and acr were open coded in the
pmu_rpc_handler. Instead, add implementations to respective units.
To avoid the dereferncing of struct nvgpu_pmu to avoid the circular
dependency we pass gk20a struct as input to nvgpu_pmu_rpc_execute
and other pmu_ipc.c functions.

JIRA NVGPU-1970

Change-Id: I6ea046960936923e69242bf90e8e25958cfba85e
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2079145
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
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2019-04-05 05:06:07 -07:00
Mahantesh Kumbar
d1127afb6d gpu: nvgpu: ACR chip specific file rename
Currently ACR chip specific sw init files are named as acr_$CHIP.c/h
which adds confusion as ACR HAL files, renamed to acr_sw_$CHIP.c.h
to reflect these files set ACR properties required by ACR ucode to
execute on selected chip.

JIRA NVGPU-2907

Change-Id: I12d8a481480eb89609d1cb73c9f20b24ae10651f
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2081633
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2019-03-28 10:36:43 -07:00
Mahantesh Kumbar
c33d9767da gpu: nvgpu: ACR circular dependency clean up within ACR unit
ACR WPR/blob-alloc functions are called from different parts of
ACR UNIT like bootstrap, blob-construct & chip specific ACR sw
init functions, these functions are part of acr.c which adds
circular dependency between acr.c & other files, so, moved to
respective new fiels based on its operation & also cleaned up
header dependency.

JIRA NVGPU-2907

Change-Id: I78d1eab59757029017d6ca62cbfc227a7a8240e4
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2081632
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2019-03-28 10:36:18 -07:00
Mahantesh Kumbar
10be3e8778 gpu: nvgpu: move ACR headers from include/acr to common/acr
Currently ACR header files are part of "include/nvgpu/acr/" folder &
ACR interfaces are not used by any other UNIT which allows headers to
keep restricted to ACR unit, as ACR can be divided into two stage
process like blob preparation & bootstrap, so moved header files from
of "include/nvgpu/acr/" to "nvgpu/common/acr/" to respective blob/
bootstrap/acr header files along with its dependent interfaces, this
allows interfaces restricted to header file based on operation it does.

With this any access to ACR must go through provided public functions,
this header move change caused large code modification & required to
make it with big single CL to avoid build break.

JIRA NVGPU-2907

Change-Id: Idb24b17a35f7c7a85efe923c4e26edfd42b028e3
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2071393
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2019-03-19 16:04:24 -07:00
Mahantesh Kumbar
b86354fef9 gpu: nvgpu: ACR struct wpr_carveout_info dependency cleanup
struct wpr_carveout_info is used to fetch WPR info by passing
as parameter to FB HAL, changed to pass multiple params to get
WPR base & size individually from FB HAL which removes dependency
between ACR & FB.

JIRA NVGPU-2907

Change-Id: I03af1a5358fcab5dc8237899d16a0b51a6779b1f
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2069617
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2019-03-12 23:34:13 -07:00
Mahantesh Kumbar
ae96316a85 gpu: nvgpu: separate ACR bootstrap functionality from common ACR
Currently  ACR bootstrap functions are mixed with common
ACR public functions file, so need to separate it out

JIRA NVGPU-2911

Change-Id: I433514f1924a13e206d80d756b78056dbb2e4841
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2033812
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2019-03-11 05:24:05 -07:00
Mahantesh Kumbar
3dca832142 gpu: nvgpu: ACR chip specific init using GPUID
Currently ACR chip specific properties set using HAL ops but
need to move out from HAL ops as ACR unit doesn't access
H/W directly & uses other engines to execute ACR on chip.

To fix used GPUID to init ACR chip specific properties

JIRA NVGPU-2909

Change-Id: I8fa1abcace6f7870bd116d39f94430497d80840b
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2032666
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2019-03-06 13:13:52 -08:00
Mahantesh Kumbar
0aa55f6741 gpu: nvgpu: ACR refactor to create ACR unit
Move ACR code to separate folder under common/acr to
make ACR separate unit. with this, separating ACR blob
construct, bootstrap & ACR chip specific configuration
code to different files.

ACR blob construction code split into two version, as
gm20b & gp10b still uses older ACR interfaces & not yet
moved to Tegra ACR, blob_construct_v0 file can be deleted
once gm20b/gp10b uses Tegra ACR ucode & point to
blob_construct_v1 with simple change.

As ACR ucode can execute on different engine falcon &
should not be dependent on specific engine falcon, used
generic falcon functions/interface to support ACR & doesn't
access any engine h/w registers directly, and files with
chip name has configuration needed for ACR HS ucode & LS
falcons.

JIRA NVGPU-1148

Change-Id: Ieedbe82f3e1a4303f055fbc795d9ce0f1866d259
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2017046
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-02-18 04:27:33 -08:00